tables.c

反汇编工具原代码,从sourceforge上下的

/*
 *
 * File Name: 
 *
 *		tables.c
 *
 * Summary:
 *
 *		This file was created to be included within a 'disassembler' project for PE 
 *		image files running on x86 and x86-compatible processors.
 *
 *		File contains IA32 instruction tables, these tables are arranged according to 
 *		IA32 opcode maps.
 *
 * 
 *
 * Copyright (C) 2004, Isaac Sigasa [[e-mail]]
 * All Rights Reserved
 *
 *
 *  
 * Redistribution and use in source and binary forms, with or without modification, 
 * are permitted provided that the following conditions are met:
 *
 *		-	Redistributions of source code must retain the above copyright notice, 
 *			this list of conditions and the following disclaimer. 
 *
 *		-	Redistributions in binary form must reproduce the above copyright notice, 
 *			this list of conditions and the following disclaimer in the documentation 
 *			and/or other materials provided with the distribution. 
 *
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
 * ARE DISCLAIMED. 
 * IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 */

#include "disasm.h"

InstructionTemplate _1ByteOpcode[0x10][0x10] =
{																											
	/*		0						1						2						3						4					5							6						7									8					9						A						B						C						D					E					F	*/
			{																																																																															
	/* 0 */	{"add","Eb,Gb"},		{"add","Ev,Gv"},		{"add","Gb,Eb"},		{"add","Gv,Ev"},		{"add","AL,Ib"},	{"add","eAX,Iv"},			{"push","ES"},			{"pop","ES"},			/* 0 */ 	{"or","Eb,Gb"},		{"or","Ev,Gv"},			{"or","Gb,Eb"},			{"or","Gv,Ev"},			{"or","AL,Ib"},			{"or","eAX,Iv"},	{"push","CS"},		{"PREFIX",N}				/* 0 */
			},																																																																																
			{																																																																																
	/* 1 */	{"adc","Eb,Gb"},		{"adc","Ev,Gv"},		{"adc","Gb,Eb"},		{"adc","Gv,Ev"},		{"adc","AL,Ib"},	{"adc","eAX,Iv"},			{"push","SS"},			{"pop","SS"},			/* 1 */		{"sbb","Eb,Gb"},	{"sbb","Ev,Gv"},		{"sbb","Gb,Eb"},		{"sbb","Gv,Ev"},		{"sbb","AL,Ib"},		{"sbb","eAX,Iv"},	{"push","DS"},		{"pop","DS"}				/* 1 */
			},																																																																																
			{																																																																																
	/* 2 */	{"and","Eb,Gb"},		{"and","Ev,Gv"},		{"and","Gb,Eb"},		{"and","Gv,Ev"},		{"and","AL,Ib"},	{"and","eAX,Iv"},			{"PREFIX",N},			{"daa",N},				/* 2 */		{"sub","Eb,Gb"},	{"sub","Ev,Gv"},		{"sub","Gb,Eb"},		{"sub","Gv,Ev"},		{"sub","AL,Ib"},		{"sub","eAX,Iv"},	{"PREFIX",N},		{"das",N}					/* 2 */
			},																																																																																															
			{																																																																																															
	/* 3 */	{"xor","Eb,Gb"},		{"xor","Ev,Gv"},		{"xor","Gb,Eb"},		{"xor","Gv,Ev"},		{"xor","AL,Ib"},	{"xor","eAX,Iv"},			{"PREFIX",N},			{"aaa",N},				/* 3 */		{"cmp","Eb,Gb"},	{"cmp","Ev,Gv"},		{"cmp","Gb,Eb"},		{"cmp","Gv,Ev"},		{"cmp","AL,Ib"},		{"cmp","eAX,Iv"},	{"PREFIX",N},		{"aas",N}					/* 3 */
			},																																																																																
			{																																																																																
	/* 4 */	{"inc","eAX"},			{"inc","eCX"},			{"inc","eDX"},			{"inc","eBX"},			{"inc","eSP"},		{"inc","eBP"},				{"inc","eSI"},			{"inc","eDI"},			/* 4 */		{"dec","eAX"},		{"dec","eCX"},			{"dec","eDX"},			{"dec","eBX"},			{"dec","eSP"},			{"dec","eBP"},		{"dec","eSI"},		{"dec","eDI"},				/* 4 */
			},																																																																																															
			{