mstick.c

s3c24a0固件测试代码 ? ? ? ? ?啊

	Uart_Printf("Offset value ? ");
	offset = Uart_GetIntNum();
	
	for(i=0; i<ONEPAGE_SIZE; i++) {
		Write_Buffer[i]=(U8)(i+offset);
		#if DEBUG_LEVEL>1
			if(!(i%16)) Uart_Printf("\n%3x:  ", i);
			Uart_Printf("[%02x]", Write_Buffer[i]);
		#endif
	}

	// Write.
	Init_Mstick_Txdma();

	if(Ms_Page_Write_Dma(blocknum, pagenum, Write_Buffer) != -1) {

		// Read
		Init_Mstick_Rxdma();	
		Ms_Page_Read_Dma(blocknum, pagenum, Extra_Buffer, Read_Buffer);

		// Calc checksum...
		for(Calc_Chksum=0, i=0; i<ONEPAGE_SIZE; i++) {
			Calc_Chksum += Read_Buffer[i];
		}
		In_Chksum = (U16)Extra_Buffer[4] | (U16)(((U16)Extra_Buffer[5])<<8);
		if(Calc_Chksum!=In_Chksum) {
			Uart_Printf("Checksum ERROR(IN:%x,Calc:%x)\n", In_Chksum, Calc_Chksum);
		}

		// Verify.
		Uart_Printf("Verify...");
		for(i=0, error=0;i<ONEPAGE_SIZE;i++) {
			if(Write_Buffer[i]!=Read_Buffer[i]) {
				Uart_Printf("Err(%d)[W:%02x, R:%02x]\n",i, Write_Buffer[i], Read_Buffer[i]);
				error ++;
			}
		}
		Uart_Printf("\n");
		
		if(error!=0) {
			Uart_Printf("Error(%d)!\n", error);
		} else {	
			Uart_Printf("OK!\n");
		}
	} else {
		Uart_Printf("Write protect is enabled...exit...\n");
	}
}



void Init_Mstick_Txdma(void)
{

	Uart_Printf("Init Mstick Tx Dma\n");

	pISR_DMA = (unsigned)Dma_P_Irq;
	rINTMSK &= ~(BIT_DMA);
	rINTSUBMSK &= ~(BIT_SUB_DMA3);
	

	rDISRC3 = DMA_TX_FIFO_ADDR;
	//	[30:0]	: PDMA3 initial source address register.
	
	rDISRCC3 = (0<<1) | (0<<0);
	// LOC[1]	: Source location, 0:AHB, 1:APB
	// INC[0]	: Address increment, 0:Increment, 1:Fixed

	rDIDST3 = MSTICK_DAT_FIFO;
	//	[30:0]	: PDMA3 initial destination address register.

	rDIDSTC3 = (1<<1) | (1<<0);
	// LOC[1]	: Source location, 0:AHB, 1:APB
	// INC[0]	: Address increment, 0:Increment, 1:Fixed

	rDCON3 = 1<<31 | 0<<30 | 1<<29 | 0<<28 | 0<<27 | 5<<24 | 1<<23 | 1<<22 | 1<<20 | (ONEPAGE_SIZE/2)<<0;
	// DMD_HS[31]	: Mode select, 0:Demand, 1:Handshake.
	// SYNC[30]		: DREQ/DACK syncronization with 0:APB, 1:AHB. 
	// INT[29]		: CURR_TC Intr set, 0:Disable, 1:intr when CURR_TC=0.
	// TSZ[28]		: Transfer size. 0: Unit transfer, 1: burst transfer of length 4.
	// SERVMODE[27]	: Single/Whole service mode select, 0:single service, 1: whole service
	// Reserved[26:24]: Reserved with 000b.
	// SWHW_SEL[23]	: Select DMA source betwwen s/w(0) and h/w(1) request.
	// RELOAD[22]	: reload on/off, 0:auto reload, 1:no reload.
	// DSZ[21:20]	: Transfer data size, 0:byte, 1:Half word, 2:Word, 3:reserved.
	// TC[19:0]		: Initial transfer counter, max 1MB.
}

void Init_Mstick_Rxdma(void)
{
	//U16 Rx_Data_Fifo[ONEPAGE_SIZE/2];	// ONEPAGE_SIZE = 512.
	
	Uart_Printf("Init Mstick Rx Dma\n");


	pISR_DMA = (unsigned)Dma_P_Irq;
	rINTMSK &= ~(BIT_DMA);
	rINTSUBMSK &= ~(BIT_SUB_DMA3);
	
	rDISRC3 = MSTICK_DAT_FIFO;	// rDAT_FIFO address.
	//	[30:0]	: PDMA3 initial source address register.
	
	rDISRCC3 = (1<<1) | (1<<0);
	// LOC[1]	: Source location, 0:AHB, 1:APB
	// INC[0]	: Address increment, 0:Increment, 1:Fixed

	rDIDST3 = DMA_RX_FIFO_ADDR;
	//	[30:0]	: PDMA3 initial destination address register.

	rDIDSTC3 = (0<<1) | (0<<0);
	// LOC[1]	: Source location, 0:AHB, 1:APB
	// INC[0]	: Address increment, 0:Increment, 1:Fixed

	rDCON3 = 1<<31 | 0<<30 | 1<<29 | 0<<28 | 0<<27 | 5<<24 | 1<<23 | 1<<22 | 1<<20 | (ONEPAGE_SIZE/2)<<0;
	// DMD_HS[31]	: Mode select, 0:Demand, 1:Handshake.
	// SYNC[30]		: DREQ/DACK syncronization with 0:APB, 1:AHB. 
	// INT[29]		: CURR_TC Intr set, 0:Disable, 1:intr when CURR_TC=0.
	// TSZ[28]		: Transfer size. 0: Unit transfer, 1: burst transfer of length 4.
	// SERVMODE[27]	: Single/Whole service mode select, 0:single service, 1: whole service
	// HWSRCSEL[26:24]: Select DMA request source for each PDMA, MSTICK: Ch0/Src6 or Ch3/Src5.
	// SWHW_SEL[23]	: Select DMA source betwwen s/w(0) and h/w(1) request.
	// RELOAD[22]	: reload on/off, 0:auto reload, 1:no reload.
	// DSZ[21:20]	: Transfer data size, 0:byte, 1:Half word, 2:Word, 3:reserved.
	// TC[19:0]		: Initial transfer counter, max 1MB.

}


void __irq Dma_P_Irq(void)
{
	if(!(rDCON3&(5<<24))) {
		Uart_Printf("DMA irq source is not Mstick!!!\n");
	}
	else {
		Irq_Mstick_Dma();
	
		rINTSUBMSK |= BIT_SUB_DMA3;
		rINTMSK|= BIT_DMA;
		ClearPending(BIT_DMA);
	}
}


void Irq_Mstick_Dma(void)
{
	Mstick_Dma_Done=1;
	Mstick_Dma_Done=1;

	//Uart_Printf("Mstick_Dma interrupt.\n");
}

int Ms_Page_Write_Dma(U32 Block_Addr, U32 Page_Addr, U8 *Write_Buffer)
{
	//int i, cnt=0, j, dma_cnt=0;
	int i, dma_cnt=0;
	//unsigned short IntStatus1, IntStatus2;
	//U8 Extra_Buffer[EXTRA_SIZE], tmps[1];
	U8 Extra_Buffer[EXTRA_SIZE];
	//U16 Chksum, htmp;
	U16 Chksum;
	
	// Check if write protect...
	if(Check_Wp()==1) {	// Write protect is enabled.
		return -1;
	}

	// Init Write data.
	for(i=0; i<ONEPAGE_SIZE; i++)
	{
		*(U8 *)(DMA_TX_FIFO_ADDR+i) = Write_Buffer[i];
	}
	
	// 1. SET R/W address in device TPC
	Mstpc_Write_Rw_Reg_Addr(0x0, 0x0, 0x10, 0x6);

	// 2. Write_Reg TPC
	Mstpc_Write_Param_Reg(Block_Addr, 0x80, Page_Addr, DE_AREA);

	// make checksum...
	for(Chksum=0, i=0; i<ONEPAGE_SIZE; i++)
	{
		Chksum += Write_Buffer[i];
	}
	//Uart_Printf("Write checksum is [%04x]\n", Chksum);
	
	// 2. Write checksum.
	Extra_Buffer[1] = (U8)(Chksum>>8);
	Extra_Buffer[0] = (U8)Chksum;
	Mstpc_Write_Status_Reg(CHKSUM_REG_START, CHKSUM_SIZE, Extra_Buffer);

	// 3. SET_CMD TPC
	Mstpc_Set_Command(BLOCK_WRITE);

	// 4.5.Get INT register
	Int_Status = Mstpc_Get_Int(1, INT_BREQ);
	//Uart_Printf("Page write cnt(%x).\n", Int_Status);

	// 6. Write Page data.
	rTP_CMD = WRITE_PAGE_DATA | ONEPAGE_SIZE;

	// Write data through DMA
	rDMASKTRIG3 = (1<<1);		// DMA On.
	Led_Display(0xf);	// GPIO LOW
	while(Mstick_Dma_Done==0) {
		dma_cnt++;
	}
	Led_Display(0x0);	// GPIO HIGH
	while(!INT_P_END);

	rDMASKTRIG3 = (0<<1);		// DMA Off.

	// 7.8.GET INT.
	Int_Status = Mstpc_Get_Int(1, INT_CED);

}



void Ms_Page_Read_Dma(U32 Block_Addr, U32 Page_Addr, U8 *Extra_Buffer, U8 *Read_Buffer)
{

	//int i, cnt=0, j, dma_cnt=0;
	int i, dma_cnt=0;
	//unsigned short IntStatus1, IntStatus2;
	//U16 Calc_Chksum, In_Chksum, htmp;
	//U8 Status_Buffer[10];
	//U32 tmps[320];
	
	for(i=0; i<ONEPAGE_SIZE; i++) *(U8 *)(DMA_RX_FIFO_ADDR+i)=0x55;

	// 1. SET R/W address in device TPC
	Mstpc_Write_Rw_Reg_Addr(0x0, 0x00, 0x10, 0x6);

	// 2. Write_Reg TPC
	Mstpc_Write_Param_Reg(Block_Addr, 0x80, Page_Addr, DE_AREA);

	// 3. SET_CMD TPC
	Mstpc_Set_Command(BLOCK_READ);

	//#if CHKSUM_WRITE==1

	// 4.5. GET_INT
	Int_Status = Mstpc_Get_Int(1, INT_BREQ|INT_CED);
	//Uart_Printf("Page read cnt(%x).\n", Int_Status);

	// 6. READ_REG, Read status register.
	//Mstpc_Read_Status_Reg(0x02,2, Status_Buffer);
	/*
	for(i=0; i<10; i++) {
		Uart_Printf("[%x]", Status_Buffer[i]);
	}
	*/

	// 7. Read Extra Data Register
	if(Int_Status==INT_BREQ|INT_CED) {
		Mstpc_Read_Status_Reg(EXTRA_REG_START,EXTRA_SIZE, Extra_Buffer);
	}

	// 8. Read Page Data
	rTP_CMD = READ_PAGE_DATA | ONEPAGE_SIZE;

	// Get data through DMA.
	
	rDMASKTRIG3 = (1<<1);		// DMA On.
	while(Mstick_Dma_Done==0) {
		dma_cnt++;
	}
	while(!INT_P_END);

	rDMASKTRIG3 = (0<<1);		// DMA Off.
	
	for(i=0; i<ONEPAGE_SIZE; i++)
	{
		Read_Buffer[i] =*(U8 *)(DMA_RX_FIFO_ADDR+i);
	}

}



void Test_Ms_Page_Dma_Read(void)
{
	U32 i;
	U32 blocknum, pagenum;
	U8 Read_Buffer[ONEPAGE_SIZE], Extra_Buffer[STATUS_SIZE];
	U16 In_Chksum, Calc_Chksum;

	Uart_Printf("\n<<Page Read Dma>>\n");
	Uart_Printf("Block number ? ");
	blocknum = Uart_GetIntNum(); 
	Uart_Printf("Page number ? ");
	pagenum = Uart_GetIntNum();
	Uart_Printf("Ms_Page_Read(%d,%d)\n", blocknum, pagenum);

	// Init Mstick Dma IRQ.
	Init_IrDA_Mstick_Irq();

	// Init Mstick Rx dma.
	Init_Mstick_Rxdma();
	// Page read through DMA.
	Ms_Page_Read_Dma(blocknum, pagenum, Extra_Buffer, Read_Buffer);

	// Calc checksum...
	for(Calc_Chksum=0, i=0; i<ONEPAGE_SIZE; i++) {
		Calc_Chksum += Read_Buffer[i];
	}
	In_Chksum = (U16)Extra_Buffer[4] | (U16)(((U16)Extra_Buffer[5])<<8);
	if(Calc_Chksum!=In_Chksum) {
		Uart_Printf("Checksum ERROR(IN:%x,Calc:%x)\n", In_Chksum, Calc_Chksum);
	}

	Uart_Printf("\nExtra data is");
	for(i=0; i<EXTRA_SIZE; i++) {
		if(!(i%16)) Uart_Printf("\n%3x:  ", i);
		Uart_Printf("[%02x]", Extra_Buffer[i]);
	}
		Uart_Printf("\nRead Page data is");	
	for(i=0; i<ONEPAGE_SIZE; i++) {
		if(!(i%16)) Uart_Printf("\n%3x:  ", i);
		Uart_Printf("[%02x]", Read_Buffer[i]);
	}
	Uart_Printf("\n");
	
}

void Test_Ms_Page_Dma_Write(void)
{
	U32 i, offset;
	U32 blocknum, pagenum;
	//U16 Write_Buffer[256];
	U8 Write_Buffer[ONEPAGE_SIZE];

	Uart_Printf("\n<<Page Write Dma>>\n");
	Uart_Printf("Block number ? ");
	blocknum = Uart_GetIntNum();
	Uart_Printf("Page number ? ");
	pagenum = Uart_GetIntNum();
	Uart_Printf("Input Data offset : ");
	offset = Uart_GetIntNum();
	Uart_Printf("Page write(%d,%d)\n", blocknum, pagenum);

	Init_IrDA_Mstick_Irq();

	for(i=0; i<ONEPAGE_SIZE; i++) {
		Write_Buffer[i]=i+offset;
		#if DEBUG_LEVEL>1
			if(!(i%16)) Uart_Printf("\n%3x:  ", i);
			Uart_Printf("[%02x]", Write_Buffer[i]);
		#endif
	}
	Uart_Printf("\n");
	
	//Uart_Printf("Block erase(%d,%d)\n", blocknum, pagenum);
	//Ms_Block_Erase(blocknum);
	
	Uart_Printf("Ms_Page_Write.\n");
	Init_Mstick_Txdma();

	if(Ms_Page_Write_Dma(blocknum, pagenum, Write_Buffer)==-1) {
		Uart_Printf("Write protect is enabled...exit...\n");
	}
}


void Write_Mstick_Format_Data(void)
{
	U32 i, error, pagenum=0, memory_cap;
	U8 Write_Buffer[ONEPAGE_SIZE], Read_Buffer[ONEPAGE_SIZE], Extra_Buffer[EXTRA_SIZE];

	Uart_Printf("\n<<Memory stick Format>>\n");

	Uart_Printf("Memory stick size select [0:32MB / 1:128MB / 2:32MBRead / 3:128MBRead] ? ");

	memory_cap = Uart_GetIntNum();

	Ms_Block_Erase(0);

	// Write 0-block, page 0-2.
	for(pagenum=0; pagenum<3; pagenum++) {
		for(i=0; i<ONEPAGE_SIZE; i++) {
			if(memory_cap%2) 	// 32MB
			Write_Buffer[i] = Format_Data_32MB[pagenum][i];
			else 	// 128MB
			Write_Buffer[i] = Format_Data_128MB[pagenum][i];
		}
		
		for(i=0; i<EXTRA_SIZE; i++){
			Extra_Buffer[i] = Format_Extra[pagenum][i];
		}

		if(memory_cap<2)
		{
			Uart_Printf("Write Block:0, Page:%d.", pagenum);
			
			if(Ms_Fmt_Page_Write(0, pagenum, Write_Buffer, Extra_Buffer)!=-1) {
				Ms_Page_Read(0, pagenum, Extra_Buffer, Read_Buffer);
				Uart_Printf("...");
				for(i=0, error=0;i<ONEPAGE_SIZE;i++) {
					if(Write_Buffer[i]!=Read_Buffer[i]) {
						//if(error%4) Uart_Printf("\n");
						//Uart_Printf("Error[W:%4x, R:%4x]\n",Write_Buffer[i], Read_Buffer[i]);
						error ++;
					}
				}
				if(error!=0) {
					Uart_Printf("Error(%d)!\n", error);
				} else {	
					Uart_Printf("OK!\n");
				}
			}else {
				Uart_Printf("Write protect is enabled...exit...\n");
			}
		}
		else
		{
			Ms_Page_Read(0, pagenum, Extra_Buffer, Read_Buffer);
			Uart_Printf("...");
			for(i=0, error=0;i<ONEPAGE_SIZE;i++) {
				if(Write_Buffer[i]!=Read_Buffer[i]) {
					//if(error%4) Uart_Printf("\n");
					//Uart_Printf("Error(%xH)[W:%4x, R:%4x]\n",i, Write_Buffer[i], Read_Buffer[i]);
					error ++;
				}
			}
			if(error!=0) {
				Uart_Printf("Error(%d)!\n", error);
			} else {	
				Uart_Printf("OK!\n");
			}

		}

	}
}


int Ms_Fmt_Page_Write(U32 Block_Addr, U32 Page_Addr, U8 *Write_Buffer, U8 *Extra_Buffer)
{
	int i, cnt=0;
	//unsigned short IntStatus1, IntStatus2;
	//static int offset=0;
	//U16 Chksum, htmp;
	U16 htmp;
	
	//Uart_Printf("write data.\n");

	// Check if write protect...
	if(Check_Wp()==1) {	// Write protect is enabled.
		return -1;
	}
	
	// 1. SET R/W address in device TPC
	Mstpc_Write_Rw_Reg_Addr(0x0, 0x0, 0x10, 0x6);

	// 2. Write_Reg TPC
	Mstpc_Write_Param_Reg(Block_Addr, PARAM_BAMD, Page_Addr, DE_AREA);

	Mstpc_Write_Status_Reg(EXTRA_REG_START, EXTRA_SIZE, Extra_Buffer);
	
	// SET_CMD TPC
	Mstpc_Set_Command(BLOCK_WRITE);

	// Get INT register
	Int_Status = Mstpc_Get_Int(1, INT_BREQ);
	//Uart_Printf("Page write cnt(%x).\n", Int_Status);

	rTP_CMD = WRITE_PAGE_DATA | ONEPAGE_SIZE;
	for(i=0; i<ONEPAGE_SIZE; i+=2)
	{
		htmp = ((U16)(Write_Buffer[i+1]))<<8 | (U8)Write_Buffer[i];
		rDAT_FIFO = htmp;
		while(!TBE);
	}
	while(!INT_P_END);

	Int_Status = Mstpc_Get_Int(1, INT_CED);
	//Uart_Printf("Page write end cnt(%x).\n", Int_Status);

}


void Test_R_W_Hard(void)
{
	//U32 i,re_num,offset;
	U32 i;
	U32 blocknum, pagenum;
	U8 Write_Buffer[ONEPAGE_SIZE];
	U8 Read_Buffer[ONEPAGE_SIZE], Extra_Buffer[STATUS_SIZE];
	U16 In_Chksum, Calc_Chksum;

	for(i=0; i<ONEPAGE_SIZE; i++) 
		{
	  	Write_Buffer[i]=i;
		}
while(1)
{
	for(blocknum=0;blocknum<8000;blocknum++)
		{
		Ms_Block_Erase(blocknum);
		for(pagenum=0; pagenum<PAGE_IN_BLOCK_NUM; pagenum++)
			{
			if(Ms_Page_Write(blocknum, pagenum, Write_Buffer)==-1)
				{
				Uart_Printf("Write protect is enabled...\n");
				}
			}
		
		for(pagenum=0; pagenum<PAGE_IN_BLOCK_NUM; pagenum++) 
			{
				Uart_Printf("\n\n\nMs_Page_Read(%d,%d)\n", blocknum, pagenum);
				Ms_Page_Read(blocknum, pagenum, Extra_Buffer, Read_Buffer);
		
				// Calc checksum...
				for(Calc_Chksum=0, i=0; i<ONEPAGE_SIZE; i++) {
					Calc_Chksum += Read_Buffer[i];
				}
				In_Chksum = (U16)Extra_Buffer[4] | (U16)(((U16)Extra_Buffer[5])<<8);
				if(Calc_Chksum!=In_Chksum) {
					while(1) Uart_Printf("Checksum ERROR(IN:%x,Calc:%x)\n", In_Chksum, Calc_Chksum);
				}
				
				Uart_Printf("Extra data is");
				for(i=0; i<EXTRA_SIZE; i++) {
					if(!(i%16)) Uart_Printf("\n%3x:  ", i);
					Uart_Printf("[%02x]", Extra_Buffer[i]);
				}
		
				Uart_Printf("\nRead Page data is"); 
				for(i=0; i<ONEPAGE_SIZE; i++) {
					//if(!(i%16)) Uart_Printf("\n%3x:  ", i);
					//Uart_Printf("[%02x]", Read_Buffer[i]);
				}
			}
		}
}
}