modemif.c

s3c24a0固件测试代码 ? ? ? ? ?啊

//===================================================================
// NAME		: modemif.c	
// DESC		: S3C24A0 DPSRAM test 
// History	: 04.15.2003 ver 0.0 ky.shim
//===================================================================

#include <stdlib.h>
#include <string.h>
#include "option.h"
#include "24a0addr.h"
#include "24a0lib.h"
#include "def.h"
#include "modemif.h"

/*	DESCRIPTION OF THE SMDK24A0A
	
	EINT12=MODEM INT
	A25=1, MODEM I/F area 
	A25=0, CS8900 area
	AEN=XrCSn1, 
	absolute address		
	0x06000000~0x07ffffff: MODEM I/F area 
	0x04000000~0x05ffffff: CS8900 area
*/

//CS Base address
#define _DPSRAM_BASE_ADDR		(0x06000000)	//XrCSn1 high
#define _CS8900_BASE_ADDR		(0x04000000)	//XrCSn1 low

//Queue start address
#define _MDM_TX_Queue			(0x06000000) 
#define _MDM_RX_Queue			(0x06000400) 
#define _AP_RX_Queue			(0x41100000)
#define _AP_TX_Queue			(0x41100400)

//Programmable IRQ port
#define _MDM_TX_Queue_Irq_Port	(0x060003ff)
#define _MDM_RX_Queue_Irq_Port	(0x060007ff) 
#define _AP_RX_Queue_Irq_Port	(0x411003ff)
#define _AP_TX_Queue_Irq_Port	(0x411007ff)

//memory backup buffer
#define _MEM_AP_RX_Buffer		(0x11000000)
#define _MEM_AP_TX_Buffer		(0x11000400)
#define _MEM_MDM_TX_Buffer		(0x11000800)
#define _MEM_MDM_RX_Buffer		(0x11000c00)

#define _DPSRAM_TXRX_BUFLEN	(0x3ff)		//Maximum 0x3ff


/*
//Minimum timing
#define MDM_IF_Tacs				(0x0)	
#define MDM_IF_Tcos				(0x0)	
#define MDM_IF_Tacc				(0x1)	
#define MDM_IF_Tcoh				(0x1)	
#define MDM_IF_Tah				(0x0)	
#define MDM_IF_Tacp				(0x0)	
#define MDM_IF_PMC				(0x0)	


//HCLK 50MHz => Max asynchronous 29MHz(34ns)
//Min Tacc >= 2x17ns=34ns because of half clock toggling
#define MDM_IF_Tacs				(0x0)	// 0clk
#define MDM_IF_Tcos				(0x1)	// 1clk //20ns // minimum 2ns,0.5ns	(tAWR,?, Address valid to write active/?)
#define MDM_IF_Tacc				(0x1)	// 3clk //60ns // minimum 5ns,17ns	(tWR,tRD, Write active/Read active)
#define MDM_IF_Tcoh				(0x1)	// 2clk //40ns // minimum 4ns,4ns 	(tDHWR,tRDH, Write data hold/Read data hold)	=> must be
#define MDM_IF_Tah				(0x1)	// 2clk //40ns // minimum 2.5ns	(?,tADH, ?/Address hold)
#define MDM_IF_Tacp				(0x0)	// 2clk //40ns
#define MDM_IF_PMC				(0x0)	// normal(1data)
*/


//Maximum
#define MDM_IF_Tacs				(0x0)	// 0clk
#define MDM_IF_Tcos				(0x3)	// 4clk
#define MDM_IF_Tacc				(0x7)	// 14clk
#define MDM_IF_Tcoh				(0x1)	// 1clk
#define MDM_IF_Tah				(0x0)	// 0clk
#define MDM_IF_Tacp				(0x3)	// 6clk
#define MDM_IF_PMC				(0x0)	// normal(1data)



#define START 0xff
#define STOP 0x00
#define REPEAT 50

volatile int Tx_Done_Flag;
volatile int Rx_Done_Flag;
volatile int Start_Detect,End_Detect;

void MODEM_IF_Init(void);
void AP_IRQ_Init(void);
void MODEM_IRQ_Init(void);
void AP_Tx(void);
void AP_Rx(void);
void MODEM_Tx(void);
void MODEM_Rx(void);
void AP_Tx_Rx(void);
void MDM_Tx_Rx(void);


void __irq AP_Int_Rx(void);
void __irq MODEM_Int_Rx(void);

void Ch19_MODEM(void)
{
	int mode;
	MODEM_IF_Init();
	Delay(0);


	
	while(1)
	{
		Uart_Printf("\n1:AP side TX  2:Modem side TX 3:AP side RX  4:Modem side RX 5:AP TX/RX 6:Modem TX/RX 7:exit");
		//Uart_Printf("\n1:AP side TX  2:Modem side TX 3:AP side RX  4:Modem side RX 7:exit");		
		mode=Uart_Getch();
		if(mode == '7') break;		
		Uart_Printf("\n");

		switch(mode)
		{
		case '1':
			//AP_IRQ_Init(void);
			AP_Tx();
			break;
	
		case '2':
			//MODEM_IRQ_Init();
			MODEM_Tx();
			break;

		case '3':
			AP_IRQ_Init();
			AP_Rx();
			break;
	
		case '4':
			MODEM_IRQ_Init();
			MODEM_Rx();
			break;

		case '5':
			//AP_IRQ_Init();
			AP_Tx_Rx();			
			break;

		case '6':
			//MODEM_IRQ_Init();
			MDM_Tx_Rx();			
			break;

		default:
			break;
		}
		
	}
}
void MODEM_IF_Init(void)
{
	//Initialize S3C24A0A for modem I/F
	rGPCON_M=rGPCON_M&~(3<<2)|(2<<2);	//EINT12(GP12)=MODEM_INT
//	rENPU=rENPU&~(1<<11|1<<4)|(1<<11|1<<4);		//Disable pull-up ftn (XmiDATA &XrDATA)

	rSROM_BW=rSROM_BW&~(0xf<<3)|(0x0<<3);	  //nGCS1=nUB/nLB,nWAIT,8-bit

	rSROM_BC1=((MDM_IF_Tacs<<13)+(MDM_IF_Tcos<<11)+(MDM_IF_Tacc<<8)+(MDM_IF_Tcoh<<6)\
	+(MDM_IF_Tah<<4)+(MDM_IF_Tacp<<2)+(MDM_IF_PMC));	
}

void AP_IRQ_Init(void)
{
	rINT2AP=0x3ff;
	rINT2MDM=0x7ff;
	Uart_Printf("rINT2AP,rINT2MDM 0x%3x 0x%3x\n",rINT2AP,rINT2MDM);
	//programmable IRQ port address

	ClearPending(BIT_MODEM);//to clear the previous pending states
	
	pISR_MODEM= (unsigned)AP_Int_Rx;//MODEM_INT
	rINTMSK=~(BIT_MODEM);  

}

void MODEM_IRQ_Init(void)
{
	rINT2AP=0x3ff;
	rINT2MDM=0x7ff;
	Uart_Printf("rINT2AP,rINT2MDM 0x%3x 0x%3x\n",rINT2AP,rINT2MDM);
	//programmable IRQ port address
/*
	rEXTINTCR1=rEXTINTCR1&~(7<<4)|(2<<4);
	//EINT12(GP12)=MODEM_INT=falling edge
*/	
	rEXTINTC2=rEXTINTC2&~(7<<4)|(2<<4);
	//EINT12(GP12)=MODEM_INT=falling edge

	ClearPending(BIT_EINT11_14);//to clear the previous pending states
	
	pISR_EINT11_14= (unsigned)MODEM_Int_Rx;//MODEM_INT
	rINTMSK=~(BIT_EINT11_14);  
	rEINTMASK=rEINTMASK&~(1<<12)|(0<<12); //EINTMASK[12]=enable interrupt.
}


void AP_Tx(void)
{

	unsigned int i;
	unsigned char *txdata;

	Tx_Done_Flag = 0;

	Uart_TxEmpty(0);
	Uart_Printf("[ AP Tx test using Modem I/F ]\n");

	// Initialize TX Buffer ----------------INIT
	txdata = (unsigned char *)(_MEM_AP_TX_Buffer);
	for(i=0;i<_DPSRAM_TXRX_BUFLEN;i++)
		*(txdata+i) = i; 
	txdata = (unsigned char *)(_MEM_AP_TX_Buffer);

	Uart_Printf("[ MODEM RX first, then start any key]\n");
	Uart_Getch();


	//Request irq to MODEM--------------START
	Uart_Printf("[ AP Tx Start]\n");
	*(unsigned char *)(_AP_TX_Queue_Irq_Port)=0xff;

	// Write data into DPSRAM
	Uart_Printf("[ AP Writing.......]\n");
	for(i=0;i<_DPSRAM_TXRX_BUFLEN;i++)
	{
		*(unsigned char *)(_AP_TX_Queue+i) = *(txdata+i); 				// put the data into fifo		
		Tx_Done_Flag++;
//		if(Tx_Done_Flag == _DPSRAM_TXRX_BUFLEN)
//		{
//			txdata = (unsigned char *)(_MEM_AP_TX_Buffer);
//		}
	}

	//Request irq to MODEM---------------STOP
	Uart_Printf("[ AP Tx Stop]\n");
	*(unsigned char *)(_AP_TX_Queue_Irq_Port)=0x00;

/*
	txdata = (unsigned char *)(_MEM_AP_TX_Buffer);
	for(i=0;i<_DPSRAM_TXRX_BUFLEN;i++)
		Uart_Printf("0x%x=%03x	",(txdata+i),*(txdata+i));	
*/		

}

void MODEM_Rx(void)
{

	unsigned int i;
	unsigned char *rxdata;

	Rx_Done_Flag = 0;
	Start_Detect = 0;
	End_Detect = 0;
	Uart_TxEmpty(0);

	Uart_Printf("[ MODEM Rx test using Modem I/F ]\n");

	// Zero Initialize RX Buffer ----------------INIT
	rxdata = (unsigned char *)(_MEM_MDM_RX_Buffer);
	for(i=0;i<_DPSRAM_TXRX_BUFLEN;i++)
		*(rxdata+i) = 0x0; 
	rxdata = (unsigned char *)(_MEM_MDM_RX_Buffer);

	Uart_Printf("[ MODEM RX Start]\n");
	Uart_Getch();

	while(!Rx_Done_Flag);
	rINTMSK|=(BIT_EINT11_14);  
	rEINTMASK=rEINTMASK&~(1<<12)|(1<<12); //EINTMASK[12]=MASK interrupt.	

	Uart_Printf("[ MODEM Rx End]\n");

	rxdata = (unsigned char *)(_MEM_MDM_RX_Buffer);
	for(i=0;i<_DPSRAM_TXRX_BUFLEN;i++)
		Uart_Printf(".");
		//Uart_Printf("0x%x=%03x	",(rxdata+i),*(rxdata+i));

}

void __irq MODEM_Int_Rx(void)
{
	unsigned int i;
	unsigned char *rxdata,temp;	
	unsigned int queue_depth=0;
	
	//Clear irq from AP--------------START

	temp=(*(unsigned char *)_MDM_RX_Queue_Irq_Port)&0xff;
	rEINTPEND=(1<<12); //EINTPEND[12] is cleared.
	ClearPending(BIT_EINT11_14);	
	rINTMSK|=(BIT_EINT11_14);  
	rEINTMASK=rEINTMASK&~(1<<12)|(1<<12); //EINTMASK[12]=MASK interrupt.	

	if( temp == 0xff)
	{

	Uart_Printf("[ AP Tx start Detect: %d ]\n",Start_Detect++);

	}
	else if(temp == 0x00)