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📄 24a0lib.txt

📁 s3c24a0固件测试代码 ? ? ? ? ?啊 
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000b14  e59f1328          LDR      r1,|L1.3652|
000b18  e5810004          STR      r0,[r1,#4]
;;;492    	rSROM_BC1=(acc1<<8)|(1<<12);
000b1c  e3a00d40          MOV      r0,#0x1000
000b20  e1800405          ORR      r0,r0,r5,LSL #8
000b24  e5810008          STR      r0,[r1,#8]
;;;493    	rSROM_BC2=(acc2<<8)|(1<<12);
000b28  e3a00d40          MOV      r0,#0x1000
000b2c  e1800406          ORR      r0,r0,r6,LSL #8
000b30  e581000c          STR      r0,[r1,#0xc]
;;;494    	break;
000b34  ea000000          B        |L1.2876|
;;;495    	default:
;;;496    	break;
                  |L1.2872|
000b38  e1a00000          NOP      
;;;497    	}	
;;;498    
;;;499    }
                  |L1.2876|
000b3c  e28dd028          ADD      sp,sp,#0x28
000b40  e8bd81f0          LDMFD    sp!,{r4-r8,pc}
                          ENDP

                  PreChangeSromParameter PROC
;;;501    void PreChangeSromParameter(int bank)
;;;502    {
000b44  e3500000          CMP      r0,#0
;;;503        switch(bank)
000b48  0a000006          BEQ      |L1.2920|
000b4c  e3500001          CMP      r0,#1
000b50  0a00000a          BEQ      |L1.2944|
000b54  e3500002          CMP      r0,#2
000b58  0a00000e          BEQ      |L1.2968|
000b5c  e3500003          CMP      r0,#3
000b60  1a000020          BNE      |L1.3048|
000b64  ea000011          B        |L1.2992|
;;;504        {
;;;505        case 0:
;;;506        	rSROM_BC0=rSROM_BC0|(7<<8);//acc0 20clks
                  |L1.2920|
000b68  e59f12d4          LDR      r1,|L1.3652|
000b6c  e5911004          LDR      r1,[r1,#4]
000b70  e3811e70          ORR      r1,r1,#0x700
000b74  e59f22c8          LDR      r2,|L1.3652|
000b78  e5821004          STR      r1,[r2,#4]
;;;507    	break;
000b7c  ea00001a          B        |L1.3052|
;;;508        case 1:	
;;;509    	rSROM_BC1=rSROM_BC1|(7<<8);//acc1 20clks
                  |L1.2944|
000b80  e59f12bc          LDR      r1,|L1.3652|
000b84  e5911008          LDR      r1,[r1,#8]
000b88  e3811e70          ORR      r1,r1,#0x700
000b8c  e59f22b0          LDR      r2,|L1.3652|
000b90  e5821008          STR      r1,[r2,#8]
;;;510    	break;
000b94  ea000014          B        |L1.3052|
;;;511        case 2:	
;;;512       	rSROM_BC2=rSROM_BC2|(7<<8);//acc2 20clks
                  |L1.2968|
000b98  e59f12a4          LDR      r1,|L1.3652|
000b9c  e591100c          LDR      r1,[r1,#0xc]
000ba0  e3811e70          ORR      r1,r1,#0x700
000ba4  e59f2298          LDR      r2,|L1.3652|
000ba8  e582100c          STR      r1,[r2,#0xc]
;;;513    	break;
000bac  ea00000e          B        |L1.3052|
;;;514        case 3:
;;;515    	rSROM_BC0=rSROM_BC0|(7<<8);//acc0 20clks
                  |L1.2992|
000bb0  e59f128c          LDR      r1,|L1.3652|
000bb4  e5911004          LDR      r1,[r1,#4]
000bb8  e3811e70          ORR      r1,r1,#0x700
000bbc  e59f2280          LDR      r2,|L1.3652|
000bc0  e5821004          STR      r1,[r2,#4]
;;;516    	rSROM_BC1=rSROM_BC1|(7<<8);//acc1 20clks
000bc4  e1a01002          MOV      r1,r2
000bc8  e5911008          LDR      r1,[r1,#8]
000bcc  e3811e70          ORR      r1,r1,#0x700
000bd0  e5821008          STR      r1,[r2,#8]
;;;517    	rSROM_BC2=rSROM_BC2|(7<<8);//acc2 20clks
000bd4  e1a01002          MOV      r1,r2
000bd8  e591100c          LDR      r1,[r1,#0xc]
000bdc  e3811e70          ORR      r1,r1,#0x700
000be0  e582100c          STR      r1,[r2,#0xc]
;;;518    	break;
000be4  ea000000          B        |L1.3052|
;;;519        default:
;;;520    	break;
                  |L1.3048|
000be8  e1a00000          NOP      
;;;521        }	
;;;522    }
                  |L1.3052|
000bec  e12fff1e          BX       lr
                          ENDP

                  ChangeSdramParameter PROC
;;;524    void ChangeSdramParameter(unsigned int hclk)
;;;525    {
000bf0  e92d41f0          STMFD    sp!,{r4-r8,lr}
000bf4  e24dd028          SUB      sp,sp,#0x28
000bf8  e1a04000          MOV      r4,r0
;;;526    
;;;527        int ras1, rc1, rcd1, rp1;
;;;528    
;;;529        //(Period of hclk(nano second))*1000 =1000000/(hclk/1000000.)
;;;530        ras1 = (int)(MINRAS1/(1000000/(hclk/1000000.))+0.5)+1-1;
000bfc  e1a00004          MOV      r0,r4
000c00  ebfffffe          BL       _dfltu
000c04  e88d0003          STMIA    sp,{r0,r1}
000c08  e24f0f63          ADR      r0,|L1.2692|
000c0c  e890000c          LDMIA    r0,{r2,r3}
000c10  e59d0000          LDR      r0,[sp,#0]
000c14  ebfffffe          BL       _ddiv
000c18  e58d0008          STR      r0,[sp,#8]
000c1c  e58d100c          STR      r1,[sp,#0xc]
000c20  e24f0f69          ADR      r0,|L1.2692|
000c24  e890000c          LDMIA    r0,{r2,r3}
000c28  e59d0008          LDR      r0,[sp,#8]
000c2c  ebfffffe          BL       _drdiv
000c30  e58d0010          STR      r0,[sp,#0x10]
000c34  e58d1014          STR      r1,[sp,#0x14]
000c38  e28f0f82          ADR      r0,|L1.3656|
000c3c  e890000c          LDMIA    r0,{r2,r3}
000c40  e59d0010          LDR      r0,[sp,#0x10]
000c44  ebfffffe          BL       _drdiv
000c48  e58d0018          STR      r0,[sp,#0x18]
000c4c  e58d101c          STR      r1,[sp,#0x1c]
000c50  e51f01c4          LDR      r0,|L1.2708|
000c54  e890000c          LDMIA    r0,{r2,r3}
000c58  e59d0018          LDR      r0,[sp,#0x18]
000c5c  ebfffffe          BL       _dadd
000c60  e58d0020          STR      r0,[sp,#0x20]
000c64  e58d1024          STR      r1,[sp,#0x24]
000c68  ebfffffe          BL       _dfix
000c6c  e1a05000          MOV      r5,r0
;;;531        rc1 = (int)(MINRC1/(1000000/(hclk/1000000.))+0.5)+1-1;
000c70  e1a00004          MOV      r0,r4
000c74  ebfffffe          BL       _dfltu
000c78  e88d0003          STMIA    sp,{r0,r1}
000c7c  e24f0f80          ADR      r0,|L1.2692|
000c80  e890000c          LDMIA    r0,{r2,r3}
000c84  e59d0000          LDR      r0,[sp,#0]
000c88  ebfffffe          BL       _ddiv
000c8c  e58d0008          STR      r0,[sp,#8]
000c90  e58d100c          STR      r1,[sp,#0xc]
000c94  e24f0f86          ADR      r0,|L1.2692|
000c98  e890000c          LDMIA    r0,{r2,r3}
000c9c  e59d0008          LDR      r0,[sp,#8]
000ca0  ebfffffe          BL       _drdiv
000ca4  e58d0010          STR      r0,[sp,#0x10]
000ca8  e58d1014          STR      r1,[sp,#0x14]
000cac  e28f0f67          ADR      r0,|L1.3664|
000cb0  e890000c          LDMIA    r0,{r2,r3}
000cb4  e59d0010          LDR      r0,[sp,#0x10]
000cb8  ebfffffe          BL       _drdiv
000cbc  e58d0018          STR      r0,[sp,#0x18]
000cc0  e58d101c          STR      r1,[sp,#0x1c]
000cc4  e51f0238          LDR      r0,|L1.2708|
000cc8  e890000c          LDMIA    r0,{r2,r3}
000ccc  e59d0018          LDR      r0,[sp,#0x18]
000cd0  ebfffffe          BL       _dadd
000cd4  e58d0020          STR      r0,[sp,#0x20]
000cd8  e58d1024          STR      r1,[sp,#0x24]
000cdc  ebfffffe          BL       _dfix
000ce0  e1a06000          MOV      r6,r0
;;;532        rcd1 = (int)(MINRCD1/(1000000/(hclk/1000000.))+0.5)+1-1;
000ce4  e1a00004          MOV      r0,r4
000ce8  ebfffffe          BL       _dfltu
000cec  e88d0003          STMIA    sp,{r0,r1}
000cf0  e24f0f9d          ADR      r0,|L1.2692|
000cf4  e890000c          LDMIA    r0,{r2,r3}
000cf8  e59d0000          LDR      r0,[sp,#0]
000cfc  ebfffffe          BL       _ddiv
000d00  e58d0008          STR      r0,[sp,#8]
000d04  e58d100c          STR      r1,[sp,#0xc]
000d08  e24f0fa3          ADR      r0,|L1.2692|
000d0c  e890000c          LDMIA    r0,{r2,r3}
000d10  e59d0008          LDR      r0,[sp,#8]
000d14  ebfffffe          BL       _drdiv
000d18  e58d0010          STR      r0,[sp,#0x10]
000d1c  e58d1014          STR      r1,[sp,#0x14]
000d20  e28f0f4c          ADR      r0,|L1.3672|
000d24  e890000c          LDMIA    r0,{r2,r3}
000d28  e59d0010          LDR      r0,[sp,#0x10]
000d2c  ebfffffe          BL       _drdiv
000d30  e58d0018          STR      r0,[sp,#0x18]
000d34  e58d101c          STR      r1,[sp,#0x1c]
000d38  e24f0ea7          ADR      r0,|L1.720|
000d3c  e890000c          LDMIA    r0,{r2,r3}
000d40  e59d0018          LDR      r0,[sp,#0x18]
000d44  ebfffffe          BL       _dadd
000d48  e58d0020          STR      r0,[sp,#0x20]
000d4c  e58d1024          STR      r1,[sp,#0x24]
000d50  ebfffffe          BL       _dfix
000d54  e1a07000          MOV      r7,r0
;;;533        rp1 = (int)(MINRP1/(1000000/(hclk/1000000.))+0.5)+1-1;
000d58  e1a00004          MOV      r0,r4
000d5c  ebfffffe          BL       _dfltu
000d60  e88d0003          STMIA    sp,{r0,r1}
000d64  e24f0fba          ADR      r0,|L1.2692|
000d68  e890000c          LDMIA    r0,{r2,r3}
000d6c  e59d0000          LDR      r0,[sp,#0]
000d70  ebfffffe          BL       _ddiv
000d74  e58d0008          STR      r0,[sp,#8]
000d78  e58d100c          STR      r1,[sp,#0xc]
000d7c  e24f0fc0          ADR      r0,|L1.2692|
000d80  e890000c          LDMIA    r0,{r2,r3}
000d84  e59d0008          LDR      r0,[sp,#8]
000d88  ebfffffe          BL       _drdiv
000d8c  e58d0010          STR      r0,[sp,#0x10]
000d90  e58d1014          STR      r1,[sp,#0x14]
000d94  e28f00bc          ADR      r0,|L1.3672|
000d98  e890000c          LDMIA    r0,{r2,r3}
000d9c  e59d0010          LDR      r0,[sp,#0x10]
000da0  ebfffffe          BL       _drdiv
000da4  e58d0018          STR      r0,[sp,#0x18]
000da8  e58d101c          STR      r1,[sp,#0x1c]
000dac  e51f0320          LDR      r0,|L1.2708|
000db0  e890000c          LDMIA    r0,{r2,r3}
000db4  e59d0018          LDR      r0,[sp,#0x18]
000db8  ebfffffe          BL       _dadd
000dbc  e58d0020          STR      r0,[sp,#0x20]
000dc0  e58d1024          STR      r1,[sp,#0x24]
000dc4  ebfffffe          BL       _dfix
000dc8  e1a08000          MOV      r8,r0
;;;534    	
;;;535        rSDRAM_REFRESH= (REFPER/100.)*hclk/1000000;	
000dcc  e1a00004          MOV      r0,r4
000dd0  ebfffffe          BL       _dfltu
000dd4  e58d0010          STR      r0,[sp,#0x10]
000dd8  e58d1014          STR      r1,[sp,#0x14]
000ddc  e28f007c          ADR      r0,|L1.3680|
000de0  e890000c          LDMIA    r0,{r2,r3}
000de4  e59d0010          LDR      r0,[sp,#0x10]
000de8  ebfffffe          BL       _dmul
000dec  e58d0018          STR      r0,[sp,#0x18]
000df0  e58d101c          STR      r1,[sp,#0x1c]
000df4  e24f0fde          ADR      r0,|L1.2692|
000df8  e890000c          LDMIA    r0,{r2,r3}
000dfc  e59d0018          LDR      r0,[sp,#0x18]
000e00  ebfffffe          BL       _ddiv
000e04  e58d0020          STR      r0,[sp,#0x20]
000e08  e58d1024          STR      r1,[sp,#0x24]
000e0c  ebfffffe          BL       _dfixu
000e10  e59f1050          LDR      r1,|L1.3688|
000e14  e5810008          STR      r0,[r1,#8]
;;;536        rSDRAM_BANKCFG= (rSDRAM_BANKCFG&~(0xfff00))|(ras1<<16)|(rc1<<12)|(rcd1<<10)|(rp1<<8);
000e18  e1a00001          MOV      r0,r1
000e1c  e5900000          LDR      r0,[r0,#0]
000e20  e3c00af0          BIC      r0,r0,#0xf0000
000e24  e3c00cff          BIC      r0,r0,#0xff00
000e28  e1800805          ORR      r0,r0,r5,LSL #16
000e2c  e1800606          ORR      r0,r0,r6,LSL #12
000e30  e1800507          ORR      r0,r0,r7,LSL #10
000e34  e1800408          ORR      r0,r0,r8,LSL #8
000e38  e5810000          STR      r0,[r1,#0]
;;;537    
;;;538    }
000e3c  e28dd028          ADD      sp,sp,#0x28
000e40  e8bd81f0          LDMFD    sp!,{r4-r8,pc}
                  |L1.3652|
000e44  40c20000          DCD      0x40c20000
                  |L1.3656|
000e48  00000000          DCFD     0x40e5f90000000000 ; 45000.0
000e4c  40e5f900  
                  |L1.3664|
000e50  00000000          DCFD     0x40efbd0000000000 ; 65000.0
000e54  40efbd00  
                  |L1.3672|
000e58  00000000          DCFD     0x40d3880000000000 ; 20000.0
000e5c  40d38800  
                  |L1.3680|
000e60  33333333          DCFD     0x401f333333333333
000e64  401f3333  
                  |L1.3688|
000e68  40c40000          DCD      0x40c40000
                          ENDP

                  PreChangeSdramParameter PROC
;;;540    void PreChangeSdramParameter(void)
;;;541    {
000e6c  e59f001c          LDR      r0,|L1.3728|
;;;542    	rSDRAM_REFRESH =MINREFCYC;
000e70  e51f1010          LDR      r1,|L1.3688|
000e74  e5810008          STR      r0,[r1,#8]
;;;543    	rSDRAM_BANKCFG =rSDRAM_BANKCFG|(15<<16)|(15<<12)|(3<<10)|(3<<8);//ras1:16clks, rc1:16clks, rcd1:4clks, rp1:4clks
000e78  e1c10000          BIC      r0,r1,r0
000e7c  e5900000          LDR      r0,[r0,#0]
000e80  e3800af0          ORR      r0,r0,#0xf0000
000e84  e3800cff          ORR      r0,r0,#0xff00
000e88  e5810000          STR      r0,[r1,#0]
;;;544    }
000e8c  e12fff1e          BX       lr
                  |L1.3728|
000e90  00000186          DCD      0x00000186
                          ENDP



                          AREA ||.data||, DATA, ALIGN=2

                  ||.data$0||
                  mallocPt
                          DCD      ||Image$$RW$$Limit||
                  delayLoopCount
    

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