📄 uart1.txt
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; generated by ARM C Compiler, ADS1.2 [Build 842]
; commandline [-errors .\err\uart1.err -O0 -asm -g+ -cpu 5TEJ -fs -Wd -Ec -I.\include "-IC:\Program Files\ARM\ADSv1_2\INCLUDE"]
CODE32
AREA ||.text||, CODE, READONLY
Uart1_TxInt PROC
;;;39 void __irq Uart1_TxInt(void)
;;;40 {
|L1.0|
000000 e92d0007 STMFD sp!,{r0-r2}
;;;41 rINTSUBMSK|=(BIT_SUB_RXD1|BIT_SUB_TXD1|BIT_SUB_ERR1); // Just for the safety
000004 e59f0144 LDR r0,|L1.336|
000008 e590001c LDR r0,[r0,#0x1c]
00000c e3800038 ORR r0,r0,#0x38
000010 e59f1138 LDR r1,|L1.336|
000014 e581001c STR r0,[r1,#0x1c]
;;;42 if(*uart1TxStr != '\0')
000018 e59f0134 LDR r0,|L1.340|
00001c e5900000 LDR r0,[r0,#0] ; uart1TxStr
000020 e5d00000 LDRB r0,[r0,#0]
000024 e3500000 CMP r0,#0
000028 0a000017 BEQ |L1.140|
;;;43 {
;;;44 WrUTXH1(*uart1TxStr++);
00002c e59f0120 LDR r0,|L1.340|
000030 e5901000 LDR r1,[r0,#0] ; uart1TxStr
000034 e5d10000 LDRB r0,[r1,#0]
000038 e2811001 ADD r1,r1,#1
00003c e59f2110 LDR r2,|L1.340|
000040 e5821000 STR r1,[r2,#0] ; uart1TxStr
000044 e59f110c LDR r1,|L1.344|
000048 e5c10020 STRB r0,[r1,#0x20]
;;;45 ClearPending(BIT_UART1); // Clear master pending
00004c e3a00880 MOV r0,#0x800000
000050 e59f10f8 LDR r1,|L1.336|
000054 e5810000 STR r0,[r1,#0]
000058 e1c10000 BIC r0,r1,r0
00005c e5900010 LDR r0,[r0,#0x10]
000060 e5810010 STR r0,[r1,#0x10]
000064 e1a00001 MOV r0,r1
000068 e5900010 LDR r0,[r0,#0x10]
;;;46 rSUBSRCPND=(BIT_SUB_TXD1);
00006c e3a00010 MOV r0,#0x10
000070 e1c11000 BIC r1,r1,r0
000074 e5810018 STR r0,[r1,#0x18]
;;;47 rINTSUBMSK&=~(BIT_SUB_TXD1); // Unmask sub int
000078 e1c10000 BIC r0,r1,r0
00007c e590001c LDR r0,[r0,#0x1c]
000080 e3c00010 BIC r0,r0,#0x10
000084 e581001c STR r0,[r1,#0x1c]
000088 ea000011 B |L1.212|
;;;48 }
;;;49 else
;;;50 {
;;;51 isTxInt=0;
|L1.140|
00008c e3a00000 MOV r0,#0
000090 e59f10c4 LDR r1,|L1.348|
000094 e5810000 STR r0,[r1,#0] ; isTxInt
;;;52 ClearPending(BIT_UART1); // Clear master pending
000098 e3a00880 MOV r0,#0x800000
00009c e59f10ac LDR r1,|L1.336|
0000a0 e5810000 STR r0,[r1,#0]
0000a4 e1c10000 BIC r0,r1,r0
0000a8 e5900010 LDR r0,[r0,#0x10]
0000ac e5810010 STR r0,[r1,#0x10]
0000b0 e1a00001 MOV r0,r1
0000b4 e5900010 LDR r0,[r0,#0x10]
;;;53 rSUBSRCPND=(BIT_SUB_TXD1);
0000b8 e3a00010 MOV r0,#0x10
0000bc e1c11000 BIC r1,r1,r0
0000c0 e5810018 STR r0,[r1,#0x18]
;;;54 rINTMSK|=(BIT_UART1); // mask int
0000c4 e1c10000 BIC r0,r1,r0
0000c8 e5900008 LDR r0,[r0,#8]
0000cc e3800880 ORR r0,r0,#0x800000
0000d0 e5810008 STR r0,[r1,#8]
;;;55 }
;;;56 }
|L1.212|
0000d4 e8bd0007 LDMFD sp!,{r0-r2}
0000d8 e25ef004 SUBS pc,lr,#4
ENDP
__sub_Uart1_RxInt PROC
;;;59 void __sub_Uart1_RxInt(void)
;;;60 {
0000dc e92d4008 STMFD sp!,{r3,lr}
;;;61 if(RdURXH1()!='\r')
0000e0 e59f0070 LDR r0,|L1.344|
0000e4 e5d00024 LDRB r0,[r0,#0x24]
0000e8 e350000d CMP r0,#0xd
0000ec 0a00000d BEQ |L1.296|
;;;62 {
;;;63 Uart_Printf("%c",RdURXH1());
0000f0 e59f0060 LDR r0,|L1.344|
0000f4 e5d00024 LDRB r0,[r0,#0x24]
0000f8 e1a01000 MOV r1,r0
0000fc e28f005c ADR r0,|L1.352|
000100 ebfffffe BL _printf
;;;64 *uart1RxStr++ =(char) RdURXH1();
000104 e59f004c LDR r0,|L1.344|
000108 e5d01024 LDRB r1,[r0,#0x24]
00010c e59f0050 LDR r0,|L1.356|
000110 e5900000 LDR r0,[r0,#0] ; uart1RxStr
000114 e5c01000 STRB r1,[r0,#0]
000118 e2800001 ADD r0,r0,#1
00011c e59f1040 LDR r1,|L1.356|
000120 e5810000 STR r0,[r1,#0] ; uart1RxStr
000124 ea000008 B |L1.332|
;;;65 }
;;;66 else
;;;67 {
;;;68 isRxInt=0;
|L1.296|
000128 e3a00000 MOV r0,#0
00012c e59f1034 LDR r1,|L1.360|
000130 e5810000 STR r0,[r1,#0] ; isRxInt
;;;69 *uart1RxStr='\0';
000134 e3a00000 MOV r0,#0
000138 e59f1024 LDR r1,|L1.356|
00013c e5911000 LDR r1,[r1,#0] ; uart1RxStr
000140 e5c10000 STRB r0,[r1,#0]
;;;70 Uart_Printf("\n");
000144 e28f0020 ADR r0,|L1.364|
000148 ebfffffe BL _printf
;;;71 }
;;;72 }
|L1.332|
00014c e8bd8008 LDMFD sp!,{r3,pc}
|L1.336|
000150 40200000 DCD 0x40200000
|L1.340|
000154 00000000 DCD ||.bss$2||
|L1.344|
000158 44404000 DCD 0x44404000
|L1.348|
00015c 00000000 DCD isTxInt
|L1.352|
000160 00006325 DCB "%c\0\0"
|L1.356|
000164 00000004 DCD ||.bss$2|| + 4
|L1.360|
000168 00000000 DCD isRxInt
|L1.364|
00016c 0000000a DCB "\n\0\0\0"
ENDP
__sub_Uart1_RxErrInt PROC
;;;86 void __sub_Uart1_RxErrInt(void)
;;;87 {
000170 e92d4008 STMFD sp!,{r3,lr}
;;;88 switch(rUERSTAT1)//to clear and check the status of register bits
000174 e51f0024 LDR r0,|L1.344|
000178 e5900014 LDR r0,[r0,#0x14]
00017c e3500031 CMP r0,#0x31
000180 0a000006 BEQ |L1.416|
000184 e3500032 CMP r0,#0x32
000188 0a000007 BEQ |L1.428|
00018c e3500034 CMP r0,#0x34
000190 0a000008 BEQ |L1.440|
000194 e3500038 CMP r0,#0x38
000198 1a00000c BNE |L1.464|
00019c ea000008 B |L1.452|
;;;89 {
;;;90 case '1':
;;;91 Uart_Printf("Overrun error\n");
|L1.416|
0001a0 e28f003c ADR r0,|L1.484|
0001a4 ebfffffe BL _printf
;;;92 break;
0001a8 ea000009 B |L1.468|
;;;93 case '2':
;;;94 Uart_Printf("Parity error\n");
|L1.428|
0001ac e28f0040 ADR r0,|L1.500|
0001b0 ebfffffe BL _printf
;;;95 break;
0001b4 ea000006 B |L1.468|
;;;96 case '4':
;;;97 Uart_Printf("Frame error\n");
|L1.440|
0001b8 e28f0044 ADR r0,|L1.516|
0001bc ebfffffe BL _printf
;;;98 break;
0001c0 ea000003 B |L1.468|
;;;99 case '8':
;;;100 Uart_Printf("Breake detect\n");
|L1.452|
0001c4 e28f0048 ADR r0,|L1.532|
0001c8 ebfffffe BL _printf
;;;101 break;
0001cc ea000000 B |L1.468|
;;;102 default :
;;;103 break;
|L1.464|
0001d0 e1a00000 NOP
;;;104 }
;;;105 isRxInt=0;
|L1.468|
0001d4 e3a00000 MOV r0,#0
0001d8 e51f1078 LDR r1,|L1.360|
0001dc e5810000 STR r0,[r1,#0] ; isRxInt
;;;106 }
0001e0 e8bd8008 LDMFD sp!,{r3,pc}
|L1.484|
0001e4 7265764f DCB "Over"
0001e8 206e7572 DCB "run "
0001ec 6f727265 DCB "erro"
0001f0 00000a72 DCB "r\n\0\0"
|L1.500|
0001f4 69726150 DCB "Pari"
0001f8 65207974 DCB "ty e"
0001fc 726f7272 DCB "rror"
000200 0000000a DCB "\n\0\0\0"
|L1.516|
000204 6d617246 DCB "Fram"
000208 72652065 DCB "e er"
00020c 0a726f72 DCB "ror\n"
000210 00000000 DCB "\0\0\0\0"
|L1.532|
000214 61657242 DCB "Brea"
000218 6420656b DCB "ke d"
00021c 63657465 DCB "etec"
000220 00000a74 DCB "t\n\0\0"
ENDP
Uart1_RxIntOrErr PROC
;;;74 void __irq Uart1_RxIntOrErr(void)
;;;75 {
000224 e92d500f STMFD sp!,{r0-r3,r12,lr}
;;;76 rINTSUBMSK|=(BIT_SUB_RXD1|BIT_SUB_TXD1|BIT_SUB_ERR1);
000228 e51f00e0 LDR r0,|L1.336|
00022c e590001c LDR r0,[r0,#0x1c]
000230 e3800038 ORR r0,r0,#0x38
000234 e51f10ec LDR r1,|L1.336|
000238 e581001c STR r0,[r1,#0x1c]
;;;77 if(rSUBSRCPND&BIT_SUB_RXD1) __sub_Uart1_RxInt();
00023c e1a00001 MOV r0,r1
000240 e5900018 LDR r0,[r0,#0x18]
000244 e3100008 TST r0,#8
000248 0a000001 BEQ |L1.596|
00024c ebfffffe BL __sub_Uart1_RxInt
000250 ea000000 B |L1.600|
;;;78 else __sub_Uart1_RxErrInt();
|L1.596|
000254 ebfffffe BL __sub_Uart1_RxErrInt
;;;79
;;;80 ClearPending(BIT_UART1);
|L1.600|
000258 e3a00880 MOV r0,#0x800000
00025c e51f1114 LDR r1,|L1.336|
000260 e5810000 STR r0,[r1,#0]
000264 e1c10000 BIC r0,r1,r0
000268 e5900010 LDR r0,[r0,#0x10]
00026c e5810010 STR r0,[r1,#0x10]
000270 e1a00001 MOV r0,r1
000274 e5900010 LDR r0,[r0,#0x10]
;;;81 rSUBSRCPND=(BIT_SUB_RXD1|BIT_SUB_ERR1); // Clear Sub int pending
000278 e3a00028 MOV r0,#0x28
00027c e1c11000 BIC r1,r1,r0
000280 e5810018 STR r0,[r1,#0x18]
;;;82 rINTSUBMSK&=~(BIT_SUB_RXD1|BIT_SUB_ERR1);
000284 e1c10000 BIC r0,r1,r0
000288 e590001c LDR r0,[r0,#0x1c]
00028c e3c00028 BIC r0,r0,#0x28
000290 e581001c STR r0,[r1,#0x1c]
;;;83 }
000294 e8bd500f LDMFD sp!,{r0-r3,r12,lr}
000298 e25ef004 SUBS pc,lr,#4
ENDP
Test_Uart1_Int PROC
;;;108 void Test_Uart1_Int(void)
;;;109 {
00029c e92d4008 STMFD sp!,{r3,lr}
;;;110 Uart_Port_Set();
0002a0 ebfffffe BL Uart_Port_Set
;;;111 Uart_Select(0);
0002a4 e3a00000 MOV r0,#0
0002a8 ebfffffe BL Uart_Select
;;;112 /*********** UART1 Tx test with interrupt ***********/
;;;113 isTxInt=1;
0002ac e3a00001 MOV r0,#1
0002b0 e51f115c LDR r1,|L1.348|
0002b4 e5810000 STR r0,[r1,#0] ; isTxInt
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