📄 sdi.txt
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000abc e3a03446 MOV r3,#0x46000000
000ac0 e5832038 STR r2,[r3,#0x38]
000ac4 ea000014 B |L1.2844|
;;;290 // Uart_Printf("rSDIFSTA=0x%x\n", rSDIFSTA);
;;;291 }
;;;292 else if( (status&0x80) == 0x80 ) // Check Half interrupt?
|L1.2760|
000ac8 e3110080 TST r1,#0x80
000acc 0a000012 BEQ |L1.2844|
;;;293 {
;;;294 for(i=0;i<8;i++)
000ad0 e3a00000 MOV r0,#0
|L1.2772|
000ad4 e3500008 CMP r0,#8
000ad8 2a00000f BCS |L1.2844|
000adc ea000001 B |L1.2792|
|L1.2784|
000ae0 e2800001 ADD r0,r0,#1
000ae4 eafffffa B |L1.2772|
;;;295 {
;;;296 *Rx_buffer++=rSDIDAT;
|L1.2792|
000ae8 e3a02446 MOV r2,#0x46000000
000aec e5923040 LDR r3,[r2,#0x40]
000af0 e51f2744 LDR r2,|L1.948|
000af4 e5922000 LDR r2,[r2,#0] ; Rx_buffer
000af8 e4823004 STR r3,[r2],#4
000afc e51f3750 LDR r3,|L1.948|
000b00 e5832000 STR r2,[r3,#0] ; Rx_buffer
;;;297 rd_cnt++;
000b04 e59f236c LDR r2,|L1.3704|
000b08 e5922000 LDR r2,[r2,#0] ; rd_cnt
000b0c e2822001 ADD r2,r2,#1
000b10 e59f3360 LDR r3,|L1.3704|
000b14 e5832000 STR r2,[r3,#0] ; rd_cnt
;;;298 }
000b18 eafffff0 B |L1.2784|
;;;299 }
;;;300 // Uart_Printf("rSDIFSTA=0x%x\n", rSDIFSTA); //YH 040221
;;;301
;;;302 ClearPending(BIT_SDI);
|L1.2844|
000b1c e3a02980 MOV r2,#0x200000
000b20 e1823482 ORR r3,r2,r2,LSL #9
000b24 e5832000 STR r2,[r3,#0]
000b28 e1822482 ORR r2,r2,r2,LSL #9
000b2c e5922010 LDR r2,[r2,#0x10]
000b30 e5832010 STR r2,[r3,#0x10]
000b34 e1a02003 MOV r2,r3
000b38 e5922010 LDR r2,[r2,#0x10]
;;;303 }
000b3c e8bd000f LDMFD sp!,{r0-r3}
000b40 e25ef004 SUBS pc,lr,#4
ENDP
Rd_Block PROC
;;;328 void Rd_Block(void)
;;;329 {
000b44 e92d4038 STMFD sp!,{r3-r5,lr}
;;;330 U32 mode;
;;;331 int status;
;;;332
;;;333 rd_cnt=0;
000b48 e3a00000 MOV r0,#0
000b4c e59f1324 LDR r1,|L1.3704|
000b50 e5810000 STR r0,[r1,#0] ; rd_cnt
;;;334 Uart_Printf("[Block read test]\n");
000b54 e28f0fc8 ADR r0,|L1.3708|
000b58 ebfffffe BL _printf
;;;335
;;;336 RE0:
000b5c e1a00000 NOP
;;;337 Uart_Printf("0:Polling read 1:Interrupt read 2:DMA read\nSelect the test mode?");
|L1.2912|
000b60 e59f0328 LDR r0,|L1.3728|
000b64 ebfffffe BL _printf
;;;338 mode=(U32)Uart_GetIntNum();
000b68 ebfffffe BL Uart_GetIntNum
000b6c e1a04000 MOV r4,r0
;;;339
;;;340 Uart_Printf("\n");
000b70 e24f0fa3 ADR r0,|L1.2284|
000b74 ebfffffe BL _printf
;;;341
;;;342 if(mode>2)
000b78 e3540002 CMP r4,#2
000b7c 9a000000 BLS |L1.2948|
;;;343 goto RE0;
000b80 eafffff6 B |L1.2912|
;;;344
;;;345 // rSDICON = rSDICON|(1<<1); // FIFO reset
;;;346 rSDIFSTA=rSDIFSTA|(1<<16); // FIFO reset
|L1.2948|
000b84 e3a00446 MOV r0,#0x46000000
000b88 e5900038 LDR r0,[r0,#0x38]
000b8c e3800b40 ORR r0,r0,#0x10000
000b90 e3a01446 MOV r1,#0x46000000
000b94 e5810038 STR r0,[r1,#0x38]
;;;347
;;;348 if(mode!=2)
000b98 e3540002 CMP r4,#2
000b9c 0a000008 BEQ |L1.3012|
;;;349 rSDIDCON=(2<<22)|(1<<19)|(1<<17)|(Wide<<16)|(1<<14)|(2<<12)|(block<<0); //YH 040220
000ba0 e51f07e0 LDR r0,|L1.968|
000ba4 e5900000 LDR r0,[r0,#0] ; block
000ba8 e59f12e4 LDR r1,|L1.3732|
000bac e5911000 LDR r1,[r1,#0] ; Wide
000bb0 e1800801 ORR r0,r0,r1,LSL #16
000bb4 e3800880 ORR r0,r0,#0x800000
000bb8 e3800aa6 ORR r0,r0,#0xa6000
000bbc e3a01446 MOV r1,#0x46000000
000bc0 e581002c STR r0,[r1,#0x2c]
;;;350 //Word Rx, Rx after cmd, blk, 4bit bus, Rx start, blk num, data start, data transmit mode
;;;351
;;;352 rSDICARG=0x0; // CMD17/18(addr)
|L1.3012|
000bc4 e3a00000 MOV r0,#0
000bc8 e3a01446 MOV r1,#0x46000000
000bcc e5810008 STR r0,[r1,#8]
;;;353
;;;354 RERDCMD:
000bd0 e1a00000 NOP
;;;355 switch(mode)
|L1.3028|
000bd4 e3540000 CMP r4,#0
000bd8 0a000004 BEQ |L1.3056|
000bdc e3540001 CMP r4,#1
000be0 0a00003c BEQ |L1.3288|
000be4 e3540002 CMP r4,#2
000be8 1a0000d3 BNE |L1.3900|
000bec ea00006b B |L1.3488|
;;;356 {
;;;357 case POL:
;;;358 if(block<2) // SINGLE_READ
|L1.3056|
000bf0 e51f0830 LDR r0,|L1.968|
000bf4 e5900000 LDR r0,[r0,#0] ; block
000bf8 e3500002 CMP r0,#2
000bfc 2a000008 BCS |L1.3108|
;;;359 {
;;;360 rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17
000c00 e59f0290 LDR r0,|L1.3736|
000c04 e3a01446 MOV r1,#0x46000000
000c08 e581000c STR r0,[r1,#0xc]
;;;361 if(!Chk_CMDend(17, 1)) //-- Check end of CMD17
000c0c e3a01001 MOV r1,#1
000c10 e3a00011 MOV r0,#0x11
000c14 ebfffffe BL Chk_CMDend
000c18 e3500000 CMP r0,#0
000c1c 1a000009 BNE |L1.3144|
;;;362 goto RERDCMD;
000c20 eaffffeb B |L1.3028|
;;;363 }
;;;364 else // MULTI_READ
;;;365 {
;;;366 rSDICCON=(0x1<<9)|(0x1<<8)|0x52; // sht_resp, wait_resp, dat, start, CMD18
|L1.3108|
000c24 e59f0270 LDR r0,|L1.3740|
000c28 e3a01446 MOV r1,#0x46000000
000c2c e581000c STR r0,[r1,#0xc]
;;;367 if(!Chk_CMDend(18, 1)) //-- Check end of CMD18
000c30 e3a01001 MOV r1,#1
000c34 e3a00012 MOV r0,#0x12
000c38 ebfffffe BL Chk_CMDend
000c3c e3500000 CMP r0,#0
000c40 1a000000 BNE |L1.3144|
;;;368 goto RERDCMD;
000c44 eaffffe2 B |L1.3028|
;;;369 }
;;;370
;;;371 rSDICSTA=0xa00; // Clear cmd_end(with rsp)
|L1.3144|
000c48 e3a00ea0 MOV r0,#0xa00
000c4c e3a01446 MOV r1,#0x46000000
000c50 e5810010 STR r0,[r1,#0x10]
;;;372
;;;373 while(rd_cnt<128*block) // 512*block bytes
000c54 e1a00000 NOP
|L1.3160|
000c58 e59f0218 LDR r0,|L1.3704|
000c5c e5900000 LDR r0,[r0,#0] ; rd_cnt
000c60 e51f18a0 LDR r1,|L1.968|
000c64 e5911000 LDR r1,[r1,#0] ; block
000c68 e1500381 CMP r0,r1,LSL #7
000c6c 2a000018 BCS |L1.3284|
;;;374 {
;;;375 if((rSDIDSTA&0x20)==0x20) // Check timeout
000c70 e3a00446 MOV r0,#0x46000000
000c74 e5900034 LDR r0,[r0,#0x34]
000c78 e3100020 TST r0,#0x20
000c7c 0a000003 BEQ |L1.3216|
;;;376 {
;;;377 rSDIDSTA=(0x1<<0x5); // Clear timeout flag
000c80 e3a00020 MOV r0,#0x20
000c84 e3a01446 MOV r1,#0x46000000
000c88 e5810034 STR r0,[r1,#0x34]
;;;378 break;
000c8c ea000010 B |L1.3284|
;;;379 }
;;;380 status=rSDIFSTA;
|L1.3216|
000c90 e3a00446 MOV r0,#0x46000000
000c94 e5905038 LDR r5,[r0,#0x38]
;;;381 if((status&0x1000)==0x1000) // Is Rx data?
000c98 e3150d40 TST r5,#0x1000
000c9c 0a00000b BEQ |L1.3280|
;;;382 {
;;;383 *Rx_buffer++=rSDIDAT;
000ca0 e3a00446 MOV r0,#0x46000000
000ca4 e5901040 LDR r1,[r0,#0x40]
000ca8 e51f08fc LDR r0,|L1.948|
000cac e5900000 LDR r0,[r0,#0] ; Rx_buffer
000cb0 e4801004 STR r1,[r0],#4
000cb4 e51f1908 LDR r1,|L1.948|
000cb8 e5810000 STR r0,[r1,#0] ; Rx_buffer
;;;384 rd_cnt++;
000cbc e59f01b4 LDR r0,|L1.3704|
000cc0 e5900000 LDR r0,[r0,#0] ; rd_cnt
000cc4 e2800001 ADD r0,r0,#1
000cc8 e59f11a8 LDR r1,|L1.3704|
000ccc e5810000 STR r0,[r1,#0] ; rd_cnt
;;;385 }
;;;386 }
|L1.3280|
000cd0 eaffffe0 B |L1.3160|
;;;387 break;
|L1.3284|
000cd4 ea000099 B |L1.3904|
;;;388
;;;389 case INT:
;;;390 pISR_SDI=(unsigned)Rd_Int;
|L1.3288|
000cd8 e59f01c0 LDR r0,|L1.3744|
000cdc e59f11c0 LDR r1,|L1.3748|
000ce0 e5810f74 STR r0,[r1,#0xf74]
;;;391 rINTMSK = ~(BIT_SDI);
000ce4 e3e00980 MVN r0,#0x200000
000ce8 e0201be0 EOR r1,r0,r0,ROR #23
000cec e5810008 STR r0,[r1,#8]
;;;392
;;;393 rSDIIMSK=5; // Last & Rx FIFO half int.
000cf0 e3a00005 MOV r0,#5
000cf4 e3a01446 MOV r1,#0x46000000
000cf8 e581003c STR r0,[r1,#0x3c]
;;;394
;;;395 if(block<2) // SINGLE_READ
000cfc e51f093c LDR r0,|L1.968|
000d00 e5900000 LDR r0,[r0,#0] ; block
000d04 e3500002 CMP r0,#2
000d08 2a000008 BCS |L1.3376|
;;;396 {
;;;397 rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17
000d0c e59f0184 LDR r0,|L1.3736|
000d10 e3a01446 MOV r1,#0x46000000
000d14 e581000c STR r0,[r1,#0xc]
;;;398 if(!Chk_CMDend(17, 1)) //-- Check end of CMD17
000d18 e3a01001 MOV r1,#1
000d1c e3a00011 MOV r0,#0x11
000d20 ebfffffe BL Chk_CMDend
000d24 e3500000 CMP r0,#0
000d28 1a000009 BNE |L1.3412|
;;;399 goto RERDCMD;
000d2c eaffffa8 B |L1.3028|
;;;400 }
;;;401 else // MULTI_READ
;;;402 {
;;;403 rSDICCON=(0x1<<9)|(0x1<<8)|0x52; // sht_resp, wait_resp, dat, start, CMD18
|L1.3376|
000d30 e59f0164 LDR r0,|L1.3740|
000d34 e3a01446 MOV r1,#0x46000000
000d38 e581000c STR r0,[r1,#0xc]
;;;404 if(!Chk_CMDend(18, 1)) //-- Check end of CMD18
000d3c e3a01001 MOV r1,#1
000d40 e3a00012 MOV r0,#0x12
000d44 ebfffffe BL Chk_CMDend
000d48 e3500000 CMP r0,#0
000d4c 1a000000 BNE |L1.3412|
;;;405 goto RERDCMD;
000d50 eaffff9f B |L1.3028|
;;;406 }
;;;407
;;;408 rSDICSTA=0xa00; // Clear cmd_end(with rsp)
|L1.3412|
000d54 e3a00ea0 MOV r0,#0xa00
000d58 e3a01446 MOV r1,#0x46000000
000d5c e5810010 STR r0,[r1,#0x10]
;;;409
;;;410 while(rd_cnt<128*block);
000d60 e1a00000 NOP
|L1.3428|
000d64 e59f010c LDR r0,|L1.3704|
000d68 e5900000 LDR r0,[r0,#0] ; rd_cnt
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