📄 idle.txt
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;;;295
;;;296 pISR_EINT7_10=(U32)Eint9IntHard;
00098c e59f011c LDR r0,|L1.2736|
000990 e51f10e0 LDR r1,|L1.2232|
000994 e5810f28 STR r0,[r1,#0xf28]
;;;297
;;;298 rEINTPEND=BIT_EINTPEND_EINT9;
000998 e3a00f80 MOV r0,#0x200
00099c e51f1920 LDR r1,|L1.132|
0009a0 e5810038 STR r0,[r1,#0x38]
;;;299 ClearPending(BIT_EINT7_10);
0009a4 e3a00004 MOV r0,#4
0009a8 e2411646 SUB r1,r1,#0x4600000
0009ac e5810000 STR r0,[r1,#0]
0009b0 e1c10000 BIC r0,r1,r0
0009b4 e5900010 LDR r0,[r0,#0x10]
0009b8 e5810010 STR r0,[r1,#0x10]
0009bc e1a00001 MOV r0,r1
0009c0 e5900010 LDR r0,[r0,#0x10]
;;;300
;;;301 rINTMSK=rINTMSK&~(BIT_EINT7_10);
0009c4 e1a00001 MOV r0,r1
0009c8 e5900008 LDR r0,[r0,#8]
0009cc e3c00004 BIC r0,r0,#4
0009d0 e5810008 STR r0,[r1,#8]
;;;302 rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT9);
0009d4 e2810646 ADD r0,r1,#0x4600000
0009d8 e5900034 LDR r0,[r0,#0x34]
0009dc e3c00f80 BIC r0,r0,#0x200
0009e0 e2811646 ADD r1,r1,#0x4600000
0009e4 e5810034 STR r0,[r1,#0x34]
;;;303
;;;304 while(m_flag)
0009e8 e1a00000 NOP
|L1.2540|
0009ec e51f0780 LDR r0,|L1.628|
0009f0 e5900000 LDR r0,[r0,#0] ; m_flag
0009f4 e3500000 CMP r0,#0
0009f8 0a00000f BEQ |L1.2620|
;;;305 {
;;;306 rCLKCON |= (1<<2); //enter IDLE mode.
0009fc e3a00440 MOV r0,#0x40000000
000a00 e5900020 LDR r0,[r0,#0x20]
000a04 e3800004 ORR r0,r0,#4
000a08 e3a01440 MOV r1,#0x40000000
000a0c e5810020 STR r0,[r1,#0x20]
;;;307 //wait until S3C24A0X enters IDLE mode.
;;;308 //wait EINT10 interrupt
;;;309 for(i=0;i<10;i++);
000a10 e3a04000 MOV r4,#0
|L1.2580|
000a14 e354000a CMP r4,#0xa
000a18 aa000001 BGE |L1.2596|
000a1c e2844001 ADD r4,r4,#1
000a20 eafffffb B |L1.2580|
;;;310 rCLKCON &= ~(1<<2); //turn-off IDLE bit. IDLE bit should be turned off after wake-up.
|L1.2596|
000a24 e3a00440 MOV r0,#0x40000000
000a28 e5900020 LDR r0,[r0,#0x20]
000a2c e3c00004 BIC r0,r0,#4
000a30 e3a01440 MOV r1,#0x40000000
000a34 e5810020 STR r0,[r1,#0x20]
;;;311 }
000a38 eaffffeb B |L1.2540|
;;;312
;;;313 Uart_Printf("Return to Normal Mode.\n");
|L1.2620|
000a3c e24f0f4c ADR r0,|L1.2324|
000a40 ebfffffe BL _printf
;;;314 }
000a44 e8bd8010 LDMFD sp!,{r4,pc}
|L1.2632|
000a48 4c44495b DCB "[IDL"
000a4c 6f4d2045 DCB "E Mo"
000a50 48206564 DCB "de H"
000a54 20647261 DCB "ard "
000a58 74736554 DCB "Test"
000a5c 74697720 DCB " wit"
000a60 75462068 DCB "h Fu"
000a64 6974636e DCB "ncti"
000a68 47206e6f DCB "on G"
000a6c 6e656e65 DCB "enen"
000a70 6f746172 DCB "rato"
000a74 000a5d72 DCB "r]\n\0"
|L1.2680|
000a78 32433353 DCB "S3C2"
000a7c 58304134 DCB "4A0X"
000a80 6c697720 DCB " wil"
000a84 6177206c DCB "l wa"
000a88 7520656b DCB "ke u"
000a8c 79622070 DCB "p by"
000a90 4e494520 DCB " EIN"
000a94 61203954 DCB "T9 a"
000a98 74692074 DCB "t it"
000a9c 61662073 DCB "s fa"
000aa0 6e696c6c DCB "llin"
000aa4 64652067 DCB "g ed"
000aa8 0a2e6567 DCB "ge.\n"
000aac 00000000 DCB "\0\0\0\0"
|L1.2736|
000ab0 00000000 DCD Eint9IntHard
ENDP
Test_MMUIdleMode PROC
;;;320 void Test_MMUIdleMode(void)
;;;321 {
000ab4 e92d4010 STMFD sp!,{r4,lr}
;;;322 int i;
;;;323
;;;324 Uart_Printf("[MMU IDLE Mode Test]\n");
000ab8 e28f00e8 ADR r0,|L1.2984|
000abc ebfffffe BL _printf
;;;325 Uart_Printf("This routine tests MMU registser7:Wait for interrupt function.\n");
000ac0 e28f00f8 ADR r0,|L1.3008|
000ac4 ebfffffe BL _printf
;;;326 Uart_Printf("\nCheck the current cunsumption.\n");
000ac8 e28f0f4c ADR r0,|L1.3072|
000acc ebfffffe BL _printf
;;;327 #if USE_RTC_ALARM
;;;328 Uart_Printf("After 10 seconds, S3C24A0X will wake up by RTC alarm interrupt.\n");
000ad0 e51f022c LDR r0,|L1.2220|
000ad4 ebfffffe BL _printf
;;;329 #endif
;;;330 Uart_Printf("S3C24A0X will also wake up by EINT0.\n");
000ad8 e28f0f51 ADR r0,|L1.3108|
000adc ebfffffe BL _printf
;;;331 Uart_TxEmpty(0); //Wait until UART0 Tx buffer empty.
000ae0 e3a00000 MOV r0,#0
000ae4 ebfffffe BL Uart_TxEmpty
;;;332
;;;333 rGPCON_L=( rGPCON_L & ~(3) ) | (2<<0); //GP0=EINT0
000ae8 e51f0a6c LDR r0,|L1.132|
000aec e5900008 LDR r0,[r0,#8]
000af0 e3c00003 BIC r0,r0,#3
000af4 e3800002 ORR r0,r0,#2
000af8 e51f1a7c LDR r1,|L1.132|
000afc e5810008 STR r0,[r1,#8]
;;;334 rEXTINTC0=( rEXTINTC0 & ~(7<<0) ) | (2<<0); //EINT0=falling edge triggered
000b00 e1a00001 MOV r0,r1
000b04 e5900018 LDR r0,[r0,#0x18]
000b08 e3c00007 BIC r0,r0,#7
000b0c e3800002 ORR r0,r0,#2
000b10 e5810018 STR r0,[r1,#0x18]
;;;335
;;;336 pISR_EINT0_2=(U32)EintInt;
000b14 e51f0268 LDR r0,|L1.2228|
000b18 e51f1268 LDR r1,|L1.2232|
000b1c e5810f20 STR r0,[r1,#0xf20]
;;;337 #if USE_RTC_ALARM
;;;338 pISR_RTC=(U32)AlarmInt;
000b20 e51f0268 LDR r0,|L1.2240|
000b24 e5810f98 STR r0,[r1,#0xf98]
;;;339 #endif
;;;340 //Clear sub interrupt pending
;;;341 rEINTPEND=BIT_EINTPEND_EINT0;
000b28 e3a00001 MOV r0,#1
000b2c e51f1ab0 LDR r1,|L1.132|
000b30 e5810038 STR r0,[r1,#0x38]
;;;342 //Clear interrupt pending
;;;343 ClearPending(BIT_EINT0_2|BIT_RTC);
000b34 e3a00350 MOV r0,#0x40000001
000b38 e2411646 SUB r1,r1,#0x4600000
000b3c e5810000 STR r0,[r1,#0]
000b40 e1c100c0 BIC r0,r1,r0,ASR #1
000b44 e5900010 LDR r0,[r0,#0x10]
000b48 e5810010 STR r0,[r1,#0x10]
000b4c e1a00001 MOV r0,r1
000b50 e5900010 LDR r0,[r0,#0x10]
;;;344
;;;345 #if USE_RTC_ALARM
;;;346 SetAlarmWakeUp(10);
000b54 e3a0000a MOV r0,#0xa
000b58 ebfffffe BL SetAlarmWakeUp
;;;347 //rRTCCON = 0x0; // R/W disable, but interrupt will be generated.
;;;348 #endif
;;;349
;;;350 //Unmask interrupt
;;;351 rINTMSK=rINTMSK&~(BIT_EINT0_2|BIT_RTC);
000b5c e51f0a94 LDR r0,|L1.208|
000b60 e5900008 LDR r0,[r0,#8]
000b64 e3c00350 BIC r0,r0,#0x40000001
000b68 e51f1aa0 LDR r1,|L1.208|
000b6c e5810008 STR r0,[r1,#8]
;;;352 //Unmask sub interrupt
;;;353 rEINTMASK=rEINTMASK&~(BIT_EINTPEND_EINT0);
000b70 e2810646 ADD r0,r1,#0x4600000
000b74 e5900034 LDR r0,[r0,#0x34]
000b78 e3c00001 BIC r0,r0,#1
000b7c e2811646 ADD r1,r1,#0x4600000
000b80 e5810034 STR r0,[r1,#0x34]
;;;354
;;;355 MMU_WaitForInterrupt();
000b84 ebfffffe BL MMU_WaitForInterrupt
;;;356
;;;357 //wait until processor enters Low-power state.
;;;358 //wait EINT0 interrupt or RTC alarm interrupt
;;;359 for(i=0;i<10;i++);
000b88 e3a04000 MOV r4,#0
|L1.2956|
000b8c e354000a CMP r4,#0xa
000b90 aa000001 BGE |L1.2972|
000b94 e2844001 ADD r4,r4,#1
000b98 eafffffb B |L1.2956|
;;;360
;;;361 Uart_Printf("Return to Normal Mode.\n");
|L1.2972|
000b9c e24f0fa4 ADR r0,|L1.2324|
000ba0 ebfffffe BL _printf
;;;362 }
000ba4 e8bd8010 LDMFD sp!,{r4,pc}
|L1.2984|
000ba8 554d4d5b DCB "[MMU"
000bac 4c444920 DCB " IDL"
000bb0 6f4d2045 DCB "E Mo"
000bb4 54206564 DCB "de T"
000bb8 5d747365 DCB "est]"
000bbc 0000000a DCB "\n\0\0\0"
|L1.3008|
000bc0 73696854 DCB "This"
000bc4 756f7220 DCB " rou"
000bc8 656e6974 DCB "tine"
000bcc 73657420 DCB " tes"
000bd0 4d207374 DCB "ts M"
000bd4 7220554d DCB "MU r"
000bd8 73696765 DCB "egis"
000bdc 72657374 DCB "tser"
000be0 61573a37 DCB "7:Wa"
000be4 66207469 DCB "it f"
000be8 6920726f DCB "or i"
000bec 7265746e DCB "nter"
000bf0 74707572 DCB "rupt"
000bf4 6e756620 DCB " fun"
000bf8 6f697463 DCB "ctio"
000bfc 000a2e6e DCB "n.\n\0"
|L1.3072|
000c00 6568430a DCB "\nChe"
000c04 74206b63 DCB "ck t"
000c08 63206568 DCB "he c"
000c0c 65727275 DCB "urre"
000c10 6320746e DCB "nt c"
000c14 75736e75 DCB "unsu"
000c18 6974706d DCB "mpti"
000c1c 0a2e6e6f DCB "on.\n"
000c20 00000000 DCB "\0\0\0\0"
|L1.3108|
000c24 32433353 DCB "S3C2"
000c28 58304134 DCB "4A0X"
000c2c 6c697720 DCB " wil"
000c30 6c61206c DCB "l al"
000c34 77206f73 DCB "so w"
000c38 20656b61 DCB "ake "
000c3c 62207075 DCB "up b"
000c40 49452079 DCB "y EI"
000c44 2e30544e DCB "NT0."
000c48 0000000a DCB "\n\0\0\0"
ENDP
AREA ||.constdata||, DATA, READONLY, ALIGN=2
||.constdata$1||
DCB 0x41,0x66,0x74,0x65
DCB 0x72,0x20,0x31,0x30
DCB 0x20,0x73,0x65,0x63
DCB 0x6f,0x6e,0x64,0x73
DCB 0x2c,0x20,0x53,0x33
DCB 0x43,0x32,0x34,0x41
DCB 0x30,0x58,0x20,0x77
DCB 0x69,0x6c,0x6c,0x20
DCB 0x77,0x61,0x6b,0x65
DCB 0x20,0x75,0x70,0x20
DCB 0x62,0x79,0x20,0x52
DCB 0x54,0x43,0x20,0x61
DCB 0x6c,0x61,0x72,0x6d
DCB 0x20,0x69,0x6e,0x74
DCB 0x65,0x72,0x72,0x75
DCB 0x70,0x74,0x2e,0x0a
DCB 0x00
DCB 0x00,0x00,0x00
DCB 0x53,0x33,0x43,0x32
DCB 0x34,0x41,0x30,0x58
DCB 0x20,0x77,0x69,0x6c
DCB 0x6c,0x20,0x77,0x61
DCB 0x6b,0x65,0x20,0x75
DCB 0x70,0x20,0x62,0x79
DCB 0x20,0x45,0x49,0x4e
DCB 0x54,0x30,0x2c,0x20
DCB 0x31,0x2c,0x20,0x39
DCB 0x2c,0x20,0x31,0x31
DCB 0x2c,0x20,0x53,0x74
DCB 0x79,0x6c,0x75,0x73
DCB 0x20,0x64,0x6f,0x77
DCB 0x6e,0x20,0x6f,0x72
DCB 0x20,0x4d,0x6f,0x64
DCB 0x65,0x6d,0x20,0x69
DCB 0x6e,0x74,0x2e,0x0a
DCB 0x00
DCB 0x00,0x00,0x00
AREA ||.bss||, NOINIT, ALIGN=2
m_cnt
||.bss$2||
% 4
m_flag
% 4
END
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