📄 ni_labpc.c
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return 1;}// utility function that suggests a dma transfer size in bytesstatic unsigned int labpc_suggest_transfer_size(comedi_cmd cmd){ unsigned int size; unsigned int freq; if(cmd.convert_src == TRIG_TIMER) freq = 1000000000 / cmd.convert_arg; // return some default value else freq = 0xffffffff; // make buffer fill in no more than 1/3 second size = (freq / 3) * sample_size; // set a minimum and maximum size allowed if(size > dma_buffer_size) size = dma_buffer_size - dma_buffer_size % sample_size; else if(size < sample_size) size = sample_size; return size;}// figures out what counter values to use based on commandstatic void labpc_adc_timing(comedi_device *dev, comedi_cmd *cmd){ const int max_counter_value = 0x10000; // max value for 16 bit counter in mode 2 const int min_counter_value = 2; // min value for 16 bit counter in mode 2 unsigned int base_period; // if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0 if( labpc_ai_convert_period( cmd ) && labpc_ai_scan_period( cmd ) ) { // pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters) devpriv->divisor_b0 = (labpc_ai_scan_period( cmd ) - 1) / (LABPC_TIMER_BASE * max_counter_value) + 1; if(devpriv->divisor_b0 < min_counter_value) devpriv->divisor_b0 = min_counter_value; if(devpriv->divisor_b0 > max_counter_value) devpriv->divisor_b0 = max_counter_value; base_period = LABPC_TIMER_BASE * devpriv->divisor_b0; // set a0 for conversion frequency and b1 for scan frequency switch(cmd->flags & TRIG_ROUND_MASK) { default: case TRIG_ROUND_NEAREST: devpriv->divisor_a0 = (labpc_ai_convert_period( cmd ) + (base_period / 2)) / base_period; devpriv->divisor_b1 = (labpc_ai_scan_period( cmd ) + (base_period / 2)) / base_period; break; case TRIG_ROUND_UP: devpriv->divisor_a0 = (labpc_ai_convert_period( cmd ) + (base_period - 1)) / base_period; devpriv->divisor_b1 = (labpc_ai_scan_period( cmd ) + (base_period - 1)) / base_period; break; case TRIG_ROUND_DOWN: devpriv->divisor_a0 = labpc_ai_convert_period( cmd ) / base_period; devpriv->divisor_b1 = labpc_ai_scan_period( cmd ) / base_period; break; } // make sure a0 and b1 values are acceptable if(devpriv->divisor_a0 < min_counter_value) devpriv->divisor_a0 = min_counter_value; if(devpriv->divisor_a0 > max_counter_value) devpriv->divisor_a0 = max_counter_value; if(devpriv->divisor_b1 < min_counter_value) devpriv->divisor_b1 = min_counter_value; if(devpriv->divisor_b1 > max_counter_value) devpriv->divisor_b1 = max_counter_value; // write corrected timings to command labpc_set_ai_convert_period( cmd, base_period * devpriv->divisor_a0 ); labpc_set_ai_scan_period( cmd, base_period * devpriv->divisor_b1 ); // if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions }else if( labpc_ai_scan_period( cmd ) ) { unsigned int scan_period; scan_period = labpc_ai_scan_period( cmd ); /* calculate cascaded counter values that give desired scan timing */ i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE, &(devpriv->divisor_b1), &(devpriv->divisor_b0), &scan_period, cmd->flags & TRIG_ROUND_MASK); labpc_set_ai_scan_period( cmd, scan_period ); }else if( labpc_ai_convert_period( cmd ) ) { unsigned int convert_period; convert_period = labpc_ai_convert_period( cmd ); /* calculate cascaded counter values that give desired conversion timing */ i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE, &(devpriv->divisor_a0), &(devpriv->divisor_b0), &convert_period, cmd->flags & TRIG_ROUND_MASK); labpc_set_ai_convert_period( cmd, convert_period ); }}/* functions that do inb/outb and readb/writeb so we can use * function pointers to decide which to use */static unsigned int labpc_inb(unsigned long address){ return inb(address);}static void labpc_outb(unsigned int byte, unsigned long address){ outb(byte, address);}static unsigned int labpc_readb(unsigned long address){ return readb(address);}static void labpc_writeb(unsigned int byte, unsigned long address){ writeb(byte, address);}static int labpc_dio_mem_callback(int dir, int port, int data, unsigned long iobase){ if(dir) { writeb(data, iobase + port); return 0; }else { return readb(iobase + port); }}// lowlevel write to eeprom/dacstatic void labpc_serial_out(comedi_device *dev, unsigned int value, unsigned int value_width){ int i; for(i = 1; i <= value_width; i++) { // clear serial clock devpriv->command5_bits &= ~SCLOCK_BIT; // send bits most significant bit first if(value & (1 << (value_width - i))) devpriv->command5_bits |= SDATA_BIT; else devpriv->command5_bits &= ~SDATA_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // set clock to load bit devpriv->command5_bits |= SCLOCK_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); }}// lowlevel read from eepromstatic unsigned int labpc_serial_in(comedi_device *dev){ unsigned int value = 0; int i; const int value_width = 8; // number of bits wide values are for(i = 1; i <= value_width; i++) { // set serial clock devpriv->command5_bits |= SCLOCK_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // clear clock bit devpriv->command5_bits &= ~SCLOCK_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // read bits most significant bit first comedi_udelay(1); devpriv->status2_bits = thisboard->read_byte(dev->iobase + STATUS2_REG); if(devpriv->status2_bits & EEPROM_OUT_BIT) { value |= 1 << (value_width - i); } } return value;}static unsigned int labpc_eeprom_read(comedi_device *dev, unsigned int address){ unsigned int value; const int read_instruction = 0x3; // bits to tell eeprom to expect a read const int write_length = 8; // 8 bit write lengths to eeprom // enable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // send read instruction labpc_serial_out(dev, read_instruction, write_length); // send 8 bit address to read from labpc_serial_out(dev, address, write_length); // read result value = labpc_serial_in(dev); // disable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); return value;}static unsigned int labpc_eeprom_write(comedi_device *dev, unsigned int address, unsigned int value){ const int write_enable_instruction = 0x6; const int write_instruction = 0x2; const int write_length = 8; // 8 bit write lengths to eeprom const int write_in_progress_bit = 0x1; const int timeout = 10000; int i; // make sure there isn't already a write in progress for(i = 0; i < timeout; i++) { if((labpc_eeprom_read_status(dev) & write_in_progress_bit) == 0) break; } if(i == timeout) { comedi_error(dev, "eeprom write timed out"); return -ETIME; } // update software copy of eeprom devpriv->eeprom_data[address] = value; // enable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // send write_enable instruction labpc_serial_out(dev, write_enable_instruction, write_length); devpriv->command5_bits &= ~EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // send write instruction devpriv->command5_bits |= EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); labpc_serial_out(dev, write_instruction, write_length); // send 8 bit address to write to labpc_serial_out(dev, address, write_length); // write value labpc_serial_out(dev, value, write_length); devpriv->command5_bits &= ~EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // disable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); return 0;}static unsigned int labpc_eeprom_read_status(comedi_device *dev){ unsigned int value; const int read_status_instruction = 0x5; const int write_length = 8; // 8 bit write lengths to eeprom // enable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // send read status instruction labpc_serial_out(dev, read_status_instruction, write_length); // read result value = labpc_serial_in(dev); // disable read/write to eeprom devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); return value;}// writes to 8 bit calibration dacsstatic void write_caldac(comedi_device *dev, unsigned int channel, unsigned int value){ if( value == devpriv->caldac[ channel ] ) return; devpriv->caldac[ channel ] = value; // clear caldac load bit and make sure we don't write to eeprom devpriv->command5_bits &= ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); // write 4 bit channel labpc_serial_out(dev, channel, 4); // write 8 bit caldac value labpc_serial_out(dev, value, 8); // set and clear caldac bit to load caldac value devpriv->command5_bits |= CALDAC_LOAD_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); devpriv->command5_bits &= ~CALDAC_LOAD_BIT; comedi_udelay(1); thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);}// PCMCIA crap#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)/* All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If you do not define PCMCIA_DEBUG at all, all the debug code will be left out. If you compile with PCMCIA_DEBUG=0, the debug code will be present but disabled -- but it can then be enabled for specific modules at load time with a 'pc_debug=#' option to insmod.*/#ifdef PCMCIA_DEBUGstatic int pc_debug = PCMCIA_DEBUG;MODULE_PARM(pc_debug, "i");#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)static char *version ="ni_labpc.c, based on dummy_cs.c 1.31 2001/08/24 12:13:13";#else#define DEBUG(n, args...)#endif/*====================================================================*//* Parameters that can be set with 'insmod' *//* The old way: bit map of interrupts to choose from *//* This means pick from 15, 14, 12, 11, 10, 9, 7, 5, 4, and 3 */static u_int irq_mask = 0xdeb8;/* Newer, simpler way of listing specific interrupts */static int irq_list[4] = { -1 };MODULE_PARM(irq_mask, "i");MODULE_PARM(irq_list, "1-4i");/*====================================================================*//* The event() function is this driver's Card Services event handler. It will be called by Card Services when an appropriate card status event is received. The config() and release() entry points are used to configure or release a socket, in response to card insertion and ejection events. They are invoked from the dummy event handler.*/static void labpc_config(dev_link_t *link);static void labpc_release(u_long arg);static int labpc_event(event_t event, int priority, event_callback_args_t *args);/* The attach() and detach() entry points are used to create and destroy "instances" of the driver, where each instance represents everything needed to manage one actual PCMCIA card.*/static dev_link_t *labpc_cs_attach(void);static void labpc_cs_detach(dev_link_t *);/* You'll also need to prototype all the functions that will actually be used to talk to your device. See 'memory_cs' for a good example of a fully self-sufficient driver; the other drivers rely more or less on other parts of the kernel.*//* The dev_info variable is the "key" that is used to match up this device driver with appropriate cards, through the card configuration database.*/static dev_info_t dev_info = "daqcard-1200";/* A dev_link_t structure has fields for most things that are needed to keep track of a socket, but there will usually be some device specific information that also needs to be kept track of. The 'priv' pointer in a dev_link_t structure can be used to point to a device-specific private data structure, like this. To simplify the data structure handling, we actually include the dev_link_t structure in the device's private data structure. A driver needs to provide a dev_node_t structure for each device on a card. In some cases, there is only one device per card (for example, ethernet cards, modems). In other cases, there may be many actual or logical devices (SCSI adapters, memory cards with multiple partitions). The dev_node_t structures need to be kept in a linked list starting at the 'dev' field of a dev_link_t structure. We allocate them in the card's private data structure, because they generally shouldn't be allocated dynamically. In this case, we also provide a flag to indicate if a device is "stopped" due to a power management event, or card ejection. The device IO routines can use a flag like this to throttle IO to a card that is not ready to accept it. The bus_operations pointer is used on platforms for which we need to use special socket-specific versions of normal IO primitives (inb, outb, readb, writeb, etc) for card IO.*/typedef struct local_info_t { dev_link_t link; dev_node_t node; int stop; struct
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