sram_2.map.eqn

FPGA的SDRAM控制器源程序 FPGA的SDRAM控制器源程序

SW[8] = INPUT();


--SW[9] is SW[9]
--operation mode is input

SW[9] = INPUT();


--SW[10] is SW[10]
--operation mode is input

SW[10] = INPUT();


--SW[11] is SW[11]
--operation mode is input

SW[11] = INPUT();


--SW[12] is SW[12]
--operation mode is input

SW[12] = INPUT();


--SW[13] is SW[13]
--operation mode is input

SW[13] = INPUT();


--SW[14] is SW[14]
--operation mode is input

SW[14] = INPUT();


--SW[15] is SW[15]
--operation mode is input

SW[15] = INPUT();


--SW[16] is SW[16]
--operation mode is input

SW[16] = INPUT();


--SW[17] is SW[17]
--operation mode is input

SW[17] = INPUT();


--KEY[2] is KEY[2]
--operation mode is input

KEY[2] = INPUT();


--KEY[0] is KEY[0]
--operation mode is input

KEY[0] = INPUT();


--KEY[3] is KEY[3]
--operation mode is input

KEY[3] = INPUT();


--CLOCK_50 is CLOCK_50
--operation mode is input

CLOCK_50 = INPUT();


--HEX0[0] is HEX0[0]
--operation mode is output

HEX0[0] = OUTPUT(A1L4Q);


--HEX0[1] is HEX0[1]
--operation mode is output

HEX0[1] = OUTPUT(A1L6Q);


--HEX0[2] is HEX0[2]
--operation mode is output

HEX0[2] = OUTPUT(A1L8Q);


--HEX0[3] is HEX0[3]
--operation mode is output

HEX0[3] = OUTPUT(A1L10Q);


--HEX0[4] is HEX0[4]
--operation mode is output

HEX0[4] = OUTPUT(A1L12Q);


--HEX0[5] is HEX0[5]
--operation mode is output

HEX0[5] = OUTPUT(A1L14Q);


--HEX0[6] is HEX0[6]
--operation mode is output

HEX0[6] = OUTPUT(A1L16Q);


--HEX1[0] is HEX1[0]
--operation mode is output

HEX1[0] = OUTPUT(A1L19Q);


--HEX1[1] is HEX1[1]
--operation mode is output

HEX1[1] = OUTPUT(A1L21Q);


--HEX1[2] is HEX1[2]
--operation mode is output

HEX1[2] = OUTPUT(A1L23Q);


--HEX1[3] is HEX1[3]
--operation mode is output

HEX1[3] = OUTPUT(A1L25Q);


--HEX1[4] is HEX1[4]
--operation mode is output

HEX1[4] = OUTPUT(A1L27Q);


--HEX1[5] is HEX1[5]
--operation mode is output

HEX1[5] = OUTPUT(A1L29Q);


--HEX1[6] is HEX1[6]
--operation mode is output

HEX1[6] = OUTPUT(A1L31Q);


--HEX2[0] is HEX2[0]
--operation mode is output

HEX2[0] = OUTPUT(A1L34Q);


--HEX2[1] is HEX2[1]
--operation mode is output

HEX2[1] = OUTPUT(A1L36Q);


--HEX2[2] is HEX2[2]
--operation mode is output

HEX2[2] = OUTPUT(A1L38Q);


--HEX2[3] is HEX2[3]
--operation mode is output

HEX2[3] = OUTPUT(A1L40Q);


--HEX2[4] is HEX2[4]
--operation mode is output

HEX2[4] = OUTPUT(A1L42Q);


--HEX2[5] is HEX2[5]
--operation mode is output

HEX2[5] = OUTPUT(A1L44Q);


--HEX2[6] is HEX2[6]
--operation mode is output

HEX2[6] = OUTPUT(A1L46Q);


--HEX3[0] is HEX3[0]
--operation mode is output

HEX3[0] = OUTPUT(A1L49Q);


--HEX3[1] is HEX3[1]
--operation mode is output

HEX3[1] = OUTPUT(A1L51Q);


--HEX3[2] is HEX3[2]
--operation mode is output

HEX3[2] = OUTPUT(A1L53Q);


--HEX3[3] is HEX3[3]
--operation mode is output

HEX3[3] = OUTPUT(A1L55Q);


--HEX3[4] is HEX3[4]
--operation mode is output

HEX3[4] = OUTPUT(A1L57Q);


--HEX3[5] is HEX3[5]
--operation mode is output

HEX3[5] = OUTPUT(A1L59Q);


--HEX3[6] is HEX3[6]
--operation mode is output

HEX3[6] = OUTPUT(A1L61Q);


--LEDG[0] is LEDG[0]
--operation mode is output

LEDG[0] = OUTPUT(A1L69Q);


--LEDG[1] is LEDG[1]
--operation mode is output

LEDG[1] = OUTPUT(GND);


--LEDG[2] is LEDG[2]
--operation mode is output

LEDG[2] = OUTPUT(GND);


--LEDG[3] is LEDG[3]
--operation mode is output

LEDG[3] = OUTPUT(GND);


--LEDG[4] is LEDG[4]
--operation mode is output

LEDG[4] = OUTPUT(GND);


--LEDG[5] is LEDG[5]
--operation mode is output

LEDG[5] = OUTPUT(GND);


--LEDG[6] is LEDG[6]
--operation mode is output

LEDG[6] = OUTPUT(GND);


--LEDG[7] is LEDG[7]
--operation mode is output

LEDG[7] = OUTPUT(GND);


--LEDG[8] is LEDG[8]
--operation mode is output

LEDG[8] = OUTPUT(GND);


--LEDR[0] is LEDR[0]
--operation mode is output

LEDR[0] = OUTPUT(SW[0]);


--LEDR[1] is LEDR[1]
--operation mode is output

LEDR[1] = OUTPUT(SW[1]);


--LEDR[2] is LEDR[2]
--operation mode is output

LEDR[2] = OUTPUT(SW[2]);


--LEDR[3] is LEDR[3]
--operation mode is output

LEDR[3] = OUTPUT(SW[3]);


--LEDR[4] is LEDR[4]
--operation mode is output

LEDR[4] = OUTPUT(SW[4]);


--LEDR[5] is LEDR[5]
--operation mode is output

LEDR[5] = OUTPUT(SW[5]);


--LEDR[6] is LEDR[6]
--operation mode is output

LEDR[6] = OUTPUT(SW[6]);


--LEDR[7] is LEDR[7]
--operation mode is output

LEDR[7] = OUTPUT(SW[7]);


--LEDR[8] is LEDR[8]
--operation mode is output

LEDR[8] = OUTPUT(SW[8]);


--LEDR[9] is LEDR[9]
--operation mode is output

LEDR[9] = OUTPUT(SW[9]);


--LEDR[10] is LEDR[10]
--operation mode is output

LEDR[10] = OUTPUT(SW[10]);


--LEDR[11] is LEDR[11]
--operation mode is output

LEDR[11] = OUTPUT(SW[11]);


--LEDR[12] is LEDR[12]
--operation mode is output

LEDR[12] = OUTPUT(SW[12]);


--LEDR[13] is LEDR[13]
--operation mode is output

LEDR[13] = OUTPUT(SW[13]);


--LEDR[14] is LEDR[14]
--operation mode is output

LEDR[14] = OUTPUT(SW[14]);


--LEDR[15] is LEDR[15]
--operation mode is output

LEDR[15] = OUTPUT(SW[15]);


--LEDR[16] is LEDR[16]
--operation mode is output

LEDR[16] = OUTPUT(SW[16]);


--LEDR[17] is LEDR[17]
--operation mode is output

LEDR[17] = OUTPUT(SW[17]);


--SRAM_ADDR[0] is SRAM_ADDR[0]
--operation mode is output

SRAM_ADDR[0] = OUTPUT(A1L107Q);


--SRAM_ADDR[1] is SRAM_ADDR[1]
--operation mode is output

SRAM_ADDR[1] = OUTPUT(A1L109Q);


--SRAM_ADDR[2] is SRAM_ADDR[2]
--operation mode is output

SRAM_ADDR[2] = OUTPUT(A1L111Q);


--SRAM_ADDR[3] is SRAM_ADDR[3]
--operation mode is output

SRAM_ADDR[3] = OUTPUT(A1L113Q);


--SRAM_ADDR[4] is SRAM_ADDR[4]
--operation mode is output

SRAM_ADDR[4] = OUTPUT(A1L115Q);


--SRAM_ADDR[5] is SRAM_ADDR[5]
--operation mode is output

SRAM_ADDR[5] = OUTPUT(A1L117Q);


--SRAM_ADDR[6] is SRAM_ADDR[6]
--operation mode is output

SRAM_ADDR[6] = OUTPUT(A1L119Q);


--SRAM_ADDR[7] is SRAM_ADDR[7]
--operation mode is output

SRAM_ADDR[7] = OUTPUT(A1L121Q);


--SRAM_ADDR[8] is SRAM_ADDR[8]
--operation mode is output

SRAM_ADDR[8] = OUTPUT(A1L123Q);


--SRAM_ADDR[9] is SRAM_ADDR[9]
--operation mode is output

SRAM_ADDR[9] = OUTPUT(A1L125Q);


--SRAM_ADDR[10] is SRAM_ADDR[10]
--operation mode is output

SRAM_ADDR[10] = OUTPUT(A1L127Q);


--SRAM_ADDR[11] is SRAM_ADDR[11]
--operation mode is output

SRAM_ADDR[11] = OUTPUT(A1L129Q);


--SRAM_ADDR[12] is SRAM_ADDR[12]
--operation mode is output

SRAM_ADDR[12] = OUTPUT(A1L131Q);


--SRAM_ADDR[13] is SRAM_ADDR[13]
--operation mode is output

SRAM_ADDR[13] = OUTPUT(A1L133Q);


--SRAM_ADDR[14] is SRAM_ADDR[14]
--operation mode is output

SRAM_ADDR[14] = OUTPUT(A1L135Q);


--SRAM_ADDR[15] is SRAM_ADDR[15]
--operation mode is output

SRAM_ADDR[15] = OUTPUT(A1L137Q);


--SRAM_ADDR[16] is SRAM_ADDR[16]
--operation mode is output

SRAM_ADDR[16] = OUTPUT(A1L139Q);


--SRAM_ADDR[17] is SRAM_ADDR[17]
--operation mode is output

SRAM_ADDR[17] = OUTPUT(A1L141Q);


--SRAM_CE_N is SRAM_CE_N
--operation mode is output

SRAM_CE_N = OUTPUT(GND);


--SRAM_OE_N is SRAM_OE_N
--operation mode is output

SRAM_OE_N = OUTPUT(KEY[2]);


--SRAM_WE_N is SRAM_WE_N
--operation mode is output

SRAM_WE_N = OUTPUT(KEY[0]);


--SRAM_UB_N is SRAM_UB_N
--operation mode is output

SRAM_UB_N = OUTPUT(GND);


--SRAM_LB_N is SRAM_LB_N
--operation mode is output

SRAM_LB_N = OUTPUT(GND);


--A1L163 is SRAM_DQ[0]~15
--operation mode is bidir

A1L163 = SRAM_DQ[0];

--SRAM_DQ[0] is SRAM_DQ[0]
--operation mode is bidir

SRAM_DQ[0]_tri_out = TRI(A1L164Q, A1L233Q);
SRAM_DQ[0] = BIDIR(SRAM_DQ[0]_tri_out);


--A1L166 is SRAM_DQ[1]~14
--operation mode is bidir

A1L166 = SRAM_DQ[1];

--SRAM_DQ[1] is SRAM_DQ[1]
--operation mode is bidir

SRAM_DQ[1]_tri_out = TRI(A1L167Q, A1L233Q);
SRAM_DQ[1] = BIDIR(SRAM_DQ[1]_tri_out);


--A1L169 is SRAM_DQ[2]~13
--operation mode is bidir

A1L169 = SRAM_DQ[2];

--SRAM_DQ[2] is SRAM_DQ[2]
--operation mode is bidir

SRAM_DQ[2]_tri_out = TRI(A1L170Q, A1L233Q);
SRAM_DQ[2] = BIDIR(SRAM_DQ[2]_tri_out);


--A1L172 is SRAM_DQ[3]~12
--operation mode is bidir

A1L172 = SRAM_DQ[3];

--SRAM_DQ[3] is SRAM_DQ[3]
--operation mode is bidir

SRAM_DQ[3]_tri_out = TRI(A1L173Q, A1L233Q);
SRAM_DQ[3] = BIDIR(SRAM_DQ[3]_tri_out);


--A1L175 is SRAM_DQ[4]~11
--operation mode is bidir

A1L175 = SRAM_DQ[4];

--SRAM_DQ[4] is SRAM_DQ[4]
--operation mode is bidir

SRAM_DQ[4]_tri_out = TRI(A1L176Q, A1L233Q);
SRAM_DQ[4] = BIDIR(SRAM_DQ[4]_tri_out);


--A1L178 is SRAM_DQ[5]~10
--operation mode is bidir

A1L178 = SRAM_DQ[5];

--SRAM_DQ[5] is SRAM_DQ[5]
--operation mode is bidir

SRAM_DQ[5]_tri_out = TRI(A1L179Q, A1L233Q);
SRAM_DQ[5] = BIDIR(SRAM_DQ[5]_tri_out);


--A1L181 is SRAM_DQ[6]~9
--operation mode is bidir

A1L181 = SRAM_DQ[6];

--SRAM_DQ[6] is SRAM_DQ[6]
--operation mode is bidir

SRAM_DQ[6]_tri_out = TRI(A1L182Q, A1L233Q);
SRAM_DQ[6] = BIDIR(SRAM_DQ[6]_tri_out);


--A1L184 is SRAM_DQ[7]~8
--operation mode is bidir

A1L184 = SRAM_DQ[7];

--SRAM_DQ[7] is SRAM_DQ[7]
--operation mode is bidir

SRAM_DQ[7]_tri_out = TRI(A1L185Q, A1L233Q);
SRAM_DQ[7] = BIDIR(SRAM_DQ[7]_tri_out);


--A1L187 is SRAM_DQ[8]~7
--operation mode is bidir

A1L187 = SRAM_DQ[8];

--SRAM_DQ[8] is SRAM_DQ[8]
--operation mode is bidir

SRAM_DQ[8]_tri_out = TRI(A1L188Q, A1L233Q);
SRAM_DQ[8] = BIDIR(SRAM_DQ[8]_tri_out);


--A1L190 is SRAM_DQ[9]~6
--operation mode is bidir

A1L190 = SRAM_DQ[9];

--SRAM_DQ[9] is SRAM_DQ[9]
--operation mode is bidir

SRAM_DQ[9]_tri_out = TRI(A1L191Q, A1L233Q);
SRAM_DQ[9] = BIDIR(SRAM_DQ[9]_tri_out);


--A1L193 is SRAM_DQ[10]~5
--operation mode is bidir

A1L193 = SRAM_DQ[10];

--SRAM_DQ[10] is SRAM_DQ[10]
--operation mode is bidir

SRAM_DQ[10]_tri_out = TRI(A1L194Q, A1L233Q);
SRAM_DQ[10] = BIDIR(SRAM_DQ[10]_tri_out);


--A1L196 is SRAM_DQ[11]~4
--operation mode is bidir

A1L196 = SRAM_DQ[11];

--SRAM_DQ[11] is SRAM_DQ[11]
--operation mode is bidir

SRAM_DQ[11]_tri_out = TRI(A1L197Q, A1L233Q);
SRAM_DQ[11] = BIDIR(SRAM_DQ[11]_tri_out);


--A1L199 is SRAM_DQ[12]~3
--operation mode is bidir

A1L199 = SRAM_DQ[12];

--SRAM_DQ[12] is SRAM_DQ[12]
--operation mode is bidir

SRAM_DQ[12]_tri_out = TRI(A1L200Q, A1L233Q);
SRAM_DQ[12] = BIDIR(SRAM_DQ[12]_tri_out);


--A1L202 is SRAM_DQ[13]~2
--operation mode is bidir

A1L202 = SRAM_DQ[13];

--SRAM_DQ[13] is SRAM_DQ[13]
--operation mode is bidir

SRAM_DQ[13]_tri_out = TRI(A1L203Q, A1L233Q);
SRAM_DQ[13] = BIDIR(SRAM_DQ[13]_tri_out);


--A1L205 is SRAM_DQ[14]~1
--operation mode is bidir

A1L205 = SRAM_DQ[14];

--SRAM_DQ[14] is SRAM_DQ[14]
--operation mode is bidir

SRAM_DQ[14]_tri_out = TRI(A1L206Q, A1L233Q);
SRAM_DQ[14] = BIDIR(SRAM_DQ[14]_tri_out);


--A1L208 is SRAM_DQ[15]~0
--operation mode is bidir

A1L208 = SRAM_DQ[15];

--SRAM_DQ[15] is SRAM_DQ[15]
--operation mode is bidir

SRAM_DQ[15]_tri_out = TRI(A1L209Q, A1L233Q);
SRAM_DQ[15] = BIDIR(SRAM_DQ[15]_tri_out);