📄 cc2420db_library.lss
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cc2420db_library.elf: file format elf32-avr
Sections:
Idx Name Size VMA LMA File off Algn
0 .data 000000b2 00800100 00002174 00002208 2**0
CONTENTS, ALLOC, LOAD, DATA
1 .text 00002174 00000000 00000000 00000094 2**0
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .bss 00000104 008001b2 008001b2 000022ba 2**0
ALLOC
3 .noinit 00000000 008002b6 008002b6 000022ba 2**0
CONTENTS
4 .eeprom 00000000 00810000 00810000 000022ba 2**0
CONTENTS
5 .stab 000021a8 00000000 00000000 000022bc 2**2
CONTENTS, READONLY, DEBUGGING
6 .stabstr 00001282 00000000 00000000 00004464 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
00000000 <__vectors>:
0: 0c 94 46 00 jmp 0x8c
4: 0c 94 99 08 jmp 0x1132
8: 0c 94 63 00 jmp 0xc6
c: 0c 94 63 00 jmp 0xc6
10: 0c 94 63 00 jmp 0xc6
14: 0c 94 63 00 jmp 0xc6
18: 0c 94 63 00 jmp 0xc6
1c: 0c 94 63 00 jmp 0xc6
20: 0c 94 63 00 jmp 0xc6
24: 0c 94 63 00 jmp 0xc6
28: 0c 94 63 00 jmp 0xc6
2c: 0c 94 63 00 jmp 0xc6
30: 0c 94 63 00 jmp 0xc6
34: 0c 94 63 00 jmp 0xc6
38: 0c 94 63 00 jmp 0xc6
3c: 0c 94 63 00 jmp 0xc6
40: 0c 94 63 00 jmp 0xc6
44: 0c 94 63 00 jmp 0xc6
48: 0c 94 63 00 jmp 0xc6
4c: 0c 94 63 00 jmp 0xc6
50: 0c 94 63 00 jmp 0xc6
54: 0c 94 63 00 jmp 0xc6
58: 0c 94 63 00 jmp 0xc6
5c: 0c 94 63 00 jmp 0xc6
60: 0c 94 63 00 jmp 0xc6
64: 0c 94 63 00 jmp 0xc6
68: 0c 94 63 00 jmp 0xc6
6c: 0c 94 63 00 jmp 0xc6
70: 0c 94 63 00 jmp 0xc6
74: 0c 94 63 00 jmp 0xc6
78: 0c 94 63 00 jmp 0xc6
7c: 0c 94 63 00 jmp 0xc6
80: 0c 94 63 00 jmp 0xc6
84: 0c 94 63 00 jmp 0xc6
88: 0c 94 63 00 jmp 0xc6
0000008c <__ctors_end>:
8c: 11 24 eor r1, r1
8e: 1f be out 0x3f, r1 ; 63
90: cf ef ldi r28, 0xFF ; 255
92: d0 e1 ldi r29, 0x10 ; 16
94: de bf out 0x3e, r29 ; 62
96: cd bf out 0x3d, r28 ; 61
00000098 <__do_copy_data>:
98: 11 e0 ldi r17, 0x01 ; 1
9a: a0 e0 ldi r26, 0x00 ; 0
9c: b1 e0 ldi r27, 0x01 ; 1
9e: e4 e7 ldi r30, 0x74 ; 116
a0: f1 e2 ldi r31, 0x21 ; 33
a2: 00 e0 ldi r16, 0x00 ; 0
a4: 0b bf out 0x3b, r16 ; 59
a6: 02 c0 rjmp .+4 ; 0xac
000000a8 <.__do_copy_data_loop>:
a8: 07 90 elpm r0, Z+
aa: 0d 92 st X+, r0
000000ac <.__do_copy_data_start>:
ac: a2 3b cpi r26, 0xB2 ; 178
ae: b1 07 cpc r27, r17
b0: d9 f7 brne .-10 ; 0xa8
000000b2 <__do_clear_bss>:
b2: 12 e0 ldi r17, 0x02 ; 2
b4: a2 eb ldi r26, 0xB2 ; 178
b6: b1 e0 ldi r27, 0x01 ; 1
b8: 01 c0 rjmp .+2 ; 0xbc
000000ba <.do_clear_bss_loop>:
ba: 1d 92 st X+, r1
000000bc <.do_clear_bss_start>:
bc: a6 3b cpi r26, 0xB6 ; 182
be: b1 07 cpc r27, r17
c0: e1 f7 brne .-8 ; 0xba
c2: 0c 94 34 06 jmp 0xc68
000000c6 <__bad_interrupt>:
c6: 0c 94 00 00 jmp 0x0
000000ca <basicRfReceivePacket>:
* The pointer to the next BASIC_RF_RX_INFO structure to be used by the *
* FIFOP ISR. If there is only one buffer, then return pRRI. *
*******************************************************************************/
BASIC_RF_RX_INFO* basicRfReceivePacket(BASIC_RF_RX_INFO *pRRI)
{
ca: 0f 93 push r16
cc: 1f 93 push r17
ce: 8c 01 movw r16, r24
/* blink the red led */
SET_RLED();
d0: 1b 9a sbi 0x03, 3 ; 3
halWait(10000);
d2: 80 e1 ldi r24, 0x10 ; 16
d4: 97 e2 ldi r25, 0x27 ; 39
d6: 0e 94 80 06 call 0xd00
CLR_RLED();
da: 1b 98 cbi 0x03, 3 ; 3
/* signal packet reception */
sig_packet_rx = TRUE;
dc: 81 e0 ldi r24, 0x01 ; 1
de: 80 93 b2 01 sts 0x01B2, r24
/* continue using the (one and only) reception structure */
return pRRI;
}
e2: c8 01 movw r24, r16
e4: 1f 91 pop r17
e6: 0f 91 pop r16
e8: 08 95 ret
000000ea <RfSendPacket>:
/*******************************************************************************
* Function: RF Send Packet. *
*******************************************************************************/
int RfSendPacket(BASIC_RF_TX_INFO *rfTxInfo)
{
ea: cf 93 push r28
ec: df 93 push r29
int status;
status = basicRfSendPacket(rfTxInfo);
ee: 0e 94 71 07 call 0xee2
f2: c8 2f mov r28, r24
f4: dd 27 eor r29, r29
if (status)
f6: 20 97 sbiw r28, 0x00 ; 0
f8: 39 f0 breq .+14 ; 0x108
{
/* blink the yellow led */
SET_YLED();
fa: 1c 9a sbi 0x03, 4 ; 3
halWait(10000);
fc: 80 e1 ldi r24, 0x10 ; 16
fe: 97 e2 ldi r25, 0x27 ; 39
100: 0e 94 80 06 call 0xd00
CLR_YLED();
104: 1c 98 cbi 0x03, 4 ; 3
106: 06 c0 rjmp .+12 ; 0x114
}
else
{
/* blink the orange led */
SET_OLED();
108: c4 9a sbi 0x18, 4 ; 24
halWait(10000);
10a: 80 e1 ldi r24, 0x10 ; 16
10c: 97 e2 ldi r25, 0x27 ; 39
10e: 0e 94 80 06 call 0xd00
CLR_OLED();
112: c4 98 cbi 0x18, 4 ; 24
}
/* return status */
return status;
}
114: ce 01 movw r24, r28
116: df 91 pop r29
118: cf 91 pop r28
11a: 08 95 ret
0000011c <read_at_register>:
/*******************************************************************************
* Function: Read ATmega128 register. *
*******************************************************************************/
int read_at_register(char *command, char *response)
{
11c: ef 92 push r14
11e: ff 92 push r15
120: 0f 93 push r16
122: 1f 93 push r17
124: cf 93 push r28
126: df 93 push r29
128: cd b7 in r28, 0x3d ; 61
12a: de b7 in r29, 0x3e ; 62
12c: 22 97 sbiw r28, 0x02 ; 2
12e: 0f b6 in r0, 0x3f ; 63
130: f8 94 cli
132: de bf out 0x3e, r29 ; 62
134: 0f be out 0x3f, r0 ; 63
136: cd bf out 0x3d, r28 ; 61
138: 8c 01 movw r16, r24
13a: 7b 01 movw r14, r22
int status;
unsigned int address = 0, value = 0;
13c: 19 82 std Y+1, r1 ; 0x01
13e: 1a 82 std Y+2, r1 ; 0x02
/* parse command argument(s) */
status = sscanf(&command[1], "%2X", &address);
140: ce 01 movw r24, r28
142: 01 96 adiw r24, 0x01 ; 1
144: 9f 93 push r25
146: 8f 93 push r24
148: 80 e0 ldi r24, 0x00 ; 0
14a: 91 e0 ldi r25, 0x01 ; 1
14c: 9f 93 push r25
14e: 8f 93 push r24
150: 0f 5f subi r16, 0xFF ; 255
152: 1f 4f sbci r17, 0xFF ; 255
154: 1f 93 push r17
156: 0f 93 push r16
158: 0e 94 31 0a call 0x1462
/* execute command */
value = _SFR_MEM8(address);
15c: e9 81 ldd r30, Y+1 ; 0x01
15e: fa 81 ldd r31, Y+2 ; 0x02
160: 80 81 ld r24, Z
162: 99 27 eor r25, r25
/* generate command response */
status = sprintf(&response[0], ":%c%02X%02X\r\n",
164: 9f 93 push r25
166: 8f 93 push r24
168: 89 81 ldd r24, Y+1 ; 0x01
16a: 9a 81 ldd r25, Y+2 ; 0x02
16c: 9f 93 push r25
16e: 8f 93 push r24
170: f8 01 movw r30, r16
172: 82 91 ld r24, -Z
174: 99 27 eor r25, r25
176: 9f 93 push r25
178: 8f 93 push r24
17a: 84 e0 ldi r24, 0x04 ; 4
17c: 91 e0 ldi r25, 0x01 ; 1
17e: 9f 93 push r25
180: 8f 93 push r24
182: ff 92 push r15
184: ef 92 push r14
186: 0e 94 00 0a call 0x1400
command[0], address, value);
/* return status */
return status;
18a: 2d b7 in r18, 0x3d ; 61
18c: 3e b7 in r19, 0x3e ; 62
18e: 20 5f subi r18, 0xF0 ; 240
190: 3f 4f sbci r19, 0xFF ; 255
192: 0f b6 in r0, 0x3f ; 63
194: f8 94 cli
196: 3e bf out 0x3e, r19 ; 62
198: 0f be out 0x3f, r0 ; 63
19a: 2d bf out 0x3d, r18 ; 61
19c: 22 96 adiw r28, 0x02 ; 2
19e: 0f b6 in r0, 0x3f ; 63
1a0: f8 94 cli
1a2: de bf out 0x3e, r29 ; 62
1a4: 0f be out 0x3f, r0 ; 63
1a6: cd bf out 0x3d, r28 ; 61
1a8: df 91 pop r29
1aa: cf 91 pop r28
1ac: 1f 91 pop r17
1ae: 0f 91 pop r16
1b0: ff 90 pop r15
1b2: ef 90 pop r14
1b4: 08 95 ret
000001b6 <write_at_register>:
}
/*******************************************************************************
* Function: Write ATmega128 register. *
*******************************************************************************/
int write_at_register(char *command, char *response)
{
1b6: ef 92 push r14
1b8: ff 92 push r15
1ba: 0f 93 push r16
1bc: 1f 93 push r17
1be: cf 93 push r28
1c0: df 93 push r29
1c2: cd b7 in r28, 0x3d ; 61
1c4: de b7 in r29, 0x3e ; 62
1c6: 24 97 sbiw r28, 0x04 ; 4
1c8: 0f b6 in r0, 0x3f ; 63
1ca: f8 94 cli
1cc: de bf out 0x3e, r29 ; 62
1ce: 0f be out 0x3f, r0 ; 63
1d0: cd bf out 0x3d, r28 ; 61
1d2: 8c 01 movw r16, r24
1d4: 7b 01 movw r14, r22
int status;
unsigned int address = 0, value = 0;
1d6: 80 e0 ldi r24, 0x00 ; 0
1d8: 90 e0 ldi r25, 0x00 ; 0
1da: 8b 83 std Y+3, r24 ; 0x03
1dc: 9c 83 std Y+4, r25 ; 0x04
1de: 89 83 std Y+1, r24 ; 0x01
1e0: 9a 83 std Y+2, r25 ; 0x02
/* parse command argument(s) */
status = sscanf(&command[1], "%2X%2X", &address, &value);
1e2: ce 01 movw r24, r28
1e4: 01 96 adiw r24, 0x01 ; 1
1e6: 9f 93 push r25
1e8: 8f 93 push r24
1ea: ce 01 movw r24, r28
1ec: 03 96 adiw r24, 0x03 ; 3
1ee: 9f 93 push r25
1f0: 8f 93 push r24
1f2: 82 e1 ldi r24, 0x12 ; 18
1f4: 91 e0 ldi r25, 0x01 ; 1
1f6: 9f 93 push r25
1f8: 8f 93 push r24
1fa: 0f 5f subi r16, 0xFF ; 255
1fc: 1f 4f sbci r17, 0xFF ; 255
1fe: 1f 93 push r17
200: 0f 93 push r16
202: 0e 94 31 0a call 0x1462
/* execute command */
_SFR_MEM8(address) = value;
206: eb 81 ldd r30, Y+3 ; 0x03
208: fc 81 ldd r31, Y+4 ; 0x04
20a: 89 81 ldd r24, Y+1 ; 0x01
20c: 80 83 st Z, r24
/* generate command response */
status = sprintf(&response[0], ":%c%02X%02X\r\n",
20e: 89 81 ldd r24, Y+1 ; 0x01
210: 9a 81 ldd r25, Y+2 ; 0x02
212: 9f 93 push r25
214: 8f 93 push r24
216: 8b 81 ldd r24, Y+3 ; 0x03
218: 9c 81 ldd r25, Y+4 ; 0x04
21a: 9f 93 push r25
21c: 8f 93 push r24
21e: f8 01 movw r30, r16
220: 82 91 ld r24, -Z
222: 99 27 eor r25, r25
224: 9f 93 push r25
226: 8f 93 push r24
228: 84 e0 ldi r24, 0x04 ; 4
22a: 91 e0 ldi r25, 0x01 ; 1
22c: 9f 93 push r25
22e: 8f 93 push r24
230: ff 92 push r15
232: ef 92 push r14
234: 0e 94 00 0a call 0x1400
command[0], address, value);
/* return status */
return status;
238: 2d b7 in r18, 0x3d ; 61
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