📄 os_cpu_a.asm
字号:
col 132
;Company : INTRACOM SA
;Project :
;
;Title : OS CPU ASSEMBLY MODULE
;Description : RTOS kernel (hardware-specific) functions
;File : OS_CPU_A.asm
;Type : Assembly v850 (IAR AV850)
;Library :
;
;Author : Argiris Diamandis (ardia@intracom.gr)
;Comments :
;
;Dependencies : macdefs.inc
;Inputs :
;Outputs :
;
;Revisions :
;Version : (Version) (dd/mm/yy) changes
; x.xx ddmmyy Create file
; 0.01 01/11/2000
;
;====================================================================
;====================================================================
;
; BUILD INFORMATION
; -----------------
; CODE MODEL: NORMAL
; MEMORY MODEL: LARGE WITH SADDR
; REGISTER LOCKING: 6 REGISTERS
; REGISTER CONSTANTS: YES (2 REGISTERS)
;
; Currently, all interrupts are non-nested.
;
;====================================================================
;====================================================================
;
;====================================================================
;
; TASK STACK FRAME IS:
;
; Low Address -> R1 <- Stack pointer
; R2
; R5
; R6
; R7
; R8
; R9
; R10
; R11
; R12
; R13
; R14
; R15
; R16
; EIPC
; EIPSW
; R31
; R30
; R29
; R28
; R27
; R26
; R25
; R24
; High Address -> R23
;
;
;====================================================================
#include "macdefs.inc"
name OS_Core
;====================================================================
;====================================================================
;====================================================================
;====================================================================
COMMON INTVEC:CODE
;====================================================================
;====================================================================
;====================================================================
;====================================================================
;********************************************************************
;
; function:
; description: Trap 0x10 vector used for context switch
;
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
; --- Uses --------------------------------------------------
; IO :
; Mem:
; --- Input -------------------------------------------------
; --- Output ------------------------------------------------
; --- Notes -------------------------------------------------
;
; Right now, all TRAPs to $1x are trated the same way
;
;
;====================================================================
org 50h
jr OSCtxSW
;********************************************************************
;
; function:
; description: Timer 40 compare match interrupt used for system
; tick interrupt
;
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
; --- Uses --------------------------------------------------
; IO :
; Mem:
; --- Input -------------------------------------------------
; --- Output ------------------------------------------------
; --- Notes -------------------------------------------------
;
;
;
;====================================================================
org 0x280
jr OSTickIntr
;====================================================================
;====================================================================
;====================================================================
;====================================================================
rseg CODE:CODE
;====================================================================
;====================================================================
;====================================================================
;====================================================================
extern OSTaskSwHook, OSTCBHighRdy, OSPrioHighRdy, OSRunning, OSTCBCur
extern OSPrioCur, OSIntNesting, OSTimeTick, OSIntExit
public OSStartHighRdy, OSCtxSW, OSIntCtxSw, OS_Restore_CPU_Context
;********************************************************************
;
; function: OS_Restore_CPU_Context
; description: Restore all CPU registers from current stack pointer
;
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
;
; --- Uses --------------------------------------------------
; IO :
; Mem:
; --- Input -------------------------------------------------
; --- Output ------------------------------------------------
; --- Notes -------------------------------------------------
;
; R0 is always zero
; R3 is the stack pointer
; R4 is not used by the compiler
; R17 is used as scratchpad
; R18-R19 are used for constants
; R20 is not used by the compiler
; R21-R22 are used by macros for scratchpad (SP saves etc)
;====================================================================
OS_Restore_CPU_Context:
mov sp, ep
sld.w 4[ep], r2
sld.w 8[ep], r5
sld.w 12[ep],r6
sld.w 16[ep],r7
sld.w 20[ep],r8
sld.w 24[ep],r9
sld.w 28[ep],r10
sld.w 32[ep],r11
sld.w 36[ep],r12
sld.w 40[ep],r13
sld.w 44[ep],r14
sld.w 48[ep],r15
sld.w 52[ep],r16
;See what was the latest interruption (trap or interrupt)
stsr ecr, r17 ;Move ecr to r17
mov 0x050,r1
cmp r1, r17 ;If latest break was due to TRAP, set EP
be _SetEP
_ClrEP:
mov 0x20, r17 ;Set only ID
ldsr r17, psw
;Restore caller address
sld.w 56[ep], r1
ldsr r1, EIPC
;Restore PSW
sld.w 60[ep], r1
andi 0xffdf,r1,r1
ldsr r1, EIPSW
sld.w 0[ep], r1
dispose (8+(4*14)),{r23,r24,r25,r26,r27,r28,r29,r30,r31}
;Return from interrupt starts new task!
reti
_SetEP:
mov 0x60, r17 ;Set both EIPC and ID bits
ldsr r17, psw
;Restore caller address
sld.w 56[ep], r1
ldsr r1, EIPC
;Restore PSW
sld.w 60[ep], r1
andi 0xffdf,r1,r1
ldsr r1, EIPSW
sld.w 0[ep], r1
dispose (8+(4*14)),{r23,r24,r25,r26,r27,r28,r29,r30,r31}
;Return from interrupt starts new task!
reti
;********************************************************************
;
; function:
; description:
;
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
;
; --- Uses --------------------------------------------------
; IO :
; Mem:
;
; --- Input -------------------------------------------------
;
;
;
;
;
; --- Output ------------------------------------------------
;
;
; --- Notes -------------------------------------------------
;
;====================================================================
OSStartHighRdy:
;Call user-specific Task Switch Hook function
jarl OSTaskSwHook, lp
;Load stack pointer of the task to run
mov OSTCBHighRdy, r1 ;Point to the pointer variable OSTCBHighRdy
ld.w 0[r1], r1 ;Read pointer to struct
ld.w 0[r1], sp ;load sp from struct
;Set OSRunning to TRUE =0x01
mov OSRunning, r1
mov 0x01, r2
st.b r2, 0[r1]
;Restore all Processor registers from stack and return from interrupt
jr OS_Restore_CPU_Context
;********************************************************************
; function:
; description:
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
; --- Uses --------------------------------------------------
; IO :
; Mem:
; --- Input -------------------------------------------------
; --- Output ------------------------------------------------
; --- Notes -------------------------------------------------
; R0 is always zero
; R3 is the stack pointer
; R4 is not used by the compiler
; R17 is used as scratchpad
; R18-R19 are used for constants
; R20 is not used by the compiler
; R21-R22 are used by macros for scratchpad (SP saves etc)
;====================================================================
OSCtxSW:
SAVE_CPU_CTX ;Save all CPU registers
SAVE_SP ;Save SP to current task TCB
OSIntCtxSw:
;Call user-specific Task Switch Hook function
jarl OSTaskSwHook, lp
;Set current TCB the same as the HIGH tcb
mov OSTCBHighRdy, r1 ;Get the address of the HIGH TCB pointer
ld.w 0[r1], r5 ;Get the address the pointer is pointing to
mov OSTCBCur, r2 ;Now point to the OSTCBCur
st.w r5, 0[r2] ;and make it show at the same TCB.
;Update current priority for new task
mov OSPrioHighRdy, r1 ;Copy High priority
ld.bu 0[r1], r2
mov OSPrioCur, r1 ;to current task's priority
st.b r2, 0[r1]
;Load stack pointer of the task to run
ld.w 0[r5], sp ;Reget pointer to struct
;Restore all Processor registers from stack and return from interrupt
jr OS_Restore_CPU_Context
;********************************************************************
;
; function:
; description:
;
; --- Modifies ----------------------------------------------
; IO :
; Mem:
; CPU:
; --- Uses --------------------------------------------------
; IO :
; Mem:
; --- Input -------------------------------------------------
; --- Output ------------------------------------------------
; --- Notes -------------------------------------------------
;
; Normally, interrupts will be disabled while we are in this handler
;
;
;====================================================================
OSTickIntr:
ISR_ENTRY
;Call OSTimeTick()
jarl OSTimeTick, lp
ISR_EXIT
end
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