📄 io_map.h
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#define PWM_PMCNT_CNT4_MASK 16U
#define PWM_PMCNT_CNT5_MASK 32U
#define PWM_PMCNT_CNT6_MASK 64U
#define PWM_PMCNT_CNT7_MASK 128U
#define PWM_PMCNT_CNT8_MASK 256U
#define PWM_PMCNT_CNT9_MASK 512U
#define PWM_PMCNT_CNT10_MASK 1024U
#define PWM_PMCNT_CNT11_MASK 2048U
#define PWM_PMCNT_CNT12_MASK 4096U
#define PWM_PMCNT_CNT13_MASK 8192U
#define PWM_PMCNT_CNT14_MASK 16384U
#define PWM_PMCNT_CNT_MASK 32767U
#define PWM_PMCNT_CNT_BITNUM 0U
#define PWM_PMCNT *((volatile word *)0x0000F044)
/*** PWM_PWMCM - PWM counter modulo register; 0x0000F045 ***/
union {
word Word;
} PWM_PWMCM_STR;
#define PWM_PWMCM_CM0_MASK 1U
#define PWM_PWMCM_CM1_MASK 2U
#define PWM_PWMCM_CM2_MASK 4U
#define PWM_PWMCM_CM3_MASK 8U
#define PWM_PWMCM_CM4_MASK 16U
#define PWM_PWMCM_CM5_MASK 32U
#define PWM_PWMCM_CM6_MASK 64U
#define PWM_PWMCM_CM7_MASK 128U
#define PWM_PWMCM_CM8_MASK 256U
#define PWM_PWMCM_CM9_MASK 512U
#define PWM_PWMCM_CM10_MASK 1024U
#define PWM_PWMCM_CM11_MASK 2048U
#define PWM_PWMCM_CM12_MASK 4096U
#define PWM_PWMCM_CM13_MASK 8192U
#define PWM_PWMCM_CM14_MASK 16384U
#define PWM_PWMCM_CM_MASK 32767U
#define PWM_PWMCM_CM_BITNUM 0U
#define PWM_PWMCM *((volatile word *)0x0000F045)
/*** PWM_PWMVAL0 - PWM value register 0; 0x0000F046 ***/
union {
word Word;
} PWM_PWMVAL0_STR;
#define PWM_PWMVAL0_VAL0_MASK 1U
#define PWM_PWMVAL0_VAL1_MASK 2U
#define PWM_PWMVAL0_VAL2_MASK 4U
#define PWM_PWMVAL0_VAL3_MASK 8U
#define PWM_PWMVAL0_VAL4_MASK 16U
#define PWM_PWMVAL0_VAL5_MASK 32U
#define PWM_PWMVAL0_VAL6_MASK 64U
#define PWM_PWMVAL0_VAL7_MASK 128U
#define PWM_PWMVAL0_VAL8_MASK 256U
#define PWM_PWMVAL0_VAL9_MASK 512U
#define PWM_PWMVAL0_VAL10_MASK 1024U
#define PWM_PWMVAL0_VAL11_MASK 2048U
#define PWM_PWMVAL0_VAL12_MASK 4096U
#define PWM_PWMVAL0_VAL13_MASK 8192U
#define PWM_PWMVAL0_VAL14_MASK 16384U
#define PWM_PWMVAL0_VAL15_MASK 32768U
#define PWM_PWMVAL0 *((volatile word *)0x0000F046)
/*** PWM_PWMVAL1 - PWM value register 1; 0x0000F047 ***/
union {
word Word;
} PWM_PWMVAL1_STR;
#define PWM_PWMVAL1_VAL0_MASK 1U
#define PWM_PWMVAL1_VAL1_MASK 2U
#define PWM_PWMVAL1_VAL2_MASK 4U
#define PWM_PWMVAL1_VAL3_MASK 8U
#define PWM_PWMVAL1_VAL4_MASK 16U
#define PWM_PWMVAL1_VAL5_MASK 32U
#define PWM_PWMVAL1_VAL6_MASK 64U
#define PWM_PWMVAL1_VAL7_MASK 128U
#define PWM_PWMVAL1_VAL8_MASK 256U
#define PWM_PWMVAL1_VAL9_MASK 512U
#define PWM_PWMVAL1_VAL10_MASK 1024U
#define PWM_PWMVAL1_VAL11_MASK 2048U
#define PWM_PWMVAL1_VAL12_MASK 4096U
#define PWM_PWMVAL1_VAL13_MASK 8192U
#define PWM_PWMVAL1_VAL14_MASK 16384U
#define PWM_PWMVAL1_VAL15_MASK 32768U
#define PWM_PWMVAL1 *((volatile word *)0x0000F047)
/*** PWM_PWMVAL2 - PWM value register 2; 0x0000F048 ***/
union {
word Word;
} PWM_PWMVAL2_STR;
#define PWM_PWMVAL2_VAL0_MASK 1U
#define PWM_PWMVAL2_VAL1_MASK 2U
#define PWM_PWMVAL2_VAL2_MASK 4U
#define PWM_PWMVAL2_VAL3_MASK 8U
#define PWM_PWMVAL2_VAL4_MASK 16U
#define PWM_PWMVAL2_VAL5_MASK 32U
#define PWM_PWMVAL2_VAL6_MASK 64U
#define PWM_PWMVAL2_VAL7_MASK 128U
#define PWM_PWMVAL2_VAL8_MASK 256U
#define PWM_PWMVAL2_VAL9_MASK 512U
#define PWM_PWMVAL2_VAL10_MASK 1024U
#define PWM_PWMVAL2_VAL11_MASK 2048U
#define PWM_PWMVAL2_VAL12_MASK 4096U
#define PWM_PWMVAL2_VAL13_MASK 8192U
#define PWM_PWMVAL2_VAL14_MASK 16384U
#define PWM_PWMVAL2_VAL15_MASK 32768U
#define PWM_PWMVAL2 *((volatile word *)0x0000F048)
/*** PWM_PWMVAL3 - PWM value register 3; 0x0000F049 ***/
union {
word Word;
} PWM_PWMVAL3_STR;
#define PWM_PWMVAL3_VAL0_MASK 1U
#define PWM_PWMVAL3_VAL1_MASK 2U
#define PWM_PWMVAL3_VAL2_MASK 4U
#define PWM_PWMVAL3_VAL3_MASK 8U
#define PWM_PWMVAL3_VAL4_MASK 16U
#define PWM_PWMVAL3_VAL5_MASK 32U
#define PWM_PWMVAL3_VAL6_MASK 64U
#define PWM_PWMVAL3_VAL7_MASK 128U
#define PWM_PWMVAL3_VAL8_MASK 256U
#define PWM_PWMVAL3_VAL9_MASK 512U
#define PWM_PWMVAL3_VAL10_MASK 1024U
#define PWM_PWMVAL3_VAL11_MASK 2048U
#define PWM_PWMVAL3_VAL12_MASK 4096U
#define PWM_PWMVAL3_VAL13_MASK 8192U
#define PWM_PWMVAL3_VAL14_MASK 16384U
#define PWM_PWMVAL3_VAL15_MASK 32768U
#define PWM_PWMVAL3 *((volatile word *)0x0000F049)
/*** PWM_PWMVAL4 - PWM value register 4; 0x0000F04A ***/
union {
word Word;
} PWM_PWMVAL4_STR;
#define PWM_PWMVAL4_VAL0_MASK 1U
#define PWM_PWMVAL4_VAL1_MASK 2U
#define PWM_PWMVAL4_VAL2_MASK 4U
#define PWM_PWMVAL4_VAL3_MASK 8U
#define PWM_PWMVAL4_VAL4_MASK 16U
#define PWM_PWMVAL4_VAL5_MASK 32U
#define PWM_PWMVAL4_VAL6_MASK 64U
#define PWM_PWMVAL4_VAL7_MASK 128U
#define PWM_PWMVAL4_VAL8_MASK 256U
#define PWM_PWMVAL4_VAL9_MASK 512U
#define PWM_PWMVAL4_VAL10_MASK 1024U
#define PWM_PWMVAL4_VAL11_MASK 2048U
#define PWM_PWMVAL4_VAL12_MASK 4096U
#define PWM_PWMVAL4_VAL13_MASK 8192U
#define PWM_PWMVAL4_VAL14_MASK 16384U
#define PWM_PWMVAL4_VAL15_MASK 32768U
#define PWM_PWMVAL4 *((volatile word *)0x0000F04A)
/*** PWM_PWMVAL5 - PWM value register 5; 0x0000F04B ***/
union {
word Word;
} PWM_PWMVAL5_STR;
#define PWM_PWMVAL5_VAL0_MASK 1U
#define PWM_PWMVAL5_VAL1_MASK 2U
#define PWM_PWMVAL5_VAL2_MASK 4U
#define PWM_PWMVAL5_VAL3_MASK 8U
#define PWM_PWMVAL5_VAL4_MASK 16U
#define PWM_PWMVAL5_VAL5_MASK 32U
#define PWM_PWMVAL5_VAL6_MASK 64U
#define PWM_PWMVAL5_VAL7_MASK 128U
#define PWM_PWMVAL5_VAL8_MASK 256U
#define PWM_PWMVAL5_VAL9_MASK 512U
#define PWM_PWMVAL5_VAL10_MASK 1024U
#define PWM_PWMVAL5_VAL11_MASK 2048U
#define PWM_PWMVAL5_VAL12_MASK 4096U
#define PWM_PWMVAL5_VAL13_MASK 8192U
#define PWM_PWMVAL5_VAL14_MASK 16384U
#define PWM_PWMVAL5_VAL15_MASK 32768U
#define PWM_PWMVAL5 *((volatile word *)0x0000F04B)
/*** PWM_PMDEADTM0 - PWM deadtime register 0; 0x0000F04C ***/
union {
word Word;
} PWM_PMDEADTM0_STR;
#define PWM_PMDEADTM0_PWMDT00_MASK 1U
#define PWM_PMDEADTM0_PWMDT01_MASK 2U
#define PWM_PMDEADTM0_PWMDT02_MASK 4U
#define PWM_PMDEADTM0_PWMDT03_MASK 8U
#define PWM_PMDEADTM0_PWMDT04_MASK 16U
#define PWM_PMDEADTM0_PWMDT05_MASK 32U
#define PWM_PMDEADTM0_PWMDT06_MASK 64U
#define PWM_PMDEADTM0_PWMDT07_MASK 128U
#define PWM_PMDEADTM0_PWMDT08_MASK 256U
#define PWM_PMDEADTM0_PWMDT09_MASK 512U
#define PWM_PMDEADTM0_PWMDT010_MASK 1024U
#define PWM_PMDEADTM0_PWMDT011_MASK 2048U
#define PWM_PMDEADTM0_PWMDT0_MASK 4095U
#define PWM_PMDEADTM0_PWMDT0_BITNUM 0U
#define PWM_PMDEADTM0 *((volatile word *)0x0000F04C)
/*** PWM_PMDEADTM1 - PWM deadtime register 1; 0x0000F04D ***/
union {
word Word;
} PWM_PMDEADTM1_STR;
#define PWM_PMDEADTM1_PWMDT10_MASK 1U
#define PWM_PMDEADTM1_PWMDT11_MASK 2U
#define PWM_PMDEADTM1_PWMDT12_MASK 4U
#define PWM_PMDEADTM1_PWMDT13_MASK 8U
#define PWM_PMDEADTM1_PWMDT14_MASK 16U
#define PWM_PMDEADTM1_PWMDT15_MASK 32U
#define PWM_PMDEADTM1_PWMDT16_MASK 64U
#define PWM_PMDEADTM1_PWMDT17_MASK 128U
#define PWM_PMDEADTM1_PWMDT18_MASK 256U
#define PWM_PMDEADTM1_PWMDT19_MASK 512U
#define PWM_PMDEADTM1_PWMDT110_MASK 1024U
#define PWM_PMDEADTM1_PWMDT111_MASK 2048U
#define PWM_PMDEADTM1_PWMDT1_MASK 4095U
#define PWM_PMDEADTM1_PWMDT1_BITNUM 0U
#define PWM_PMDEADTM1 *((volatile word *)0x0000F04D)
/*** PWM_PMDISMAP1 - PWM disable mapping register one; 0x0000F04E ***/
union {
word Word;
} PWM_PMDISMAP1_STR;
#define PWM_PMDISMAP1_DISMAP0_MASK 1U
#define PWM_PMDISMAP1_DISMAP1_MASK 2U
#define PWM_PMDISMAP1_DISMAP2_MASK 4U
#define PWM_PMDISMAP1_DISMAP3_MASK 8U
#define PWM_PMDISMAP1_DISMAP4_MASK 16U
#define PWM_PMDISMAP1_DISMAP5_MASK 32U
#define PWM_PMDISMAP1_DISMAP6_MASK 64U
#define PWM_PMDISMAP1_DISMAP7_MASK 128U
#define PWM_PMDISMAP1_DISMAP8_MASK 256U
#define PWM_PMDISMAP1_DISMAP9_MASK 512U
#define PWM_PMDISMAP1_DISMAP10_MASK 1024U
#define PWM_PMDISMAP1_DISMAP11_MASK 2048U
#define PWM_PMDISMAP1_DISMAP12_MASK 4096U
#define PWM_PMDISMAP1_DISMAP13_MASK 8192U
#define PWM_PMDISMAP1_DISMAP14_MASK 16384U
#define PWM_PMDISMAP1_DISMAP15_MASK 32768U
#define PWM_PMDISMAP1 *((volatile word *)0x0000F04E)
/*** PWM_PMDISMAP2 - PWM disable mapping register two; 0x0000F04F ***/
union {
word Word;
} PWM_PMDISMAP2_STR;
#define PWM_PMDISMAP2_DISMAP0_MASK 1U
#define PWM_PMDISMAP2_DISMAP1_MASK 2U
#define PWM_PMDISMAP2_DISMAP2_MASK 4U
#define PWM_PMDISMAP2_DISMAP3_MASK 8U
#define PWM_PMDISMAP2_DISMAP4_MASK 16U
#define PWM_PMDISMAP2_DISMAP5_MASK 32U
#define PWM_PMDISMAP2_DISMAP6_MASK 64U
#define PWM_PMDISMAP2_DISMAP7_MASK 128U
#define PWM_PMDISMAP2_DISMAP_MASK 255U
#define PWM_PMDISMAP2_DISMAP_BITNUM 0U
#define PWM_PMDISMAP2 *((volatile word *)0x0000F04F)
/*** PWM_PMCFG - PWM config register; 0x0000F050 ***/
union {
word Word;
} PWM_PMCFG_STR;
#define PWM_PMCFG_WP_MASK 1U
#define PWM_PMCFG_INDEP01_MASK 2U
#define PWM_PMCFG_INDEP23_MASK 4U
#define PWM_PMCFG_INDEP45_MASK 8U
#define PWM_PMCFG_BOTNEG01_MASK 16U
#define PWM_PMCFG_BOTNEG23_MASK 32U
#define PWM_PMCFG_BOTNEG45_MASK 64U
#define PWM_PMCFG_TOPNEG01_MASK 256U
#define PWM_PMCFG_TOPNEG23_MASK 512U
#define PWM_PMCFG_TOPNEG45_MASK 1024U
#define PWM_PMCFG_EDG_MASK 4096U
#define PWM_PMCFG_WAIT_EN_MASK 8192U
#define PWM_PMCFG_DBG_EN_MASK 16384U
#define PWM_PMCFG *((volatile word *)0x0000F050)
/*** PWM_PMCCR - PWM channel control register; 0x0000F051 ***/
union {
word Word;
} PWM_PMCCR_STR;
#define PWM_PMCCR_SWP01_MASK 1U
#define PWM_PMCCR_SWP23_MASK 2U
#define PWM_PMCCR_SWP45_MASK 4U
#define PWM_PMCCR_VLMODE0_MASK 16U
#define PWM_PMCCR_VLMODE1_MASK 32U
#define PWM_PMCCR_MSK0_MASK 256U
#define PWM_PMCCR_MSK1_MASK 512U
#define PWM_PMCCR_MSK2_MASK 1024U
#define PWM_PMCCR_MSK3_MASK 2048U
#define PWM_PMCCR_MSK4_MASK 4096U
#define PWM_PMCCR_MSK5_MASK 8192U
#define PWM_PMCCR_nBX_MASK 16384U
#define PWM_PMCCR_ENHA_MASK 32768U
#define PWM_PMCCR_VLMODE_MASK 48U
#define PWM_PMCCR_VLMODE_BITNUM 4U
#define PWM_PMCCR_MSK_MASK 16128U
#define PWM_PMCCR_MSK_BITNUM 8U
#define PWM_PMCCR *((volatile word *)0x0000F051)
/*** PWM_PMPORT - PWM port register; 0x0000F052 ***/
union {
word Word;
} PWM_PMPORT_STR;
#define PWM_PMPORT_PORT0_MASK 1U
#define PWM_PMPORT_PORT1_MASK 2U
#define PWM_PMPORT_PORT2_MASK 4U
#define PWM_PMPORT_PORT3_MASK 8U
#define PWM_PMPORT_PORT4_MASK 16U
#define PWM_PMPORT_PORT5_MASK 32U
#define PWM_PMPORT_PORT6_MASK 64U
#define PWM_PMPORT_PORT_MASK 127U
#define PWM_PMPORT_PORT_BITNUM 0U
#define PWM_PMPORT *((volatile word *)0x0000F052)
/*** PWM_PMICCR - PWM Internal Correction Control Register; 0x0000F053 ***/
union {
word Word;
} PWM_PMICCR_STR;
#define PWM_PMICCR_ICC0_MASK 1U
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