cpu.c

BLDC电机控制源代码

/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : BLDC_sensor
**     Processor : 56F8013VFAE
**     Beantype  : 56F8013VFAE
**     Version   : Bean 01.003, Driver 01.23, CPU db: 2.87.068
**     Datasheet :  MC56F8300UM/D - Rev. 1.0
**     Compiler  : Metrowerks DSP C Compiler
**     Date/Time : 2006-07-24, 16:32
**     Abstract  :
**
**     Settings  :
**
**     Contents  :
**         GetSpeedMode - byte Cpu_GetSpeedMode(void);
**         EnableInt    - void Cpu_EnableInt(void);
**         DisableInt   - void Cpu_DisableInt(void);
**         SetWaitMode  - void Cpu_SetWaitMode(void);
**         SetStopMode  - void Cpu_SetStopMode(void);
**
**     (c) Freescale Semiconductor
**     2004 All Rights Reserved
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2004
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : [e-mail]
** ###################################################################*/

/* MODULE Cpu. */
#include "HallSensor1.h"
#include "HallSensor2.h"
#include "HallSensor3.h"
#include "LED1.h"
#include "Inhr1.h"
#include "LED2.h"
#include "Inhr2.h"
#include "LED3.h"
#include "Inhr3.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Cpu.h"


/* Global variables */
volatile word SR_lock=0;               /* Lock */
volatile word SR_reg;                  /* Current value of the SR register */

/*
** ===================================================================
**     Method      :  Cpu_Interrupt (bean 56F8013VFAE)
**
**     Description :
**         This method is internal. It is used by Processor Expert
**         only.
** ===================================================================
*/
#pragma interrupt alignsp
void Cpu_Interrupt(void)
{
  asm(DEBUGHLT);                       /* Halt the core and placing it in the debug processing state */
}

/*
** ===================================================================
**     Method      :  Cpu_DisableInt (bean 56F8013VFAE)
**
**     Description :
**         Disables all maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (bean 56F8013VFAE)
**
**     Description :
**         Enables all maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetStopMode (bean 56F8013VFAE)
**
**     Description :
**         Sets low power mode - Stop mode.
**         For more information about the stop mode see this CPU
**         documentation.
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetWaitMode (bean 56F8013VFAE)
**
**     Description :
**         Sets low power mode - Wait mode.
**         For more information about the wait mode see this CPU
**         documentation.
**         Release from wait mode: Reset or interrupt
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_GetSpeedMode (bean 56F8013VFAE)
**
**     Description :
**         Gets current speed mode
**     Parameters  : None
**     Returns     :
**         ---             - Speed mode (HIGH_SPEED, LOW_SPEED,
**                           SLOW_SPEED)
** ===================================================================
*/
byte Cpu_GetSpeedMode(void)
{
  return HIGH_SPEED;                   /* Result the actual cpu mode - high speed mode*/
}

/*
** ===================================================================
**     Method      :  _EntryPoint (bean 56F8013VFAE)
**
**     Description :
**         This method is internal. It is used by Processor Expert
**         only.
** ===================================================================
*/
extern void init_56800_(void);         /* Forward declaration of external startup function declared in startup file */

/*** !!! Here you can place your own code using property "User data declarations" on the build options tab. !!! ***/

void _EntryPoint(void)
{

  /*** !!! Here you can place your own code before PE initialization using property "User code before PE initialization" on the build options tab. !!! ***/

  /*** ### 56F8013VFAE "Cpu" init code ... ***/
  /*** PE initialization code after reset ***/
  /* System clock initialization */
  setRegBitGroup(OSCTL, TRIM, (word)getReg(FMOPT1)); /* Set the trim osc freq with factory programmed value */
  clrRegBit(PLLCR, PRECS);             /* Select an internal clock source for the CPU core */
  setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC0_MASK)); /* Enable PLL, LCKON and select clock source from prescaler */
  /* PLLDB: LORTP=2,??=0,PLLCOD=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
  setReg16(PLLDB, 8192);               /* Set the clock prescalers */ 
  while(!getRegBit(PLLSR, LCK0)){}     /* Wait for PLL lock */
  setReg(PLLCR, (PLLCR_LCKON_MASK | PLLCR_ZSRC1_MASK)); /* Select clock source from postscaler */
  /* FMCLKD: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DIVLD=0,PRDIV8=0,DIV=40 */
  setReg16(FMCLKD, 40);                /* Set the flash clock prescaler */ 
  /*** End of PE initialization code after reset ***/

  /*** !!! Here you can place your own code after PE initialization using property "User code after PE initialization" on the build options tab. !!! ***/

  asm(JMP init_56800_);                /* Jump to C startup code */
}

/*
** ===================================================================
**     Method      :  PE_low_level_init (bean 56F8013VFAE)
**
**     Description :
**         This method is internal. It is used by Processor Expert
**         only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* GPIO_A_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_A_DRIVE, 0);           /* Set High/Low drive strength on GPIOA pins according to the CPU bean settings */ 
  /* GPIO_B_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_B_DRIVE, 0);           /* Set High/Low drive strength on GPIOB pins according to the CPU bean settings */ 
  /* GPIO_C_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE6=0,DRIVE5=0,DRIVE4=0,??=0,DRIVE2=0,DRIVE1=0,DRIVE0=0 */
  setReg16(GPIO_C_DRIVE, 0);           /* Set High/Low drive strength on GPIOC pins according to the CPU bean settings */ 
  /* GPIO_D_DRIVE: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,DRIVE=0 */
  setReg16(GPIO_D_DRIVE, 0);           /* Set High/Low drive strength on GPIOD pins according to the CPU bean settings */ 
  /* SIM_GPS: TCR=0,PCR=0 */
  clrReg16Bits(SIM_GPS, 49152);        /* Set the TMR and PWM module clock rates */ 
  /* SIM_PCE: I2C=0,??=0,ADC=0,??=0,??=0,??=0,??=0,??=0,??=0,TMR=1,??=0,SCI=0,??=0,SPI=0,??=0,PWM=0 */
  setReg16(SIM_PCE, 64);               /* Set up the peripheral clock enable register */ 
  /* SIM_CONTROL: TC3_SD=0,TC2_SD=0,TC1_SD=0,TC0_SD=0,SCI_SD=0,??=0,TC3_INP=0,??=0,??=0,??=0,OnceEbl=1,SWRst=0,stop_disable=0,wait_disable=0 */
  setReg16(SIM_CONTROL, 32);           /* Set up the SIM control register */ 
  /* Common initialization of the CPU registers */
  /* INTC_IPR3: TMR_2_IPL=2,TMR_1_IPL=2,TMR_0_IPL=2 */
  clrSetReg16Bits(INTC_IPR3, 1344, 2688); 
  /* GPIO_A_IENR: IEN&=~21 */
  clrReg16Bits(GPIO_A_IENR, 21);        
  /* GPIO_A_IAR: IA&=~21 */
  clrReg16Bits(GPIO_A_IAR, 21);         
  /* GPIO_A_IESR: IES|=21 */
  setReg16Bits(GPIO_A_IESR, 21);        
  /* GPIO_A_PPMODE: PPMODE|=21 */
  setReg16Bits(GPIO_A_PPMODE, 21);      
  /* GPIO_A_DR: D&=~21 */
  clrReg16Bits(GPIO_A_DR, 21);          
  /* GPIO_A_DDR: DD|=21 */
  setReg16Bits(GPIO_A_DDR, 21);         
  /* GPIO_A_PER: PE&=~21 */
  clrReg16Bits(GPIO_A_PER, 21);         
  /* ### Init_TMR "HallSensor1" init code ... */
  HallSensor1_Init();
  /* ### Init_TMR "HallSensor2" init code ... */
  HallSensor2_Init();
  /* ### Init_TMR "HallSensor3" init code ... */
  HallSensor3_Init();
  __EI(0);                             /* Enable interrupts of the selected priority level */
}

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.96 [03.65]
**     for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/