📄 usb.lss
字号:
bEPPflags.bits.control_state = USB_IDLE; /* set command */
}
else {
if(ControlData.DeviceRequest.wLength > MAX_CONTROLDATA_SIZE) {
896: 29 30 cpi r18, 0x09 ; 9
898: 31 05 cpc r19, r1
89a: 60 f0 brcs .+24 ; 0x8b4
bEPPflags.bits.control_state = USB_IDLE;
89c: 8f 79 andi r24, 0x9F ; 159
89e: 80 93 c0 00 sts 0x00C0, r24
D12_SetEndpointStatusIsr(0, 1);
8a2: 61 e0 ldi r22, 0x01 ; 1
8a4: 80 e0 ldi r24, 0x00 ; 0
8a6: 0e 94 28 01 call 0x250
D12_SetEndpointStatusIsr(1, 1);
8aa: 61 e0 ldi r22, 0x01 ; 1
8ac: 86 2f mov r24, r22
8ae: 0e 94 28 01 call 0x250
8b2: 08 95 ret
}
else {
bEPPflags.bits.control_state = USB_RECEIVE; /* set command with OUT token */
8b4: 8f 79 andi r24, 0x9F ; 159
8b6: 80 64 ori r24, 0x40 ; 64
8b8: e6 cf rjmp .-52 ; 0x886
}
} // set command with data
} // else set command
} // if setup packet
else if (bEPPflags.bits.control_state == USB_RECEIVE) {
8ba: 90 91 c0 00 lds r25, 0x00C0
8be: 89 2f mov r24, r25
8c0: 80 76 andi r24, 0x60 ; 96
8c2: 80 34 cpi r24, 0x40 ; 64
8c4: 19 f5 brne .+70 ; 0x90c
i = D12_ReadEndpoint(0, EP0_PACKET_SIZE,
8c6: 80 91 10 01 lds r24, 0x0110
8ca: 90 91 11 01 lds r25, 0x0111
8ce: 8c 5e subi r24, 0xEC ; 236
8d0: 9e 4f sbci r25, 0xFE ; 254
8d2: ac 01 movw r20, r24
8d4: 60 e1 ldi r22, 0x10 ; 16
8d6: 80 e0 ldi r24, 0x00 ; 0
8d8: 0e 94 40 01 call 0x280
ControlData.dataBuffer + ControlData.wCount);
ControlData.wCount += i;
8dc: 20 91 10 01 lds r18, 0x0110
8e0: 30 91 11 01 lds r19, 0x0111
8e4: 28 0f add r18, r24
8e6: 31 1d adc r19, r1
8e8: 30 93 11 01 sts 0x0111, r19
8ec: 20 93 10 01 sts 0x0110, r18
if( i != EP0_PACKET_SIZE || ControlData.wCount >= ControlData.wLength) {
8f0: 80 31 cpi r24, 0x10 ; 16
8f2: 39 f4 brne .+14 ; 0x902
8f4: 80 91 0e 01 lds r24, 0x010E
8f8: 90 91 0f 01 lds r25, 0x010F
8fc: 28 17 cp r18, r24
8fe: 39 07 cpc r19, r25
900: 40 f0 brcs .+16 ; 0x912
bEPPflags.bits.setup_packet = 1;
902: 80 91 c0 00 lds r24, 0x00C0
906: 84 60 ori r24, 0x04 ; 4
bEPPflags.bits.control_state = USB_IDLE;
908: 8f 79 andi r24, 0x9F ; 159
90a: bd cf rjmp .-134 ; 0x886
}
}
else {
bEPPflags.bits.control_state = USB_IDLE;
90c: 9f 79 andi r25, 0x9F ; 159
90e: 90 93 c0 00 sts 0x00C0, r25
912: 08 95 ret
914: 08 95 ret
00000916 <ep0_txdone>:
}
}
void ep0_txdone(void)
{
916: cf 93 push r28
918: df 93 push r29
short i = ControlData.wLength - ControlData.wCount;
91a: c0 91 0e 01 lds r28, 0x010E
91e: d0 91 0f 01 lds r29, 0x010F
922: 80 91 10 01 lds r24, 0x0110
926: 90 91 11 01 lds r25, 0x0111
92a: c8 1b sub r28, r24
92c: d9 0b sbc r29, r25
D12_ReadLastTransactionStatus(1); // Clear interrupt flag
92e: 81 e0 ldi r24, 0x01 ; 1
930: 0e 94 06 01 call 0x20c
if (bEPPflags.bits.control_state != USB_TRANSMIT)
934: 80 91 c0 00 lds r24, 0x00C0
938: 80 76 andi r24, 0x60 ; 96
93a: 80 32 cpi r24, 0x20 ; 32
93c: 09 f0 breq .+2 ; 0x940
93e: 46 c0 rjmp .+140 ; 0x9cc
return;
if( i >= EP0_PACKET_SIZE) {
940: c0 31 cpi r28, 0x10 ; 16
942: d1 05 cpc r29, r1
944: ec f0 brlt .+58 ; 0x980
D12_WriteEndpointIsr(1, EP0_PACKET_SIZE, ControlData.pData + ControlData.wCount);
946: 80 91 12 01 lds r24, 0x0112
94a: 90 91 13 01 lds r25, 0x0113
94e: 20 91 10 01 lds r18, 0x0110
952: 30 91 11 01 lds r19, 0x0111
956: 82 0f add r24, r18
958: 93 1f adc r25, r19
95a: ac 01 movw r20, r24
95c: 60 e1 ldi r22, 0x10 ; 16
95e: 81 e0 ldi r24, 0x01 ; 1
960: 0e 94 c0 01 call 0x380
ControlData.wCount += EP0_PACKET_SIZE;
964: 80 91 10 01 lds r24, 0x0110
968: 90 91 11 01 lds r25, 0x0111
96c: 40 96 adiw r24, 0x10 ; 16
96e: 90 93 11 01 sts 0x0111, r25
972: 80 93 10 01 sts 0x0110, r24
bEPPflags.bits.control_state = USB_TRANSMIT;
976: 80 91 c0 00 lds r24, 0x00C0
97a: 8f 79 andi r24, 0x9F ; 159
97c: 80 62 ori r24, 0x20 ; 32
97e: 24 c0 rjmp .+72 ; 0x9c8
}
else if( i != 0) {
980: 20 97 sbiw r28, 0x00 ; 0
982: d1 f0 breq .+52 ; 0x9b8
D12_WriteEndpointIsr(1, i, ControlData.pData + ControlData.wCount);
984: 80 91 12 01 lds r24, 0x0112
988: 90 91 13 01 lds r25, 0x0113
98c: 20 91 10 01 lds r18, 0x0110
990: 30 91 11 01 lds r19, 0x0111
994: 82 0f add r24, r18
996: 93 1f adc r25, r19
998: ac 01 movw r20, r24
99a: 6c 2f mov r22, r28
99c: 81 e0 ldi r24, 0x01 ; 1
99e: 0e 94 c0 01 call 0x380
ControlData.wCount += i;
9a2: 80 91 10 01 lds r24, 0x0110
9a6: 90 91 11 01 lds r25, 0x0111
9aa: 8c 0f add r24, r28
9ac: 9d 1f adc r25, r29
9ae: 90 93 11 01 sts 0x0111, r25
9b2: 80 93 10 01 sts 0x0110, r24
9b6: 05 c0 rjmp .+10 ; 0x9c2
bEPPflags.bits.control_state = USB_IDLE;
}
else if (i == 0){
D12_WriteEndpointIsr(1, 0, 0); // Send zero packet at the end ???
9b8: ae 01 movw r20, r28
9ba: 60 e0 ldi r22, 0x00 ; 0
9bc: 81 e0 ldi r24, 0x01 ; 1
9be: 0e 94 c0 01 call 0x380
bEPPflags.bits.control_state = USB_IDLE;
9c2: 80 91 c0 00 lds r24, 0x00C0
9c6: 8f 79 andi r24, 0x9F ; 159
9c8: 80 93 c0 00 sts 0x00C0, r24
9cc: df 91 pop r29
9ce: cf 91 pop r28
9d0: 08 95 ret
000009d2 <dma_eot>:
}
}
void dma_eot(void)
{
9d2: 08 95 ret
000009d4 <ep1_txdone>:
}
void ep1_txdone(void)
{
D12_ReadLastTransactionStatus(3); /* Clear interrupt flag */
9d4: 83 e0 ldi r24, 0x03 ; 3
9d6: 0e 94 06 01 call 0x20c
9da: 08 95 ret
000009dc <ep1_rxdone>:
}
void ep1_rxdone(void)
{
unsigned char len;
D12_ReadLastTransactionStatus(2); /* Clear interrupt flag */
9dc: 82 e0 ldi r24, 0x02 ; 2
9de: 0e 94 06 01 call 0x20c
len = D12_ReadEndpoint(2, sizeof(GenEpBuf), GenEpBuf);
9e2: 42 ec ldi r20, 0xC2 ; 194
9e4: 50 e0 ldi r21, 0x00 ; 0
9e6: 64 e0 ldi r22, 0x04 ; 4
9e8: 82 e0 ldi r24, 0x02 ; 2
9ea: 0e 94 40 01 call 0x280
if(len != 0)
9ee: 88 23 and r24, r24
9f0: 29 f0 breq .+10 ; 0x9fc
{
bEPPflags.bits.ep1_rxdone = 1;
9f2: 80 91 c1 00 lds r24, 0x00C1
9f6: 81 60 ori r24, 0x01 ; 1
9f8: 80 93 c1 00 sts 0x00C1, r24
9fc: 08 95 ret
9fe: 08 95 ret
00000a00 <main_txdone>:
}
}
void main_txdone(void)
{
D12_ReadLastTransactionStatus(5);
a00: 85 e0 ldi r24, 0x05 ; 5
a02: 0e 94 06 01 call 0x20c
a06: 08 95 ret
00000a08 <main_rxdone>:
}
void main_rxdone(void)
{
unsigned char len;
D12_ReadLastTransactionStatus(4);
a08: 84 e0 ldi r24, 0x04 ; 4
a0a: 0e 94 06 01 call 0x20c
len = D12_ReadEndpoint(4, sizeof(EpBuf),EpBuf);
a0e: 46 ec ldi r20, 0xC6 ; 198
a10: 50 e0 ldi r21, 0x00 ; 0
a12: 60 e4 ldi r22, 0x40 ; 64
a14: 84 e0 ldi r24, 0x04 ; 4
a16: 0e 94 40 01 call 0x280
if(len != 0)
a1a: 88 23 and r24, r24
a1c: 29 f0 breq .+10 ; 0xa28
{
bEPPflags.bits.main_rxdone = 1;
a1e: 80 91 c1 00 lds r24, 0x00C1
a22: 82 60 ori r24, 0x02 ; 2
a24: 80 93 c1 00 sts 0x00C1, r24
a28: 08 95 ret
a2a: 08 95 ret
00000a2c <fn_usb_isr>:
}
}
void fn_usb_isr(void)
{
a2c: cf 93 push r28
a2e: df 93 push r29
unsigned int i_st;
// unsigned char test;
bEPPflags.bits.in_isr = 1;
a30: 80 91 c0 00 lds r24, 0x00C0
a34: 80 61 ori r24, 0x10 ; 16
a36: 80 93 c0 00 sts 0x00C0, r24
i_st = D12_ReadInterruptRegister();
a3a: 0e 94 de 00 call 0x1bc
a3e: ec 01 movw r28, r24
// test=(unsigned char)i_st;
// put_c(test);
if(i_st != 0) {
a40: 00 97 sbiw r24, 0x00 ; 0
a42: 39 f1 breq .+78 ; 0xa92
if(i_st & D12_INT_BUSRESET)
a44: 86 ff sbrs r24, 6
a46: 06 c0 rjmp .+12 ; 0xa54
{
bus_reset();
bEPPflags.bits.bus_reset = 1;
a48: 80 91 c0 00 lds r24, 0x00C0
a4c: 81 60 ori r24, 0x01 ; 1
a4e: 80 93 c0 00 sts 0x00C0, r24
a52: 1f c0 rjmp .+62 ; 0xa92
}
else
{
if(i_st & D12_INT_EOT)
dma_eot();
if(i_st & D12_INT_SUSPENDCHANGE)
a54: 87 ff sbrs r24, 7
a56: 05 c0 rjmp .+10 ; 0xa62
bEPPflags.bits.suspend = 1;
a58: 80 91 c0 00 lds r24, 0x00C0
a5c: 82 60 ori r24, 0x02 ; 2
a5e: 80 93 c0 00 sts 0x00C0, r24
if(i_st & D12_INT_ENDP0IN)
a62: c1 ff sbrs r28, 1
a64: 02 c0 rjmp .+4 ; 0xa6a
ep0_txdone();
a66: 0e 94 8b 04 call 0x916
if(i_st & D12_INT_ENDP0OUT)
a6a: c0 ff sbrs r28, 0
a6c: 02 c0 rjmp .+4 ; 0xa72
ep0_rxdone();
a6e: 0e 94 09 04 call 0x812
if(i_st & D12_INT_ENDP1IN)
a72: c3 ff sbrs r28, 3
a74: 02 c0 rjmp .+4 ; 0xa7a
ep1_txdone();
a76: 0e 94 ea 04 call 0x9d4
if(i_st & D12_INT_ENDP1OUT)
a7a: c2 ff sbrs r28, 2
a7c: 02 c0 rjmp .+4 ; 0xa82
ep1_rxdone();
a7e: 0e 94 ee 04 call 0x9dc
if(i_st & D12_INT_ENDP2IN)
a82: c5 ff sbrs r28, 5
a84: 02 c0 rjmp .+4 ; 0xa8a
main_txdone();
a86: 0e 94 00 05 call 0xa00
if(i_st & D12_INT_ENDP2OUT)
a8a: c4 ff sbrs r28, 4
a8c: 02 c0 rjmp .+4 ; 0xa92
main_rxdone();
a8e: 0e 94 04 05 call 0xa08
}
}
bEPPflags.bits.in_isr = 0;
a92: 80 91 c0 00 lds r24, 0x00C0
a96: 8f 7e andi r24, 0xEF ; 239
a98: 80 93 c0 00 sts 0x00C0, r24
a9c: df 91 pop r29
a9e: cf 91 pop r28
aa0: 08 95 ret
00000aa2 <Control>:
}
void Control(void)//具体操作
{
PORTC=GenEpBuf[0];
aa2: 80 91 c2 00 lds r24, 0x00C2
aa6: 85 bb out 0x15, r24 ; 21
aa8: 08 95 ret
00000aaa <__vector_1>:
}
/*void uart_init(void)
{
UCSRC = (1<<URSEL) | 0x06;
UBRRL=(F_CPU/BAUD/16-1)%256;
UBRRH=(F_CPU/BAUD/16-1)/256;
UCSRA=0X00;
UCSRB = (1<<RXCIE)|(1<<RXEN)|(1<<TXEN);
}*/
SIGNAL(SIG_INTERRUPT0)//外中断0
{
aaa: 1f 92 push r1
aac: 0f 92 push r0
aae: 0f b6 in r0, 0x3f ; 63
ab0: 0f 92 push r0
ab2: 11 24 eor r1, r1
ab4: 2f 93 push r18
ab6: 3f 93 push r19
ab8: 4f 93 push r20
aba: 5f 93 push r21
abc: 6f 93 push r22
abe: 7f 93 push r23
ac0: 8f 93 push r24
ac2: 9f 93 push r25
ac4: af 93 push r26
ac6: bf 93 push r27
ac8: ef 93 push r30
aca: ff 93 push r31
// put_c('i');
DISABLE;
acc: f8 94 cli
fn_usb_isr();
ace: 0e 94 16 05 call 0xa2c
// put_c('f');
ENABLE;
ad2: 78 94 sei
ad4: ff 91 pop r31
ad6: ef 91 pop r30
ad8: bf 91 pop r27
ada: af 91 pop r26
adc: 9f 91 pop r25
ade: 8f 91 pop r24
ae0: 7f 91 pop r23
ae2: 6f 91 pop r22
ae4: 5f 91 pop r21
ae6: 4f 91 pop r20
ae8: 3f 91 pop r19
aea: 2f 91 pop r18
aec: 0f 90 pop r0
aee: 0f be out 0x3f, r0 ; 63
af0: 0f 90 pop r0
af2: 1f 90 pop r1
af4: 18 95 reti
00000af6 <init_port>:
}
//this part for main
//this part from mainloop.c
//断开USB
void init_port(void)
{
DDRB=0xFF;
af6: 9f ef ldi r25, 0xFF ; 255
af8: 97 bb out 0x17, r25 ; 23
Set_Bit(PORTB,D12_WR);//WR disable
afa: c1 9a sbi 0x18, 1 ; 24
Set_Bit(PORTB,D12_RD);//RD disable
afc: c2 9a sbi 0x18, 2 ; 24
Clr_Bit(PORTB,D12_CS);//cs enable
afe: c0 98 cbi 0x18, 0 ; 24
Clr_Bit(PORTB,D12_ALE);
b00: c3 98 cbi 0x18, 3 ; 24
DDRD=0xFF;
b02: 91 bb out 0x11, r25 ; 17
PORTD|=(1<<PD2);
b04: 92 9a sbi 0x12, 2 ; 18
DDRD&=~(1<<PD2);
b06: 8a 98 cbi 0x11, 2 ; 17
DDRD&=~(1<<PD0);
b08: 88 98 cbi 0x11, 0 ; 17
DDRD|=(1<<PD1);
b0a: 89 9a sbi 0x11, 1 ; 17
PORTC=0xFF;
b0c: 95 bb out 0x15, r25 ; 21
DDRC=0xFF;
b0e: 94 bb out 0x14, r25 ; 20
DDRA=0xFF;
b10: 9a bb out 0x1a, r25 ; 26
MCUCR=0xC0;
b12: 80 ec ldi r24, 0xC0 ; 192
b14: 85 bf out 0x35, r24 ; 53
GICR|=(1<<INT0);
b16: 8b b7 in r24, 0x3b ; 59
b18: 80 64 ori r24, 0x40 ; 64
b1a: 8b bf out 0x3b, r24 ; 59
GenEpBuf[0]=0xFF;
b1c: 90 93 c2 00 sts 0x00C2, r25
b20: 08 95 ret
00000b22 <main>:
}
int main(void)
{
b22: cf e5 ldi r28, 0x5F ; 95
b24: d4 e0 ldi r29, 0x04 ; 4
b26: de bf out 0x3e, r29 ; 62
b28: cd bf out 0x3d, r28 ; 61
// unsigned int id;
// unsigned char low;
// unsigned char high;
delay1();
b2a: 0e 94 47 00 call 0x8e
delay1();
b2e: 0e 94 47 00 call 0x8e
delay1();
b32: 0e 94 47 00 call 0x8e
delay1();
b36: 0e 94 47 00 call 0x8e
DISABLE;
b3a: f8 94 cli
init_port();
b3c: 0e 94 7b 05 call 0xaf6
// uart_init();
// put_c('b');
// id=D12_ReadChipID();
// low=(unsigned char)id;
// high=id>>8;
// put_c(low);
// put_c(high);
reconnect_USB();
b40: 0e 94 03 04 call 0x806
ENABLE;
b44: 78 94 sei
while(1)
{
if (bEPPflags.bits.bus_reset)
b46: 80 91 c0 00 lds r24, 0x00C0
b4a: 80 ff sbrs r24, 0
b4c: 05 c0 rjmp .+10 ; 0xb58
{
// put_c(0xFF);
DISABLE;
b4e: f8 94 cli
bEPPflags.bits.bus_reset = 0;
b50: 8e 7f andi r24, 0xFE ; 254
b52: 80 93 c0 00 sts 0x00C0, r24
ENABLE;
b56: 78 94 sei
}
if (bEPPflags.bits.setup_packet)
b58: 80 91 c0 00 lds r24, 0x00C0
b5c: 82 ff sbrs r24, 2
b5e: 07 c0 rjmp .+14 ; 0xb6e
{
DISABLE;
b60: f8 94 cli
bEPPflags.bits.setup_packet = 0;
b62: 8b 7f andi r24, 0xFB ; 251
b64: 80 93 c0 00 sts 0x00C0, r24
ENABLE;
b68: 78 94 sei
control_handler();
b6a: 0e 94 e0 03 call 0x7c0
} // if setup_packet
if(bEPPflags.bits.configuration)
b6e: 80 91 c0 00 lds r24, 0x00C0
b72: 87 ff sbrs r24, 7
b74: e8 cf rjmp .-48 ; 0xb46
Control();
b76: 0e 94 51 05 call 0xaa2
b7a: e5 cf rjmp .-54 ; 0xb46
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -