📄 drivers.lst
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163 /**************************************************************
164 * Function: disable MC13192 interrupts
165 * Parameters: none
166 * Return:
167 **************************************************************/
168 void disable_MC13192_interrupts(void)
169 {
170 1 EA = 0;
171 1 }
172
173 /**************************************************************
174 * Function: restore MC13192 interrupts to previous condition
175 * Parameters: none
176 * Return:
177 **************************************************************/
C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 4
178 void restore_MC13192_interrupts(void)
179 {
180 1 EA = 1;
181 1 }
182
183
184 /**************************************************************
185 * Function: write a block of data to TX packet RAM (whichever is selected)
186 * Parameters: length length of the block of data in bytes
187 * *contents pointer to the data block
188 **************************************************************/
189 void drv_write_tx_ram(tx_packet_t *tx_pkt)
190 {
191 1 __uint8__ i, ibyte, temp_value; /* i, ibyte are counters. temp_value is used to flush the SPI1D register
- during read */
192 1 __uint16__ reg; /* TX packet length register value */
193 1 reg = drv_read_spi_1(TX_PKT_LEN); /* Read the TX packet length register contents */
194 1 reg = (0xFF80 & reg) | (tx_pkt->dataLength + 2); /* Mask out old length setting and update. Add 2 for CR
-C */
195 1 drv_write_spi_1(TX_PKT_LEN, reg); /* Update the TX packet length field */
196 1 disable_MC13192_interrupts(); /* Necessary to prevent double SPI access */
197 1 AssertCE; /* Enables MC13192 SPI */
198 1 temp_value = TX_PKT; /* SPI TX ram data register */
199 1 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set. Now write content MSB */
200 1 ibyte = 0; /* Byte counter for *contents */
201 1 for (i=0; i<((tx_pkt->dataLength+1) >> 1); i++) /* Word loop. Round up. */
202 1 {
203 2 temp_value = tx_pkt->tx_data[ibyte + 1]; /* Write MSB */
204 2 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set. Now write content LSB */
205 2 temp_value = tx_pkt->tx_data[ibyte]; /* Write LSB */
206 2 ibyte=ibyte+2; /* Increment byte counter */
207 2 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set.*/
208 2 }
209 1 DeAssertCE; /* Disables MC13192 SPI */
210 1 restore_MC13192_interrupts(); /* Restore MC13192 interrupt status */
211 1 }
212
213 /**************************************************************
214 * Function: read a block of data from RX packet RAM (whichever is selected)
215 * Parameters: *length returned length of the block of data in bytes
216 * *contents pointer to the data block storage
217 **************************************************************/
218 int drv_read_rx_ram(rx_packet_t *rx_pkt)
219 {
220 1 __uint8__ i, ibyte, temp_value, temp_data; /* i, ibyte are counters. temp_value is used to flush the SPI
-1D register during read */
221 1 __uint8__ status=0; /* holder for the return value */
222 1 __uint16__ rx_length;
223 1 rx_length = drv_read_spi_1(RX_PKT_LEN); /* Read the RX packet length register contents */
224 1 rx_length &= 0x007F; /* Mask out all but the RX packet length */
225 1 /* MC13192 reports length with 2 CRC bytes, remove them. */
226 1 /* ShortPacket is also checked in RX_ISR */
227 1 if (rx_length >= 3)
228 1 {
229 2 rx_pkt->dataLength = rx_length - 2;
230 2 }
231 1 else
232 1 {
233 2 rx_pkt->dataLength = 0;
234 2 }
235 1 if ((rx_pkt->dataLength >= 1) && (rx_pkt->dataLength <= rx_pkt->maxDataLength)) /* If <3, the packet is
-garbage */
C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 5
236 1 {
237 2 disable_MC13192_interrupts(); /* Necessary to prevent double SPI access */
238 2 AssertCE; /* Enables MC13192 SPI */
239 2 temp_value = RX_PKT | 0x80; /* SPI RX ram data register */
240 2 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set.*/
241 2 spi_read();
242 2 spi_read();
243 2 ibyte = 0; /* Byte counter for *contents */
244 2 for (i=0; i<((rx_length-1)>>1); i++) /* Word loop. Round up. Deduct CRC. */
245 2 {
246 3 temp_data = spi_read(); /* For this bit to be set, SPTED MUST be set. Get MSB */
247 3 if ((ibyte+3)==rx_length) /* For a trailing garbage byte, just read and discard */
248 3 {
249 4 temp_value = temp_data; /* Discard */
250 4 }
251 3 else
252 3 {
253 4 rx_pkt->rx_data[ibyte+1] = temp_data; /* Read MSB */
254 4 }
255 3 rx_pkt->rx_data[ibyte] = spi_read(); /* Read LSB */
256 3 ibyte=ibyte+2; /* Increment byte counter */
257 3 }
258 2 DeAssertCE; /* Disables MC13192 SPI */
259 2 rx_pkt->status = SUCCESS;
260 2 restore_MC13192_interrupts(); /* Restore MC13192 interrupt status */
261 2 }
262 1 /* Check to see if a larger packet than desired is received. */
263 1 if (rx_pkt->dataLength > rx_pkt->maxDataLength)
264 1 rx_pkt->status = OVERFLOW;
265 1 return status;
266 1 }
267
268 //模拟SPI口写函数
269 void spi_write(unsigned char write_data)
270 {
271 1 unsigned char spi_shifter = write_data;
272 1 unsigned char i;
273 1
274 1 for(i=0;i<8;i++)
275 1 {
276 2 MC13192_SPSCK = 0;
277 2
278 2 if((spi_shifter & 0x80) == 0x80)
279 2 MC13192_MOSI = 1;
280 2 else
281 2 MC13192_MOSI = 0;
282 2
283 2 MC13192_SPSCK = 1;
284 2
285 2 spi_shifter = spi_shifter << 1;
286 2
287 2 }
288 1 MC13192_SPSCK = 0;
289 1 }
290
291 //模拟SPI口读函数
292 unsigned char spi_read(void)
293 {
294 1 unsigned char read_data = 0x00;
295 1 unsigned char i;
296 1
297 1 for(i=0;i<8;i++)
C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 6
298 1 {
299 2 MC13192_SPSCK = 0;
300 2
301 2 MC13192_SPSCK = 1;
302 2
303 2 if(MC13192_MISO == 1)
304 2 read_data = read_data + 1;
305 2
306 2 if(i < 7)
307 2 read_data = read_data << 1;
308 2 }
309 1 MC13192_SPSCK = 0;
310 1
311 1 return(read_data);
312 1 }
313
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 974 ----
CONSTANT SIZE = 12 ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 9 24
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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