📄 drivers.lst
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C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE DRIVERS
OBJECT MODULE PLACED IN drivers.OBJ
COMPILER INVOKED BY: D:\Keil\C51\BIN\C51.EXE drivers.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 /**************************************************************
2 *Includes
3 **************************************************************/
4 #include <REG51F.H>
5 #include <stdio.h>
6 #include "simple_phy.h"
7 #include "pub_def.h"
8 #include "drivers.h"
9 #include "MC13192_regs.h"
10 #include "MC13192_hw_config.h"
11 #include "mcu_hw_config.h"
12
13
14 /**************************************************************
15 * Defines
16 **************************************************************/
17 #define AssertCE MC13192_CE = 0 /* Asserts the MC13192 CE pin */
18 #define DeAssertCE MC13192_CE = 1 /* Deasserts the MC13192 CE pin */
19
20
21 /**************************************************************
22 * Globals
23 **************************************************************/
24 rx_packet_t *drv_rx_packet;
25 cca_measurement_t drv_cca_reading;
26 __uint8__ irq_value = 0;
27 extern unsigned char rtx_mode;
28
29 __uint8__ a;
30 __uint8__ b;
31
32 /**************************************************************
33 * Interrupt: MC13192 initiated interrupt handler
34 * Parameters: none
35 * Return: The interrupt will RTI unless valid data is recvd.
36 * In this case a pd_data_indication function call-back
37 * will be executed first, followed by a RTI
38 **************************************************************/
39 void interrupt_request() interrupt 0
40 {
41 1 /* The vector is defined in vectortable.c */
42 1 volatile __uint16__ status_content; /* Result of the status register read. */
43 1 __uint8__ dataLength = 0; /* Data length for the RX packet */
44 1
45 1 status_content = drv_read_spi_1(STATUS_ADDR); /* Read the MC13192 status register. */
46 1
47 1
48 1 // a = ((__uint8__*)&status_content)[0]; /* MSB */
49 1 // b = ((__uint8__*)&status_content)[1]; /* LSB */
50 1
51 1 // printf("%c",a);
52 1 // printf("%c",b);
53 1 printf("success\n");
54 1 DeAssertRTXEN();
55 1 disable_MC13192_interrupts();
C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 2
56 1 if(status_content == 0x0040)
57 1 {
58 2 printf("success\n");
59 2 rtx_mode = IDLE_MODE;
60 2 }
61 1
62 1 else
63 1 {
64 2 dataLength = (__uint8__) (drv_read_spi_1(RX_PKT_LEN) & 0x7F); /* Read received packet length register
-and mask off length bits */
65 2
66 2 rtx_mode = IDLE_MODE; /* set the rtx_state to idle */
67 2 drv_write_spi_1(T1_HI_ADDR, 0x8000); /* Disables TC1 and clears the IRQ. */
68 2 drv_write_spi_1(T1_LO_ADDR, 0x0000);
69 2 drv_rx_packet->dataLength = dataLength;
70 2 drv_rx_packet->status = SUCCESS;
71 2 if (drv_rx_packet->status == SUCCESS)
72 2 {
73 3 drv_read_rx_ram(drv_rx_packet); /* read data from MC13192, check status */
74 3
75 3 if ((drv_rx_packet->rx_data[0] == 'x') && (drv_rx_packet->rx_data[2] == 'y') && (drv_rx_packet->rx_dat
-a[4] == 'z'))
76 3 {
77 4 printf("%c",drv_rx_packet->rx_data[0]);
78 4 printf("%c",drv_rx_packet->rx_data[1]);
79 4 printf("%c",drv_rx_packet->rx_data[2]);
80 4 printf("%c",drv_rx_packet->rx_data[3]);
81 4 printf("%c",drv_rx_packet->rx_data[4]);
82 4 printf("%c",drv_rx_packet->rx_data[5]);
83 4 }
84 3 }
85 2 }
86 1
87 1
88 1 restore_MC13192_interrupts();
89 1 }
90
91 /**************************************************************
92 * Function: Wake the MC13192 from Hibernate/Doze mode
93 * Parameters: none
94 * Return:
95 **************************************************************/
96 void Wake_MC13192 (void)
97 {
98 1 MC13192_ATTN = 0; /* Assert ATTN */
99 1 MC13192_ATTN = 1; /* Deassert ATTN */
100 1 }
101
102 /**************************************************************
103 * Function: Deassert the MC13192 RTXEN pin (forces IC to idle)
104 * Parameters: none
105 * Return:
106 **************************************************************/
107 void DeAssertRTXEN(void)
108 {
109 1 MC13192_RTXEN = 0; /* Deassert RTXEN */
110 1 }
111
112 /**************************************************************
113 * Function: Assert the MC13192 RTXEN pin (initiates programmed cycle)
114 * Parameters: none
115 * Return:
C51 COMPILER V7.06 DRIVERS 09/18/2006 21:57:29 PAGE 3
116 **************************************************************/
117 void AssertRTXEN(void)
118 {
119 1 MC13192_RTXEN = 1; /* Assert RTXEN */
120 1 }
121
122 /**************************************************************
123 * Function: write 1 word to SPI
124 * Parameters: SPI address, the word
125 * Return:
126 **************************************************************/
127 void drv_write_spi_1(__uint8__ addr, __uint16__ content)
128 {
129 1 __uint8__ temp_value; /* Used to flush the SPI1D register during read */
130 1 disable_MC13192_interrupts(); /* Necessary to prevent double SPI access */
131 1 AssertCE; /* Enables MC13192 SPI */
132 1 temp_value = addr & 0x3F; /* Mask address, 6bit addr. Set write bit (i.e. 0). */
133 1 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set. Now write content MSB */
134 1 temp_value = content >> 8; /* Write MSB */
135 1 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set. Now write content LSB */
136 1 temp_value = content & 0x00FF; /* Write LSB */
137 1 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set. Now read last of garbage */
138 1 DeAssertCE; /* Disables MC13192 SPI */
139 1 restore_MC13192_interrupts(); /* Restore MC13192 interrupt status */
140 1 }
141
142 /**************************************************************
143 * Function: read 1 word from SPI
144 * Parameters: SPI address
145 * Return: a word, w. w[0] is the MSB, w[1] is the LSB
146 **************************************************************/
147 __uint16__ drv_read_spi_1(__uint8__ addr)
148 {
149 1 __uint16__ w; /* w[0] is MSB, w[1] is LSB */
150 1 __uint8__ temp_value; /* Used to flush the SPI1D register during read */
151 1 disable_MC13192_interrupts(); /* Necessary to prevent double SPI access */
152 1 AssertCE; /* Enables MC13192 SPI */
153 1 temp_value = (addr & 0x3f) | 0x80; /* Mask address, 6bit addr, Set read bit. */
154 1 spi_write(temp_value); /* For this bit to be set, SPTED MUST be set */
155 1 ((__uint8__*)&w)[0] = spi_read(); /* MSB */
156 1 ((__uint8__*)&w)[1] = spi_read(); /* LSB */
157 1 DeAssertCE; /* Disables MC13192 SPI */
158 1 restore_MC13192_interrupts(); /* Restore MC13192 interrupt status */
159 1 return w;
160 1 }
161
162
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