simple_phy.c

zigbee通讯程序,设计方案为MC13191+C51,通过串口对无线模块进行控制

/* Global calibration required for accuracy. */
{
  __uint16__ reg;
  __uint8__ power;
  rtx_mode = CCA_MODE; /* Write energy detect mode */
  reg = drv_read_spi_1(MODE_ADDR);
  reg &= 0xFFF8;
  reg |= CCA_MODE;
  drv_write_spi_1(MODE_ADDR, reg);
  AssertRTXEN();
  while (rtx_mode != IDLE_MODE) /* Wait for energy detect to complete */
  {
//	MCU_LOW_POWER_WHILE;
  }
  reg = (drv_read_spi_1(CCA_RESULT_ADDR) & 0xFF00);
  power = (reg >> 8);
  return power;
}

/**************************************************************
*	Function: 	Report energy from last successful RX packet
*	Parameters: none
*	Return:		energy
**************************************************************/
__uint8__ PLME_link_quality (void)
/* Note: Actual power returned is: -(power/2) */
/* Global calibration required for accuracy. */
{
  __uint16__ reg;
  __uint8__ power;
  reg = drv_read_spi_1(CCA_RESULT_ADDR);
  power = ((reg & 0xFF00) >> 8);
  return power;
}

/**************************************************************
*	Function: 	Get MC13192 timer value
*	Parameters: none
*	Return:		timer value
**************************************************************/
__uint32__ PLME_get_time_request(void)
{
	__uint32__ upperword, lowerword;
	__uint32__ current_time;
	upperword = drv_read_spi_1(TIMESTAMP_HI_ADDR);
	lowerword = drv_read_spi_1(TIMESTAMP_LO_ADDR);
	upperword &= TIMESTAMP_HI_MASK;	/* Clears TS_HELD bit. */
	current_time = (__uint32__) (upperword << 16) | lowerword;
	return current_time;
}

/**************************************************************
*	Function: 	Set MC13192 CLKo frequency
*	Parameters: frequency value
*	Return:		status
**************************************************************/
int PLME_set_MC13192_clock_rate(__uint8__ freq)
{
	volatile __uint16__ current_value;
	current_value = drv_read_spi_1(CLKS_ADDR); /* Read register and re-write */
	current_value &= 0xFFF8;
	current_value |= freq;
	drv_write_spi_1(CLKS_ADDR, current_value);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Set MC13192 timer frequency
*	Parameters: frequency value
*	Return:		status
**************************************************************/
int PLME_set_MC13192_tmr_prescale (__uint8__ freq) 
{
	volatile __uint16__ current_value;
	current_value = drv_read_spi_1(PRESCALE_ADDR);
	current_value &= 0xFFF8;
	current_value |= freq;
	drv_write_spi_1(PRESCALE_ADDR, current_value);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Set MC13192 timer value (i.e. initialize)
*	Parameters: timer value
*	Return:		none
**************************************************************/
void PLME_set_time_request(__uint32__ requested_time)
{
	__uint16__ upperword, lowerword, mode2_reg_val;
	/* Split 32 bit input into 2 16 bit values */
	upperword = (__uint16__) (requested_time >> 16) & 0x000000FF;
	lowerword = (__uint16__) requested_time & 0x0000FFFF;
	/* Program Time1 comparator with the desired value */	
	drv_write_spi_1(T1_HI_ADDR, upperword);
	drv_write_spi_1(T1_LO_ADDR, lowerword);
	/* Get current state of the MODE2 MC13192 register */
	mode2_reg_val = drv_read_spi_1(MODE2_ADDR);
	/* Set the Tmr_load bit */
	mode2_reg_val |= 0x8000;
	/* Now write the value back to MC13192 register MODE2 */
	drv_write_spi_1(MODE2_ADDR, mode2_reg_val);
	/* Clear the tmr_load bit */
	mode2_reg_val &= 0x7FFF;
	/* Clr the tmr_load bit to prepare for next set_time_request. */
	drv_write_spi_1(MODE2_ADDR, mode2_reg_val);	
	return;
}

/**************************************************************
*	Function: 	Set MC13192 timer compare value
*	Parameters: timer value
*	Return:		status
**************************************************************/
int PLME_enable_MC13192_timer1(__uint32__ counter_value)
{
	/* Load the timeout value into T1 with Timer disabled. */
	drv_write_spi_1(T1_HI_ADDR, (__uint16__) ((counter_value >> 16) & 0x000000FF) | 0x000080FF);
	drv_write_spi_1(T1_LO_ADDR, (__uint16__) (counter_value & 0x0000FFFF));
	/* Turn Timer1 mask on. */
	drv_write_spi_1(T1_HI_ADDR, (__uint16__) ((counter_value >> 16) & 0x000000FF));
	drv_write_spi_1(T1_LO_ADDR, (__uint16__) (counter_value & 0x0000FFFF));
	return SUCCESS;
}

/**************************************************************
*	Function: 	Disable MC13192 timer comparator TC1
*	Parameters: none
*	Return:		status
**************************************************************/
int PLME_disable_MC13192_timer1(void)
{
	/* Load the timeout value into T1 with Timer disabled. */
	/* Clear Timer1 if in RX_MODE_WTO */
	drv_write_spi_1(T1_HI_ADDR, 0x8000);
	drv_write_spi_1(T1_LO_ADDR, 0x0000);
//	irq_mask_reg = drv_read_spi_1(IRQ_MASK);
//	irq_mask_reg &= ~TIMER1_IRQMASK_BIT;
//	drv_write_spi_1(IRQ_MASK, irq_mask_reg);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Indicate a MC13192 reset condition
*	Parameters: none
*	Return:		none
**************************************************************/
void PLME_MC13192_reset_indication (void)
{
//	MLME_MC13192_reset_indication();
}

/**************************************************************
*	Function: 	Force the MC13192 into a soft reset condition
*	Parameters: none
*	Return:		status
**************************************************************/
int PLME_MC13192_soft_reset(void)
{
	drv_write_spi_1(RESET, 0x00);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Adjust the MC13192s crystal trim value
*	Parameters: trim
*	Return:		status
**************************************************************/
int PLME_MC13192_xtal_adjust(__int8__ trim_value)
{
	__uint16__ reg;
	__uint16__ reg_value;
	reg_value = (trim_value << 8);	/* Shift the req value into the higher half word */
	reg = drv_read_spi_1(XTAL_ADJ_ADDR);	/* Read the current value of XTAL Reg */
	reg = ((reg & 0x00FF) | reg_value);
	drv_write_spi_1(XTAL_ADJ_ADDR, reg);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Adjust the MC13192s gain compensator
*	Parameters: gain compensation
*	Return:		status
**************************************************************/
int PLME_MC13192_FE_gain_adjust(__int8__ gain_value)
{
	__uint16__ reg;
	reg = drv_read_spi_1(FEGAIN_ADDR);	/* Read the current value of GAIN Reg */
	reg = ((reg & 0xFF00) | gain_value);
	drv_write_spi_1(FEGAIN_ADDR, reg);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Adjust the MC13192s Output power
*	Parameters: PA Output adjust
*	Return:		status
**************************************************************/
int PLME_MC13192_PA_output_adjust(__uint8__ requested_pa_value)
{
	__uint16__ reg;
	__uint8__ pa_value;
	int status = SUCCESS;
	switch (requested_pa_value)
	{
		case MAX_POWER:	/* Sets the PA drive level and PA gain to MAX. */
			pa_value = 0xFF;
			break;
		case MIN_POWER:
			pa_value = 0x00; //Sets the PA drive level and PA gain to min.
			break;
		default:
			if (requested_pa_value > 15)
			{
				return OVERFLOW;
			}
			else
			{
				pa_value = requested_pa_value;
			}
			break;
	}
	
	reg = drv_read_spi_1(PA_ADJUST_ADDR);	/* Read the current value of GAIN Reg */
	reg &= 0xFF00;
	
	if ((requested_pa_value == MAX_POWER) || (requested_pa_value == MIN_POWER))
		reg |= pa_value;
	else {
		reg |= ((pa_value << 4) | 0x000C);
	}
	drv_write_spi_1(PA_ADJUST_ADDR, reg);
	return SUCCESS;
}

/**************************************************************
*	Function: 	Returns the RFIC version number.
*	Parameters: none
*	Return:		version number
**************************************************************/
__uint8__ PLME_get_rfic_version(void)
{
	__uint16__ reg;
	reg = drv_read_spi_1(VERSION_REG);	/* Read the version register version[12:10] */
	reg &= VERSION_MASK;			/* Shift to generate accurate number */
	
	reg = reg >> 10;				/* Hard coded to shift */
	return (__uint8__) reg;
}