simple_phy.c

zigbee通讯程序,设计方案为MC13191+C51,通过串口对无线模块进行控制

/**************************************************************
*Includes
**************************************************************/
#include <REG51F.H>
#include <stdio.h>
#include "MC13192_regs.h"
#include "MC13192_hw_config.h"
#include "pub_def.h"
#include "drivers.h"
#include "simple_phy.h"
#include "simple_mac.h"
#include "mcu_hw_config.h"

/**************************************************************
*	Globals
**************************************************************/
extern rx_packet_t *drv_rx_packet;
extern unsigned char rtx_mode;

/**************************************************************
* Version string to put in NVM. Note! size limits
**************************************************************/

// Normally it shoud be enough to change the version numbers.
#define PHY_Version		"1.00"
#define PHY_Label       "SPHY "

//#pragma MESSAGE DISABLE C3303  // Warning C3303: Implicit concatenation of strings
//#pragma MESSAGE DISABLE C4200  // Warning C4200: Other segment than in previous declaration
//#pragma CONST_SEG BOOTLOADER_PHY_NV_DATA0

// DO NOT CHANGE OR REMOVE

// This string will be located in the NV RAM0 section.
// Note!! Check that item is location in the sequence as specified. 
//const unsigned char SPHY_Version[47] = "PHY " PHY_Label " Ver " PHY_Version " Build: "__DATE__" "__TIME__;

//#pragma CONST_SEG DEFAULT

/**************************************************************
*	Function: 	Transmit data packet
*	Parameters: packet pointer
*	Return:		status
**************************************************************/
int pd_data_request(tx_packet_t *packet)
{
	if (rtx_mode == IDLE_MODE)
	{ 
		drv_write_tx_ram(packet); /* Load the data into packet RAM */
		PLME_set_trx_state_request(TX_MODE); /* transmit it */
		/* Wait for the state to return to idle. (finish transmitting) */

		return SUCCESS;
	}
	else
	{
		return RX_ON;
	}
}



/**************************************************************
*	Function: 	Hibernate the MC13192 (very low current, no CLKO)
*	Parameters: none
*	Return:		status
**************************************************************/
int PLME_hibernate_request(void)
{
	__uint16__ current_value;
	rtx_mode = HIBERNATE_MODE;
	current_value = drv_read_spi_1(MODE2_ADDR);	/* Read MC13192 Hiberate register. */
	current_value &= 0xFFFC;
	current_value |= 0x0002; /* Hiberate enable */
	drv_write_spi_1(MODE2_ADDR, current_value);	/* Write back to MC13192 to enable hibernate mode. */
	return SUCCESS;		/* Call back to MAC layer indicating success. */
}

/**************************************************************
*	Function: 	Doze the MC13192 (Low current, CLKO <= 1MHz)
*	Parameters: none
*	Return:		status
**************************************************************/
int PLME_doze_request(void)
{
	__uint16__ current_value;
	rtx_mode = DOZE_MODE;
	current_value = drv_read_spi_1(MODE2_ADDR);	/* Read MC13192 Doze register. */
	current_value &= 0xFFFC;
	current_value |= 0x0001; /* Doze (acoma) enable */
	drv_write_spi_1(MODE2_ADDR, current_value);	/* Write back to MC13192 to enable hibernate mode. */
	return SUCCESS;		/* Call back to MAC layer indicating success. */
}

/**************************************************************
*	Function: 	Wake the MC13192 from Hibernate or Doze
*	Parameters: none
*	Return:		status
**************************************************************/
int PLME_wake_request(void)
{
	__uint16__ current_value;
	Wake_MC13192(); /* Wake up the device */
	while (rtx_mode != IDLE_MODE_ATTN)
	{
//		MCU_LOW_POWER_WHILE; /* Wait until ATTN */
	}
	current_value = drv_read_spi_1(MODE2_ADDR);	/* Read MC13192 Hiberate/Doze register. */
	current_value &= 0xFFFC; /* Hiberate and Doze disable */
	drv_write_spi_1(MODE2_ADDR, current_value);	/* Write back to MC13192 to disable hibernate and doze mode. */
	rtx_mode = IDLE_MODE;
	return SUCCESS;
}

/**************************************************************
*	Function: 	Set the MC13192 operating channel
*	Parameters: channel number
*	Return:		status
**************************************************************/
int PLME_set_channel_request(__uint8__ ch)
{
	switch (ch)
	{
	case 0x00:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F95);
		drv_write_spi_1(LO1_NUM_ADDR,0x5000);
	break;
	case 0x01:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F95);
		drv_write_spi_1(LO1_NUM_ADDR,0xA000); 
	break;
	case 0x02:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F95);
		drv_write_spi_1(LO1_NUM_ADDR,0xF000); 
	break;
	case 0x03:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F96);
		drv_write_spi_1(LO1_NUM_ADDR,0x4000); 
	break;
	case 0x04:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F96);
		drv_write_spi_1(LO1_NUM_ADDR,0x9000); 
	break;
	case 0x05:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F96);
		drv_write_spi_1(LO1_NUM_ADDR,0xE000); 
	break;
	case 0x06:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F97);
		drv_write_spi_1(LO1_NUM_ADDR,0x3000); 
	break;
	case 0x07:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F97);
		drv_write_spi_1(LO1_NUM_ADDR,0x8000); 
	break;
	case 0x08:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F97);
		drv_write_spi_1(LO1_NUM_ADDR,0xD000); 
	break;
	case 0x09:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F98);
		drv_write_spi_1(LO1_NUM_ADDR,0x2000); 
	break;
	case 0x0A:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F98);
		drv_write_spi_1(LO1_NUM_ADDR,0x7000); 
	break;
	case 0x0B:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F98);
		drv_write_spi_1(LO1_NUM_ADDR,0xC000); 
	break;
	case 0x0C:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F99);
		drv_write_spi_1(LO1_NUM_ADDR,0x1000); 
	break;
	case 0x0D:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F99);
		drv_write_spi_1(LO1_NUM_ADDR,0x6000); 
	break;
	case 0x0E:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F99);
		drv_write_spi_1(LO1_NUM_ADDR,0xB000); 
	break;
	case 0x0F:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F9A);
		drv_write_spi_1(LO1_NUM_ADDR,0x0000); 
	break;
	default:
		drv_write_spi_1(LO1_IDIV_ADDR,0x0F97);
		drv_write_spi_1(LO1_NUM_ADDR,0xD000); 
		return ERROR;
	}
	return SUCCESS;
}

/**************************************************************
*	Function: 	Set the MC13192 transceive operation
*	Parameters: operational mode
*	Return:		status
**************************************************************/
int PLME_set_trx_state_request(__uint8__ req_mode)
{
	__uint16__ reg;
//	DeAssertRTXEN(); 
	reg = drv_read_spi_1(MODE_ADDR);
	reg &= 0xFFF8; /* Clear mode. */
	switch (req_mode)
	{
		case IDLE_MODE: /* Write Idle */
	  
			reg |= IDLE_MODE;
			rtx_mode = IDLE_MODE;
			drv_write_spi_1(MODE_ADDR, reg);
			break;

		case RX_MODE: /* Write RX */		
	
			rtx_mode = RX_MODE;
			reg |= RX_MODE;
			drv_write_spi_1(MODE_ADDR, reg);
			AssertRTXEN(); 
			break;

		case RX_MODE_WTO: /* Write RX, but set rtx_mode to timeout */
			
			rtx_mode = RX_MODE_WTO;
			reg |= RX_MODE;
			drv_write_spi_1(MODE_ADDR, reg);
			AssertRTXEN();
			break;

		case TX_MODE: /* Write Tx. Note: force LO lock not used */
						
			reg |= TX_MODE;
			rtx_mode = TX_MODE;
			drv_write_spi_1(MODE_ADDR, reg);
			AssertRTXEN();
			break;
		default:
			return ERROR;	
	}
	return SUCCESS;
}

/**************************************************************
*	Function: 	Measure channel energy
*	Parameters: none
*	Return:		energy
**************************************************************/
__uint8__ PLME_energy_detect (void)
/* Note: Actual power returned is: -(power/2) */