📄 defts201.h
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#define J15_LOC (0x1E018F)
#define J16_LOC (0x1E0190)
#define J17_LOC (0x1E0191)
#define J18_LOC (0x1E0192)
#define J19_LOC (0x1E0193)
#define J20_LOC (0x1E0194)
#define J21_LOC (0x1E0195)
#define J22_LOC (0x1E0196)
#define J23_LOC (0x1E0197)
#define J24_LOC (0x1E0198)
#define J25_LOC (0x1E0199)
#define J26_LOC (0x1E019A)
#define J27_LOC (0x1E019B)
#define J28_LOC (0x1E019C)
#define J29_LOC (0x1E019D)
#define J30_LOC (0x1E019E)
#define J31_LOC (0x1E019F)
//**************************** KALU **********************************
#define K0_LOC (0x1E01A0)
#define K1_LOC (0x1E01A1)
#define K2_LOC (0x1E01A2)
#define K3_LOC (0x1E01A3)
#define K4_LOC (0x1E01A4)
#define K5_LOC (0x1E01A5)
#define K6_LOC (0x1E01A6)
#define K7_LOC (0x1E01A7)
#define K8_LOC (0x1E01A8)
#define K9_LOC (0x1E01A9)
#define K10_LOC (0x1E01AA)
#define K11_LOC (0x1E01AB)
#define K12_LOC (0x1E01AC)
#define K13_LOC (0x1E01AD)
#define K14_LOC (0x1E01AE)
#define K15_LOC (0x1E01AF)
#define K16_LOC (0x1E01B0)
#define K17_LOC (0x1E01B1)
#define K18_LOC (0x1E01B2)
#define K19_LOC (0x1E01B3)
#define K20_LOC (0x1E01B4)
#define K21_LOC (0x1E01B5)
#define K22_LOC (0x1E01B6)
#define K23_LOC (0x1E01B7)
#define K24_LOC (0x1E01B8)
#define K25_LOC (0x1E01B9)
#define K26_LOC (0x1E01BA)
#define K27_LOC (0x1E01BB)
#define K28_LOC (0x1E01BC)
#define K29_LOC (0x1E01BD)
#define K30_LOC (0x1E01BE)
#define K31_LOC (0x1E01BF)
//********************* JALU Circular ********************************
#define JB0_LOC (0x1E01C0)
#define JB1_LOC (0x1E01C1)
#define JB2_LOC (0x1E01C2)
#define JB3_LOC (0x1E01C3)
#define JL0_LOC (0x1E01C4)
#define JL1_LOC (0x1E01C5)
#define JL2_LOC (0x1E01C6)
#define JL3_LOC (0x1E01C7)
//********************* KALU Circular ********************************
#define KB0_LOC (0x1E01E0)
#define KB1_LOC (0x1E01E1)
#define KB2_LOC (0x1E01E2)
#define KB3_LOC (0x1E01E3)
#define KL0_LOC (0x1E01E4)
#define KL1_LOC (0x1E01E5)
#define KL2_LOC (0x1E01E6)
#define KL3_LOC (0x1E01E7)
//******************** Sequencer Registers ***************************
#define CJMP_LOC (0x1E0340)
#define RETI_LOC (0x1E0342)
#define RETIB_LOC (0x1E0343)
#define RETS_LOC (0x1E0344)
#define DBGE_LOC (0x1E0345)
#define LC0_LOC (0x1E0348)
#define LC1_LOC (0x1E0349)
//********************************************************************
#define IVSW_LOC (0x1E0350)
//*** Flag Control, Set, and Clear Registers with Bit Defines
#define FLAGREG_LOC (0x1E0354)
#define FLAGREGST_LOC (0x1E0355)
#define FLAGREGCL_LOC (0x1E0356)
// Bit positions
#define FLAGREG_FLAG0_EN_P (0) // FLAG0 output enable is bit 0 in FLAGREG
#define FLAGREG_FLAG1_EN_P (1) // FLAG1 output enable is bit 1 in FLAGREG
#define FLAGREG_FLAG2_EN_P (2) // FLAG2 output enable is bit 2 in FLAGREG
#define FLAGREG_FLAG3_EN_P (3) // FLAG3 output enable is bit 3 in FLAGREG
#define FLAGREG_FLAG0_OUT_P (4) // FLAG0 out pin is bit 4 in FLAGREG
#define FLAGREG_FLAG1_OUT_P (5) // FLAG1 out pin is bit 5 in FLAGREG
#define FLAGREG_FLAG2_OUT_P (6) // FLAG2 out pin is bit 6 in FLAGREG
#define FLAGREG_FLAG3_OUT_P (7) // FLAG3 out pin is bit 7 in FLAGREG
// Bit masks
#define FLAGREG_FLAG0_EN MAKE_BITMASK_(FLAGREG_FLAG0_EN_P)
#define FLAGREG_FLAG1_EN MAKE_BITMASK_(FLAGREG_FLAG1_EN_P)
#define FLAGREG_FLAG2_EN MAKE_BITMASK_(FLAGREG_FLAG2_EN_P)
#define FLAGREG_FLAG3_EN MAKE_BITMASK_(FLAGREG_FLAG3_EN_P)
#define FLAGREG_FLAG0_OUT MAKE_BITMASK_(FLAGREG_FLAG0_OUT_P)
#define FLAGREG_FLAG1_OUT MAKE_BITMASK_(FLAGREG_FLAG1_OUT_P)
#define FLAGREG_FLAG2_OUT MAKE_BITMASK_(FLAGREG_FLAG2_OUT_P)
#define FLAGREG_FLAG3_OUT MAKE_BITMASK_(FLAGREG_FLAG3_OUT_P)
//******************** SQCTL With Bit Defines ************************
#define SQCTL_LOC (0x1E0358)
#define SQCTLST_LOC (0x1E0359)
#define SQCTLCL_LOC (0x1E035A)
// Bit positions
#define SQCTL_GIE_P (2)
#define SQCTL_SW_P (3)
#define SQCTL_DBGDIS_P (8)
#define SQCTL_NMOD_P (9)
#define SQCTL_TRCBEN_P (10)
#define SQCTL_TRCBEXEN_P (11)
// Bit Masks
#define SQCTL_GIE MAKE_BITMASK_(SQCTL_GIE_P)
#define SQCTL_SW MAKE_BITMASK_(SQCTL_SW_P)
#define SQCTL_DBGDIS MAKE_BITMASK_(SQCTL_DBGDIS_P)
#define SQCTL_NMOD MAKE_BITMASK_(SQCTL_NMOD_P)
#define SQCTL_TRCBEN MAKE_BITMASK_(SQCTL_TRCBEN_P)
#define SQCTL_TRCBEXEN MAKE_BITMASK_(SQCTL_TRCBEXEN_P)
//******************** SQSTAT With Bit Defines ***********************
#define SQSTAT_LOC (0x1E035B)
// Bit positions (of the masks)
#define SQSTAT_MODE_P (0)
#define SQSTAT_IDLE_P (2)
#define SQSTAT_SPVCMD_P (3)
#define SQSTAT_EXCAUSE_P (8)
#define SQSTAT_EMCAUSE_P (12)
#define SQSTAT_FLG_P (16)
#define SQSTAT_GISTAT_P (20)
#define SQSTAT_SWSTAT_P (21)
#define SQSTAT_EMSTAT_P (22)
#define SQSTAT_BTBEN_P (24)
#define SQSTAT_BTBLK_P (25)
// Bit masks
#define SQSTAT_MODE (0x00000003)
#define SQSTAT_IDLE (0x00000004)
#define SQSTAT_SPVCMD (0x000000F8)
#define SQSTAT_EXCAUSE (0x00000F00)
#define SQSTAT_EMCAUSE (0x0000F000)
#define SQSTAT_FLG (0x000F0000)
#define SQSTAT_GISTAT MAKE_BITMASK_(SQSTAT_GISTAT_P)
#define SQSTAT_SWSTAT MAKE_BITMASK_(SQSTAT_SWSTAT_P)
#define SQSTAT_EMSTAT MAKE_BITMASK_(SQSTAT_EMSTAT_P)
#define SQSTAT_BTBEN MAKE_BITMASK_(SQSTAT_BTBEN_P)
#define SQSTAT_BTBLK MAKE_BITMASK_(SQSTAT_BTBLK_P)
//******************** SFREG With Bit Defines ************************
#define SFREG_LOC (0x1E035C)
// Bit positions
#define SFREG_GSCF0_P (0)
#define SFREG_GSCF1_P (1)
#define SFREG_XSCF0_P (2)
#define SFREG_XSCF1_P (3)
#define SFREG_YSCF0_P (4)
#define SFREG_YSCF1_P (5)
// Bit Masks
#define SFREG_GSCF0 MAKE_BITMASK_(SFREG_GSCF0_P )
#define SFREG_GSCF1 MAKE_BITMASK_(SFREG_GSCF1_P )
#define SFREG_XSCF0 MAKE_BITMASK_(SFREG_XSCF0_P )
#define SFREG_XSCF1 MAKE_BITMASK_(SFREG_XSCF1_P )
#define SFREG_YSCF0 MAKE_BITMASK_(SFREG_YSCF0_P )
#define SFREG_YSCF1 MAKE_BITMASK_(SFREG_YSCF1_P )
//*********************** BTB Registers ******************************
#define BTBCMD_LOC (0x1E035E)
// Bit positions
#define BTBCMD_ADDR_P (0)
#define BTBCMD_CMD_P (28)
// Bit Masks
#define BTBCMD_ADDR (0x0001FFFF)
#define BTBCMD_CMD (0xF0000000)
#define BTBDATA_LOC (0x1E035F)
//******************* Emulation Registers I **************************
//******************** Watchpoint Registers **************************
#define WP0CTL_LOC (0x1E0360)
// Bit positions
#define WP0CTL_OPMODE_P (0)
#define WP0CTL_EXTYPE_P (2)
#define WP0CTL_SSTP_P (4)
#define WP0CTL_CNTINIT_P (16)
#define WP1CTL_LOC (0x1E0361)
// Bit positions
#define WP1CTL_OPMODE_P (0)
#define WP1CTL_EXTYPE_P (2)
#define WP1CTL_READ_P (4)
#define WP1CTL_WRITE_P (5)
#define WP1CTL_JK_P (6)
#define WP1CTL_CNTINIT_P (16)
#define WP2CTL_LOC (0x1E0362)
// Bit positions
#define WP2CTL_OPMODE_P (0)
#define WP2CTL_EXTYPE_P (2)
#define WP2CTL_READ_P (4)
#define WP2CTL_WRITE_P (5)
#define WP2CTL_CNTINIT_P (16)
// Bit Masks
// OPMODE
#define WPCTL_NOTRANGE (0x00000003)
// R/W
#define WPCTL_READ (0x00000010)
#define WPCTL_WRITE (0x00000020)
// EXTYPE
#define WPCTL_NOEXCEPT (0x00000000)
#define WPCTL_EXCEPT (0x00000004)
#define WPCTL_EMUTRAP (0x00000008)
// SSTP
#define WPCTL_SSTP (0x00000010)
// J/K
#define WPCTL_JALU (0x00000080)
#define WPCTL_KALU (0x00000040)
#define WP0STAT_LOC (0x1E0364)
#define WP1STAT_LOC (0x1E0365)
#define WP2STAT_LOC (0x1E0366)
// Bit positions (of the masks)
#define WPSTAT_VALUE_P (0)
#define WPSTAT_EX_P (16)
// Bit masks
#define WPSTAT_VALUE (0x0000FFFF)
#define WPSTAT_EX (0x00030000)
#define WP0L_LOC (0x1E0368)
#define WP0H_LOC (0x1E0369)
#define WP1L_LOC (0x1E036A)
#define WP1H_LOC (0x1E036B)
#define WP2L_LOC (0x1E036C)
#define WP2H_LOC (0x1E036D)
#define CCNT0_LOC (0x1E0370)
#define CCNT1_LOC (0x1E0371)
#define PRFM_LOC (0x1E0372)
// Bit positions
#define PRFM_NGR_P (0)
#define PRFM_GR_P (4)
#define PRFM_MODULE_P (8)
#define PRFM_SCYCLE_P (16)
#define PRFM_BTBPRED_P (17)
#define PRFM_ISL_P (18)
#define PRFM_CCYCLE_P (19)
#define PRFM_SUMEN_P (31)
#define PRFCNT_LOC (0x1E0373)
#define TRCBMASK_LOC (0x1E0374)
#define TRCBPTR_LOC (0x1E0375)
//*************** Cache Registers With Bit Defines *******************
// Command registers
#define CACMD0_LOC (0x1E03C0)
#define CACMD2_LOC (0x1E03C8)
#define CACMD4_LOC (0x1E03D0)
#define CACMD6_LOC (0x1E03D8)
#define CACMD8_LOC (0x1E03E0)
#define CACMD10_LOC (0x1E03E8)
#define CACMDB_LOC (0x1E03FC)
// Bit Masks
#define CACMD_EN (0x00000000)
#define CACMD_DIS (0x04000000)
#define CACMD_SLOCK (0x08000000)
#define CACMD_ELOCK (0x0c000000)
#define CACMD_CB (0x10000000)
#define CACMD_INV (0x14000000)
#define CACMD_INIT (0x40000000)
#define CACMD_INIT_LOCK (0x44000000)
#define CACMD_REFRESH (0x50000000)
#define CACMD_NOSTALL (0x00004000)
// Bit Positions
#define CACMD_LEN_P (15)
// Address/Index registers
#define CCAIR0_LOC (0x1E03C1)
#define CCAIR2_LOC (0x1E03C9)
#define CCAIR4_LOC (0x1E03D1)
#define CCAIR6_LOC (0x1E03D9)
#define CCAIR8_LOC (0x1E03E1)
#define CCAIR10_LOC (0x1E03E9)
#define CCAIRB_LOC (0x1E03FD)
// Status registers
#define CASTAT0_LOC (0x1E03C2)
#define CASTAT2_LOC (0x1E03CA)
#define CASTAT4_LOC (0x1E03D2)
#define CASTAT6_LOC (0x1E03DA)
#define CASTAT8_LOC (0x1E03E2)
#define CASTAT10_LOC (0x1E03EA)
#define CASTATB_LOC (0x1E03FE)
// Bit Positions
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