device.h

增强型51单片机fs7821sd卡、mmc卡读写程序

/*
**********************************************************************************************
* Project:	TK7821
* File:		Device.h
* Contents: 
*           The chip-related hardware definition
*
* $Date: 02/25/05    Jason    v0.1
*        05/12/05    Mingo    v0.2   www.fameg.com
*
* Copyright (c) 2005 Fameg, Inc. All rights reserved
***********************************************************************************************
*/

#ifndef DeviceH
#define DeviceH

#define USB_BASE        0xf000
#define SD_BASE         0xf300

//----------------------------------------------------------------------------
// USB CSR
//----------------------------------------------------------------------------
#define GCTL            0x00
  #define RESET           0x01
  #define DISCONNECT      0x02
  #define SUSPEND         0x04
  #define RESUME          0x08
  #define RESET_ALL       0x20  
  #define FIFO0_STS       0x40  
  #define FIFO1_STS       0x80  
#define EPIE            0x01
  #define IRQ_RX0         0x01
  #define IRQ_TX0         0x02
  #define IRQ_IN0         0x04
  #define IRQ_TX1         0x08
  #define IRQ_RX2         0x10
#define EPIM            0x03
#define USBIE           0x05
  #define IRQ_USB_RST     0x01
  #define IRQ_IDLE_3MS    0x02
  #define IRQ_RESUME      0x04
#define USBIM           0x06
#define USBADDR         0x07
#define EPCTL           0x08
  #define EN_EP0          0x01
  #define EN_EP1          0x02
  #define EN_EP2          0x04
  #define CLR_EP0_TOG     0x10
  #define CLR_EP1_TOG     0x20
  #define CLR_EP2_TOG     0x40
#define USB_SPEED       0x0c
  #define SPEED_READY     0x01
  #define SPEED           0x02
#define FIFO0_ADDR      0x0d
#define FIFO1_ADDR      0x0e
#define FIFO_CLK_CTRL   0x0f
  #define FIFO0_CLK       0x01
  #define FIFO1_CLK       0x02
  #define FIFO2_CLK       0x04
#define EP0_RXTOKEN     0x10
  #define STS_OUT0        0x01
  #define STS_SETUP0      0x02
  #define STS_SETUP0_OW   0x04
  #define STS_IN_DATA     0x08
#define EP0_RXCSR       0x11
  #define EN_RX0          0x01
  #define EN_RX0_STL      0x02
  #define RX0_TOG         0x04
  #define RX0_TOGERR      0x08
  #define STS_RX0_ACK     0x10
  #define STS_RX0_STL     0x20
  #define STS_RX0_ERR     0x40
#define EP0_RXCNT       0x12
#define EP0_RXDATA      0x13
#define EP0_TXCSR       0x14
  #define EN_TX0          0x01
  #define EN_TX0_STL      0x02
  #define TX0_TOGERR      0x04
  #define STS_TX0_ACK     0x10
  #define STS_TX0_STL     0x20
  #define STS_TX0_ERR     0x40
#define EP0_TXCNT       0x15
#define EP0_TXDATA      0x16
#define EP0_ADDR
#define EP1_TXCSR       0x18
  #define EN_TX1          0x01
  #define EN_TX1_STL      0x02
  #define TX1_TOG         0x04
  #define STS_TX1_ACK     0x10
  #define STS_TX1_STL     0x20
  #define STS_TX1_ERR     0x40
  #define TX1_FIFO_NUM    0x80
#define EP1_TXCNT0      0x19
#define EP1_TXCNT1      0x1a  
#define EP2_RXCSR       0x1c
  #define EN_RX2          0x01
  #define EN_RX2_STL      0x02
  #define RX2_TOG         0x04
  #define STS_RX2_TOGERR  0x08
  #define STS_RX2_ACK     0x10
  #define STS_RX2_STL     0x20
  #define STS_RX2_ERR     0x40
  #define RX2_FIFO_NUM    0x80
#define EP2_RXCNT0      0x1d
#define EP2_RXCNT1      0x1e  
#define USBADDR1        0x3c
#define USBADDR2        0x3d
#define USBADDR3        0x3e
#define USBADDR4        0x3f
#define USB_TEST_MODE1  0x7f // From s6034
#define USB_TEST_MODE0  0x80 // Before s6034
  #define SET_TM_PKT      0x01 
  #define SET_TM_SE0_NAK  0x02  
  #define SET_TM_J        0x04   
  #define SET_TM_K        0x08  
#define MAJOR_ID        0x81
#define MINOR_ID        0x82
#define MAJOR_VERSION   0x83
#define MINOR_VERSION   0x84
#define UPGRADE_CTRL    0x85
  #define SPI_CE_N        0x40
  #define UPGRADE_EN      0x80
#define CODE_ADDR0      0x86
#define CODE_ADDR1      0x87
#define CODE_DATA       0x88
#define CHIP_TRAP0      0x89
  #define USB20_HS        0x08
  #define FLASH_EN_MODE   0x10
  #define CPU_CLK_DIV     0x20
  #define CPU_CLK_SEL     0x40
  #define USB20_FS        0x80
#define CHIP_TRAP1      0x8a
#define XTAL_SELECT     0x8b
#define PROBE_SELECT    0x8c

//----------------------------------------------------------------------------
// MMC/SD CSR
//----------------------------------------------------------------------------
#define SD_CLK_CTRL     0x00
  #define SD_CLK_EN       0x01
  #define SD_CLK_SEL      0x02
  #define SD_CLK_NIBBLE   0x04
  #define SD_CLK_AUTO_DIS 0x08
  #define SD_RESET        0x80
#define SD_BUFFER_BASE  0x01
#define SD_COMMAND      0x02
#define SD_STATUS       0x03
  #define SD_CARD_STS     0x01
  #define SD_WPD          0x02
  #define SD_BUSY         0x04
  #define SD_CRC16_STS    0x38
#define SD_IE           0x04
  #define SD_COMPLETE     0x01
  #define SD_CARD_CHANGE  0x02
  #define SD_CRC16_ERR    0x04
  #define SD_CRC7_ERR     0x08
#define SD_IM           0x05
#define SD_CMDBUF_BASE  0x20
#define SD_RESPBUF_BASE 0x40

#endif