📄 main.c
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/*
**********************************************************************************************
* Project: TK7821
* File: main.c
* Contents:
* The main and interrupt handler
*
* $Date: 02/25/05 Jason v0.1
* 04/21/05 Mingo v0.2 www.fameg.com
* 12/12/05 Jason v0.3 Modify the state machine in bus reset
*
* Copyright (c) 2005 Fameg, Inc. All rights reserved
***********************************************************************************************
*/
#include <reg51.h>
#include <stdio.h>
#include <stdlib.h>
#include "Device.h"
#include "UsbDisk.h"
#include "Storage.h"
static bit CfGetFlashInfoFlag = false;
static bit SuspendFlag = false;
bit ResetFlag = false;
xdata UINT16 DelayTimer = 0;
//modify by Hellen 2005/09/30
bit BusResetFlag = false;
bit BusResetCntFlag = false;
xdata UINT32 HwVerNum;
//----------------------------------------------------------------------------
// Timeout every 10 ms
//----------------------------------------------------------------------------
void Timer0() interrupt 1 using 3
{
// Restore the counter to 10 ms
TH0 = 0xCE;
TL0 = 0xE8;
// Inc the system tick
if (DelayTimer)
DelayTimer --;
if (CmdTimer)
CmdTimer --;
if (CfGetFlashInfoTimer)
{
CfGetFlashInfoTimer --;
if (CfGetFlashInfoTimer == 0)
CfGetFlashInfoFlag = true;
}
}
//----------------------------------------------------------------------------
// Enter the suspend mode
//----------------------------------------------------------------------------
void EnterSuspend()
{
BYTE RegValue = CSRRead(USB_BASE + GCTL); //0xF000
StorageSuspend();
POWER_LED_CTRL = 1;
RegValue |= SUSPEND; //SUSPEND==0x04
CSRWrite(USB_BASE + GCTL, RegValue);
while (CSRRead(USB_BASE + GCTL) & SUSPEND);
// Ignore unstable clock stage for 100ms
Delay(100);
POWER_LED_CTRL = 0;
StorageResume();
}
//----------------------------------------------------------------------------
void main()
{
TH1 = 0xf8; // For 15MHz CPU Clock
TH0 = 0xCE;
TL0 = 0xE8;
TMOD = 0x21;
TCON = 0x50;
IP = 0x02;
IE = 0x82;
NormalSpeed(); //STRETCH = 3;
CSRWrite(USB_BASE + GCTL, CSRRead(USB_BASE + GCTL) | RESET); //0xF000,General control register
POWER_LED_CTRL = 0;
HwVerNum = ((UINT32)HwId() << 16) | HwVersion();
CfPowerOn(); // Fix the problem that some CF cards will hold data bus low when power off
StorageInit();
UsbInit();
while (true)
{
BYTE Event;
Event = CSRRead(USB_BASE + EPIE); //0xF001,EP interrupt event 1 register
if (Event)
{
if (Event & (IRQ_RX0 | IRQ_TX0 | IRQ_IN0))
UsbCtrlIntHandler(Event);
if (Event & (IRQ_TX1 | IRQ_RX2))
{
UsbBulkIntHandler(Event);
}
}
Event = CSRRead(USB_BASE + USBIE) & (IRQ_USB_RST | IRQ_IDLE_3MS);//0xF005,State interrupt event register
if (Event)
{
CSRWrite(USB_BASE + USBIE, ~Event);
if (Event & IRQ_USB_RST)
{
CSRWrite(USB_BASE + USBADDR, 0); //0xF007,Function address register 0
CSRWrite(USB_BASE + EPCTL, EN_EP0 | EN_EP1 | EN_EP2 ); //add by Jason 12/12/2005
CSRWrite(USB_BASE + EP1_TXCSR, 0x00);
BusResetFlag = true;
}
if (Event & IRQ_IDLE_3MS)
{
EnterSuspend();
}
}
Event = CSRRead(CF_BASE + CF_IE) & CF_CARD_CHANGE; //0xF212,CF interrupt status
if (Event)
{
CSRWrite(CF_BASE + CF_IE, ~Event);
CfIntHandler(Event);
}
if (CfGetFlashInfoFlag)
{
CfMediaChange();
CfGetFlashInfoFlag = false;
}
}
}
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