📄 init.inc
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.equ UserMode, 0xd0
.equ FIQMode, 0xd1
.equ IRQMode, 0xd2
.equ SupervisorMode, 0xd3
.equ AbortMode, 0xd7
.equ UndefinedMode, 0xdb
.equ SystemMode, 0xdf
.equ WTCON, 0x53000000
@ about interrupt register
.equ SRCPND, 0x4A000000
.equ SUBSRCPND, 0x4A000018
.equ INTMOD, 0x4A000004
.equ INTMSK, 0x4A000008
.equ INTSUBMSK, 0x4A00001C
.equ PRIORITY, 0x4A00000C
.equ INTPND, 0x4A000010
.equ INTOFFSET, 0x4A000014
@ about clock register
.equ MDIV_202MHz, 0xa1
.equ PDIV_202MHz, 0x03
.equ SDIV_202MHz, 0x01
.equ vMPLLCON_202MHz,((MDIV_202MHz << 12)|(PDIV_202MHz<<4)|(SDIV_202MHz))
.equ LOCKTIME, 0x4c000000
.equ MPLLCON, 0x4c000004
.equ UPLLCON, 0x4c000008
.equ CLKCON, 0x4c00000c
.equ CLKSLOW, 0x4c000010
.equ CLKDIVN, 0x4c000014
@ about bank
.equ BWSCON, 0x48000000
.equ REFRESH, 0x48000024
.equ DW1, 0
.equ WS1, 0
.equ ST1, 0
.equ DW2, 0
.equ WS2, 0
.equ ST2, 0
.equ DW3, 0
.equ WS3, 0
.equ ST3, 0
.equ DW4, 0
.equ WS4, 0
.equ ST4, 0
.equ DW5, 0
.equ WS5, 0
.equ ST5, 0
.equ DW6, 2
.equ WS6, 0
.equ ST6, 0
.equ DW7, 0
.equ WS7, 0
.equ ST7, 0
@ BANK0CON
.equ B0_Tacs, 0
.equ B0_Tcos, 0
.equ B0_Tacc, 0
.equ B0_Tcoh, 0
.equ B0_Tah, 0
.equ B0_Tacp, 0
.equ B0_PMC, 0
@ BANK1CON
.equ B1_Tacs, 0
.equ B1_Tcos, 0
.equ B1_Tacc, 0
.equ B1_Tcoh, 0
.equ B1_Tah, 0
.equ B1_Tacp, 0
.equ B1_PMC, 0
@ BANK2CON
.equ B2_Tacs, 0
.equ B2_Tcos, 0
.equ B2_Tacc, 0
.equ B2_Tcoh, 0
.equ B2_Tah , 0
.equ B2_Tacp, 0
.equ B2_PMC , 0
@ BANK3CON
.equ B3_Tacs, 0
.equ B3_Tcos, 0
.equ B3_Tacc, 0
.equ B3_Tcoh, 0
.equ B3_Tah , 0
.equ B3_Tacp, 0
.equ B3_PMC , 0
@ BANK4CON
.equ B4_Tacs, 0
.equ B4_Tcos, 0
.equ B4_Tacc, 0
.equ B4_Tcoh, 0
.equ B4_Tah , 0
.equ B4_Tacp, 0
.equ B4_PMC , 0
@ BANK5CON
.equ B5_Tacs, 0
.equ B5_Tcos, 0
.equ B5_Tacc, 0
.equ B5_Tcoh, 0
.equ B5_Tah , 0
.equ B5_Tacp, 0
.equ B5_PMC , 0
@ BANK6CON
.equ B6_MT, 0x3 @ SDRAM
.equ B6_Trcd, 0x1 @ 3 clocks
.equ B6_SCAN, 0x1 @ 9bit
@ BANK7CON
.equ B7_MT, 0
.equ B7_Trcd, 0
.equ B7_SCAN, 0
@ REFRESH parameter
.equ REFEN, 0x1
.equ TREFMD, 0x0
.equ Trp, 0x0 @ 2clk
.equ Trc, 0x3 @ 7clk
.equ Tchr, 0x2 @ 3clk
.equ REFCNT, 474 @ period=15.6us, HCLK=101Mhz, (2048+1-15.6*101)
.equ MINIBOOT_RAM_BASE,0x30900000
@about the stack location
.equ SYS_STACK_SIZE, 0x8000
.equ IRQ_STACK_SIZE, 0x8000
.equ ABORT_STACK_SIZE,0x8000
.equ ABORT_STACK_BASE,0x30A00000-4
.equ IRQ_STACK_BASE, ABORT_STACK_BASE-ABORT_STACK_SIZE
.equ SYS_STACK_BASE, IRQ_STACK_BASE-IRQ_STACK_SIZE
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