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📄 switch.s

📁 美国加州大学操作系统课程实验平台Nachos
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#if defined(ApplePowerPC)	/* The AIX PowerPC code is incompatible with the assembler on MacOS X	 * and Linux.  So the SWITCH code was adapted for IBM 750 compatible	 * processors, and ThreadRoot is modeled after the more reasonable	 * looking ThreadRoot's in this file.	 *	 * Joshua LeVasseur <jtl@ira.uka.de>	 */	.align	2	.globl	_SWITCH_SWITCH:	stw	r1, 0(r3)	/* Store stack pointer. */	stmw	r13, 20(r3)	/* Store general purpose registers 13 - 31. */	stfd	f14, 96(r3)	/* Store floating point registers 14 -31. */	stfd	f15,  104(r3)	stfd	f16,  112(r3)	stfd	f17,  120(r3) 	stfd	f18,  128(r3) 	stfd	f19,  136(r3) 	stfd	f20,  144(r3) 	stfd	f21,  152(r3) 	stfd	f22,  160(r3) 	stfd	f23,  168(r3) 	stfd	f24,  176(r3) 	stfd	f25,  184(r3) 	stfd	f26,  192(r3) 	stfd	f27,  200(r3) 	stfd	f28,  208(r3) 	stfd	f29,  216(r3) 	stfd	f30,  224(r3) 	stfd	f31,  232(r3) 	mflr	r0	stw	r0, 244(r3)	/* Spill the link register. */	mfcr	r12	stw	r12, 240(r3)	/* Spill the condition register. */	lwz	r1, 0(r4)	/* Load the incoming stack pointer. */	lwz	r0, 244(r4)	/* Load the incoming link register. */	mtlr	r0		/* Restore the link register. */	lwz	r12, 240(r4)	/* Load the condition register value. */	mtcrf	0xff, r12	/* Restore the condition register. */	lmw	r13, 20(r4)	/* Restore registers r13 - r31. */	lfd	f14,  96(r4)	/* Restore floating point register f14 - f31. */	lfd	f15,  104(r4)	lfd	f16,  112(r4)	lfd	f17,  120(r4)	lfd	f18,  128(r4) 	lfd	f19,  136(r4) 	lfd	f20,  144(r4) 	lfd	f21,  152(r4) 	lfd	f22,  160(r4) 	lfd	f23,  168(r4) 	lfd	f24,  176(r4) 	lfd	f25,  184(r4) 	lfd	f26,  192(r4) 	lfd	f27,  200(r4) 	lfd	f28,  208(r4) 	lfd	f29,  216(r4) 	lfd	f30,  224(r4) 	lfd	f31,  232(r4) 	/* When a thread first starts, the following blr instruction jumps	 * to ThreadRoot.  ThreadRoot expects the incoming thread block	 * in r4.	 */	blr	/* Branch to the address held in link register. */	.align	2	.globl	_ThreadRoot_ThreadRoot:	lwz	r20, 16(r4)	/* StartupPCState - ThreadBegin		*/	lwz	r21, 8(r4)	/* InitialArgState - arg		*/	lwz	r22, 4(r4)	/* InitialPCState - func		*/	lwz	r23, 12(r4)	/* WhenDonePCState - ThreadFinish	*/	/* Call ThreadBegin function. */	mtctr	r20		/* The function pointer. */	bctrl	/* Call the target function. */	mr	r3, r21		/* Function arg. */	mtctr	r22		/* Function pointer. */	bctrl	/* Call the ThreadFinish function. */	mtctr	r23	bctrl	/* We shouldn't execute here. */1:	b	1b#endif#if defined(PowerPC) && !defined(ApplePowerPC)                .globl branch[ds]                .csect branch[ds]                .long  .branch[PR]                .long  TOC[tc0]                .long  0                .toc T.branch:      .tc    .branch[tc], branch[ds]                .globl .branch[PR]                .csect .branch[PR]         l      0, 0x0(11)        #  load function address into r0         mtctr  0                 #  move r0 into counter register         l      2, 0x4(11)        #  move new TOC address into r2         l      11, 0x8(11)       #  reset function address         bctr                     #  branch to the counter register                .globl ThreadRoot[ds]                .csect ThreadRoot[ds]                .long  .ThreadRoot[PR]                .long  TOC[tc0]                .long  0                .toc T.ThreadRoot:  .tc    .ThreadRoot[tc], ThreadRoot[ds]                .globl .ThreadRoot[PR]                .csect .ThreadRoot[PR]                 .set argarea,      32                .set linkarea,     24                .set locstckarea,   0                .set nfprs,        18                .set ngprs,        19                .set szdsa,        8*nfprs+4*ngprs+linkarea+argarea+locstckarea                         mflr    0         mfcr    12         bl      ._savef14         cror   0xf, 0xf, 0xf         stm    13, -8*nfprs-4*ngprs(1)         st     0, 8(1)         st     12, 4(1)         st     4,  24(1)         st     5,  28(1)         st     6,  32(1)         stu    1, -szdsa(1)          muli   11,3,1          #  copy contents of register r24 to r11         bl     .branch[PR]      #  call function branch         cror   0xf, 0xf, 0xf    #  no operation                  ai     1,1,szdsa         lm     13, -8*nfprs-4*ngprs(1)         bl     ._restf14         cror   0xf, 0xf, 0xf         l      0, 8(1)         l      12, 4(1)         mtlr   0         mtcrf  0x38, 12         l      4, 24(1)         l      5, 28(1)         l      6, 32(1)           mflr    0         mfcr    12         bl      ._savef14         cror   0xf, 0xf, 0xf         stm    13, -8*nfprs-4*ngprs(1)         st     0, 8(1)         st     12, 4(1)         st     6,  24(1)         stu    1, -szdsa(1)          muli   3, 4,1          #  load user function parameter r22 to r3                              muli   11,5,1          #  copy contents of register r21 to r11         bl     .branch[PR]      #  call function branch         cror   0xf, 0xf, 0xf    #  no operation         ai     1,1,szdsa         lm     13, -8*nfprs-4*ngprs(1)         bl     ._restf14         cror   0xf, 0xf, 0xf         l      0, 8(1)         l      12, 4(1)         mtlr   0         mtcrf  0x38, 12         l      6, 24(1)         muli   11,6,1          #  copy contents of register r23 to r11         bl     .branch[PR]      #  call function branch         cror   0xf, 0xf, 0xf    #  no operation          brl                     #  the programme should not return here.         .extern ._savef14         .extern ._restf14                     .globl SWITCH[ds]            .csect SWITCH[ds]            .long  .SWITCH[PR]            .long  TOC[tc0]            .long  0            .toc T.SWITCH:  .tc    .SWITCH[tc], SWITCH[ds]            .globl .SWITCH[PR]            .csect .SWITCH[PR]         st     1,   0(3)       # store stack pointer         stm    13,  20(3)      # store general purpose registers (13 -31)         stfd   14,  96(3)      # store floating point registers (14 -31)          stfd   15,  104(3)     # there is no single instruction to do for         stfd   16,  112(3)     # floating point registers. so do one by one         stfd   17,  120(3)          stfd   18,  128(3)          stfd   19,  136(3)          stfd   20,  144(3)          stfd   21,  152(3)          stfd   22,  160(3)          stfd   23,  168(3)          stfd   24,  176(3)          stfd   25,  184(3)          stfd   26,  192(3)          stfd   27,  200(3)          stfd   28,  208(3)          stfd   29,  216(3)          stfd   30,  224(3)          stfd   31,  232(3)          mflr   0               # move link register value to register 0         st     0,   244(3)     # store link register value                mfcr   12              # move condition register to register 12         st     12,  240(3)     # store condition register value         l      1,   0(4)       # load stack pointer         l      0,   244(4)     # load link register value         mtlr   0                  l      12,  240(4)     # load condition register value         mtcrf  0x38,  12         lm     13,  20(4)      # load into general purpose registers (13 -31)          lfd    14,  96(4)      # load into floating point registers (14 -31)          lfd    15,  104(4)     # there is no single instruction for         lfd    16,  112(4)     # loading into more than one floating point          lfd    17,  120(4)     # registers. so do one by one.         lfd    18,  128(4)          lfd    19,  136(4)          lfd    20,  144(4)          lfd    21,  152(4)          lfd    22,  160(4)          lfd    23,  168(4)          lfd    24,  176(4)          lfd    25,  184(4)          lfd    26,  192(4)          lfd    27,  200(4)          lfd    28,  208(4)          lfd    29,  216(4)          lfd    30,  224(4)          lfd    31,  232(4)          l      3,   16(4)         l      5,   4(4)         l      6,   12(4)         l      4,   8(4)         brl                    # branch to the address held in link register.#endif // PowerPC#ifdef ALPHA/*  * Porting to Alpha was done by Shuichi Oikawa (shui@sfc.keio.ac.jp). *//* *	Symbolic register names and register saving rules * *	Legend: *		T	Saved by caller (Temporaries) *		S	Saved by callee (call-Safe registers) */#define	v0	$0	/* (T)		return value		*/#define t0	$1	/* (T)		temporary registers	*/#define s0	$9	/* (S)		call-safe registers	*/#define s1	$10#define s2	$11#define s3	$12#define s4	$13#define s5	$14#define s6	$15#define a0	$16	/* (T)		argument registers	*/#define a1	$17#define ai	$25	/* (T)		argument information	*/#define ra	$26	/* (T)		return address		*/#define pv	$27	/* (T)		procedure value		*/#define	gp	$29	/* (T)		(local) data pointer	*/#define sp	$30	/* (S)		stack pointer		*/#define zero	$31	/* 		wired zero		*/	.set	noreorder	# unless overridden	.align	3	.text 		.globl ThreadRoot	.ent	ThreadRoot,0ThreadRoot:	.frame	sp,0,ra	ldgp	gp,0(pv)	mov	zero,s6		# Clearing the frame pointer here				# makes gdb backtraces of thread stacks 				# end here (I hope!)	mov	StartupPC,pv	jsr	ra,(pv)		# call startup procedure	ldgp	gp,0(ra)	mov	InitialArg,a0	mov	InitialPC,pv	jsr	ra,(pv)		# call main procedure	ldgp	gp,0(ra)	mov	WhenDonePC,pv	jsr 	ra,(pv)		# when done, call clean up procedure	ldgp	gp,0(ra)	.end ThreadRoot		# NEVER REACHED	/* a0 -- pointer to old Thread * * a1 -- pointer to new Thread */	.globl SWITCH	.ent	SWITCH,0SWITCH:	.frame	sp,0,ra	ldgp	gp,0(pv)		stq	ra, PC(a0)		# save return address	stq	gp, GP(a0)	stq	sp, SP(a0)		# save new stack pointer	stq	s0, S0(a0)		# save all the callee-save registers	stq	s1, S1(a0)	stq	s2, S2(a0)	stq	s3, S3(a0)	stq	s4, S4(a0)	stq	s5, S5(a0)	stq	s6, S6(a0)		# save frame pointer		ldq	ra, PC(a1)		# load the return address		ldq	gp, GP(a1)	ldq	sp, SP(a1)		# load the new stack pointer	ldq	s0, S0(a1)		# load the callee-save registers	ldq	s1, S1(a1)	ldq	s2, S2(a1)	ldq	s3, S3(a1)	ldq	s4, S4(a1)	ldq	s5, S5(a1)	ldq	s6, S6(a1)	mov	ra,pv	ret	zero,(ra)	.end SWITCH	#endif // ALPHA

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