📄 const.inc.bak
字号:
;/**************************************************************************
;* *
;* Copyright (c) 2006 by JINRUN Technology Co., Ltd. *
;* Title : FPPA TM demo board---PIC PARTY
;* Content: AD,LCM Drive,Key input,LED flash,etc.,
;* MCU : PIC16F877A(PIC),PDK80C08(PDK)[FPPA TM]
;* LCD : RT1602C
;* OSC : 8MHz(ext. HT)
;* WDT : OFF
;* Author : Raker.Yang *
;* FPPA TM 简介：FPPA TM是世界首创的多核心单晶片，所有RAM和ROM却能够共享
;* 目前支持8个核心（8路独立PC，STACK，ACC等）
;* 既然有了独立多核心，跑多任务程序也就更简单了。
;* 更重要的是，它可以非常方便的扩展MCU外围，如，PWM，IIC，UART等。
;* 如果你对FPPA TM技术感兴趣，欢迎访问笔者博客 http://gongkong.gkbk.com
;* 或加入作者QQ：595142970, QQ群25644462
;* 同时欢迎各路商家前来进行方案合作!
;*
;* 声明：本资料仅供个人学习PIC或FPPA TM软件设计参考,任何人都可以转载此资料。
;* 但任何单位或个人都不能将此资料作为商业用品。本资料可能存在一些缺陷，
;* 如果你将本资料用于产品，所引起的一切后果，均由使用者承担
;* *
;**************************************************************************/
;----------PIN list--------------------------------------------------------
; PIN NO------PIN NAME----PIN FUNCTION
; 2 ------AD0 ----OP Vout detect
; 3 ------AD1 ----3.3V detect
; 4 ------AD2 ----CDS Voltage detect
; 5 ------AD3 ----current detect
; 6 ------T0CKI ----frequence detect
; 7 ------AD5 ----Relay output drive current test
; 8 ------/R/D ----LCM enable (RE0)
; 9 ------/W/R ----LCM write/read enable (RE1)
; 10 ------RE2 ----LCM ready signal
; 11 ------VDD
; 12 ------VSS
; 13 ------OSCI
; 14 ------OSCIN
; 15 ------RC0 ----Tric pulse output signal
; 16 ------RC1 ----PWM1
; 17 ------RC0 ----PWM0
; 18 ------RC3 ----CDS drive signal
; 19 ------D0 ----4053 AC
; 20 ------D1 ----4053 BC
; 21 ------D2 ----4053 CC
; 22 ------D3 ----4053 HI
; 23 ------RC4 ----FAIL LED Drive, step sw in
; 24 ------RC5 ----PASS LED Drive, start sw in
; 25 ------RC6 ----Mode sw in
; 26 ------RC7 ----ZCD drive control
; 27 ------RD4 ----CDS voltage test control
; 28 ------RD5 ----TARGET VDD control
; 29 ------RD6 ----Relay output driving current test control
; 30 ------RD7 ----OP driving current test control
; 31 ------VSS
; 32 ------VDD
;33~40 -----RB0~RB7 ----LCM DATA OUTPUT
;-----------------------------------------------
;;-----------4053 channel select LIST------------------; x(CDS port): x0(CDS Voltage test);x1(CDS drive signal); y(Freq out): y0(TBout); y1(TCout); z(AD op out):z0(op1 out);z1(op2 out); C B A : Z Y X ; 0 0 0 : z0 y0 x0; 0 0 1 : z0 y0 x1; 0 1 0 : z0 y1 x0; 0 1 1 : z0 y1 x1; 1 0 0 : z1 y0 x0; 1 0 1 : z1 y0 x1; 1 1 0 : z1 y1 x0; 1 1 1 : z1 y1 x1;-----------4053 channel select LIST END-------------
;------------LCD control define ----------------
; LCD_RS EQU 02H
; LCD_RW EQU 01H
; LCD_E EQU 00H
;-----------LCD control define end-------------
;-----------发送模式定义-----------------------
#define SentToP1 0
#define SentToP2 1
#define SentToP3 2
#define SentToPall 3
#define SentModeMax 4
;----------发送模式定义结束--------------------
;--------4053 CHANNEL SELECT-------------------
CDS_SIN EQU 0H
CDS_VT EQU 1H
FREQ_FRM_TB EQU 2H
FREQ_FRM_TC EQU 3H
OP_VOUT_FRM_1 EQU 4H
OP_VOUT_FRM_2 EQU 5H
;-------CD4053 CHANNEL SELECT END--------------
;
;-------AD channel select----------------------
AD_CHN_SOP1 EQU 0H
AD_CHN_SOP2 EQU 0H
AD_CHN_SOPDRV EQU 0H
AD_CHN_SCDS EQU 1H
AD_CHN_SVREF EQU 2H
AD_CHN_SCUR EQU 3H
AD_CHN_SIREL EQU 4H
AD_CHN_S7 EQU 7H
;-------AD Channel select end-----------------
;
;-------AD K define---------------------------
; 所有增益用16位二进制数表示,精确到4/8位小数
K_GAIN_OP1LO EQU 0x7d ;display gain value
K_GAIN_OP1HI EQU 0x00
K_GAIN_OP2LO EQU 0x7d ;display gain value
K_GAIN_OP2HI EQU 0x00
K_GAIN_VREFLO EQU 0x7d ;just display voltage value
K_GAIN_VREFHI EQU 0x00
K_GAIN_VCDSLO EQU 0x7d ;just display voltage value
K_GAIN_VCDSHI EQU 0x00
K_GAIN_CURLO EQU 0x0D ;no dot process
K_GAIN_CURHI EQU 0x03
K_GAIN_IRELLO EQU 0x7d ;just display voltage value
K_GAIN_IRELHI EQU 0x00
K_GAIN_OPDRVLO EQU 0x7d ;just display voltage value
K_GAIN_OPDRVHI EQU 0x00
;--------AD K define end-----------------------
;
;--------Comparation limit define-----------------------
#define LIMIT_GAIN_CURHH 0x00
#define LIMIT_GAIN_CURHL 0x00
#define LIMIT_GAIN_CURLH 0x00
#define LIMIT_GAIN_CURLL 0x00
;
#define LIMIT_GAIN_CDSHH 0x00
#define LIMIT_GAIN_CDSHL 0x00
#define LIMIT_GAIN_CDSLH 0x00
#define LIMIT_GAIN_CDSLL 0x00
;
#define LIMIT_GAIN_VREFHH 0x00
#define LIMIT_GAIN_VREFHL 0x00
#define LIMIT_GAIN_VREFLH 0x00
#define LIMIT_GAIN_VREFLL 0x00
;
#define LIMIT_GAIN_OP1HH 0x00
#define LIMIT_GAIN_OP1HL 0x00
#define LIMIT_GAIN_OP1LH 0x00
#define LIMIT_GAIN_OP1LL 0x00
;
#define LIMIT_FREQ_TBHH 0x00
#define LIMIT_FREQ_TBHL 0x00
#define LIMIT_FREQ_TBLH 0x00
#define LIMIT_FREQ_TBLL 0x00
;
#define LIMIT_GAIN_OP2HH 0x00
#define LIMIT_GAIN_OP2HL 0x00
#define LIMIT_GAIN_OP2LH 0x00
#define LIMIT_GAIN_OP2LL 0x00
;
#define LIMIT_FREQ_TCHH 0x00
#define LIMIT_FREQ_TCHL 0x00
#define LIMIT_FREQ_TCLH 0x00
#define LIMIT_FREQ_TCLL 0x00
;
#define LIMIT_LOAD_RELHH 0x00
#define LIMIT_LOAD_RELHL 0x00
#define LIMIT_LOAD_RELLH 0x00
#define LIMIT_LOAD_RELLL 0x00
;
#define LIMIT_DRV_OP2HH 0x00
#define LIMIT_DRV_OP2HL 0x00
#define LIMIT_DRV_OP2LH 0x00
#define LIMIT_DRV_OP2LL 0x00
;
;--------PORT define START---------------------
#define ACT_MODE_CTRL PORTC, 7
#define ZCD_DRV PORTC, 6
#define START_SW_IN PORTC, 5
#define PASS_LED_OUT PORTC, 5
#define FAIL_LED_OUT PORTC, 4
#define STEP_SW_IN PORTC, 4
#define ADRI0 PORTC, 3
#define ADRI1 PORTC, 2
#define ADRO1 PORTC, 1
#define ADRO0 PORTC, 0
#define CDS_VT_CTRL PORTD, 4
#define TG_VDD_CTRL PORTD, 5
#define I_REL_CTRL PORTD, 6
#define OP_DRV_CTRL PORTD, 7
#define AC PORTD, 0
#define BC PORTD, 1
#define CC PORTD, 2
#define INH PORTD, 3
;
#define ZCD_DRV_IO TRISC, 7
#define ACT_MODE_IO TRISC, 6
#define FAIL_LED_IO TRISC, 5
#define START_SW_IO TRISC, 5
#define PASS_LED_IO TRISC, 4
#define STEP_SW_IO TRISC, 4
#define ADRI0_IO TRISC, 3
#define ADRI1_IO TRISC, 2
#define ADRO1_IO TRISC, 1
#define ADRO0_IO TRISC, 0
#define CDS_VT_CTRL_IO TRISD, 4
#define TG_VDD_CTRL_IO TRISD, 5
#define I_REL_CTRL_IO TRISD, 6
#define OP_DRV_CTRL_IO TRISD, 7
#define AC_IO TRISD, 0
#define BC_IO TRISD, 1
#define CC_IO TRISD, 2
#define INH_IO TRISD, 3
#define LCD_DATA_PORT PORTD
#define LCD_PORT_IO TRISD
#define LCD_EN PORTE, 0
#define LCD_RW PORTE, 1
#define LCD_RS PORTE, 2
;-------PORT define end --------------------------------
;
;--------OTHER CONSTANT Define--------------------------
#define DELAY5MS .30
#define DELAY10MS .60
#define DELAY15MS .90
#define DELAY20MS .120
#define DELAY25MS .150
#define DELAY30MS .180
#define DELAY35MS .210
#define DELAY40MS .240
#define TMR1_CSTH 0xB1
#define TMR1_CSTL 0xDA ;DF - 5 = DA
#define DOT_CNT 0x08
#define TRIC_DRV_CNT 0x08
#define AD_CNT 0x10
;SYS_STATUS bit define
#define UART_SENT_EN 7
#define UART_BUSY 6
#define TEST_FAIL 5
#define SOFT_MODE 4
#define FLAG10MS 0
;SYS_STATUS bit define end
;
;KEY_STATUS bit define -------------------
#define KEY_VALID 7
#define KEY_BUSY 0
#define MODE_CHECK B'00010000'
#define ONOFF_CHECK B'00100000'
;KEY_STATUS bit define -------------------
;
;TIMER_FLAG bit define end
#define KEY_SCAN_FLAG 0
#define KEY_PROCESS_FLAG 1
#define AD_CONVERT_FLAG 2
#define UART_SENT_FLAG 3
#define LCD_DRIVE_FLAG 4
;TIMER_FLAG bit define end
;
;LCD_DRV_REQ bit define------------------
#define G_LCD_DRV_REQ 7
#define S_LCD_DRV_REQ 6
#define R_LCD_DRV_REQ 5
;LCD_DRV_REQ bit define end--------------
;--------OTHER CONSTANT define end-------------
CBLOCK 0x20
TEMP0
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
TEMP6
TEMP7 ;--------TEMP0~TEMP7,TEMPARY REGISTER IN NORMAL PROGRAM
TEMP8
TEMP9
TEMP10
TEMP11
TEMP12
TEMP13
TEMP14
TEMP15 ;--------TEMP8~TEMP15,TEMPARY REGISTER IN NORMAL PROGRAM
TEMPCNT
MUL16AHI
MUL16ALO ;A 乘数
MUL16BHI ;B 被乘数和积的高16位
MUL16BLO
MULRL8 ;积的低16位，多设变量名，方便记忆
MULRH8
CP_RESULT
LINE_CHAR_CNT
CHN_AD_SEL
CHN_SW4053_SEL
DISP_DATAR: 4
DISP_DATAS: 2
AD_VAL_REGH
AD_VAL_REGL ;16采样后求平均数作为当前的测试值
AD_VAL_REGL_BUF
AD_CONVERT_CNT
LCD_DRV_REQ ;
;----LCD_DRV_REQ bit define----------
;bit7 :总的刷新请求
;bit6 :接收数据刷新请求
;bit5 :发送数据刷新请求
;----LCD_DRV_REQ bit define end------
CNT_10MS
INT_CNT
TEMPI0
TEMPI1
TEMPI2 ;--------TEMPI0~I7,TEMPARY REGISTER IN INTERRUPT PROGRAM
LED_DRV_CNT
RX_DATA1
RX_DATA2
RX_DATA3
TX_DATA
MODE_REG
;MODE_REG define-------------
;0 to P1
;1 to P2
;2 to P3
;3 to all
;---MODE_REG define end------
MODE_CNT
KEY_VAL_BUF ;
KEY_VAL
KEY_CNT ;
KEY_STATUS ;Bit7, valid key,after key processing, please clear this bit.
SYS_STATUS
;------SYS_STATUS bit define -------
;bit7: UART_SENT_EN ;0--->OFF ;1--->ON
;bit6:
;bit5;
;bit4:
;------SYS_STATUS bit define end
TIMER_FLAG ; ALL TASK EXCUTE PER 10mS
ENDC
CBLOCK 0x70
STATUSBUF
PCLATHBUF
FSRBUF
WBUF
STSBUF
ENDC
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -