📄 sl_x400p.c
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/***************************************************************************** @(#) sl_x400p.c,v openss7-0_9_2_E(0.9.2.36) 2007/03/14 05:39:22 ----------------------------------------------------------------------------- Copyright (c) 2001-2006 OpenSS7 Corporation <http://www.openss7.com/> Copyright (c) 1997-2000 Brian F. G. Bidulock <bidulock@openss7.org> All Rights Reserved. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; version 2 of the License. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ----------------------------------------------------------------------------- U.S. GOVERNMENT RESTRICTED RIGHTS. If you are licensing this Software on behalf of the U.S. Government ("Government"), the following provisions apply to you. If the Software is supplied by the Department of Defense ("DoD"), it is classified as "Commercial Computer Software" under paragraph 252.227-7014 of the DoD Supplement to the Federal Acquisition Regulations ("DFARS") (or any successor regulations) and the Government is acquiring only the license rights granted herein (the license rights customarily provided to non-Government users). If the Software is supplied to any unit or agency of the Government other than DoD, it is classified as "Restricted Computer Software" and the Government's rights in the Software are defined in paragraph 52.227-19 of the Federal Acquisition Regulations ("FAR") (or any successor regulations) or, in the cases of NASA, in paragraph 18.52.227-86 of the NASA Supplement to the FAR (or any successor regulations). ----------------------------------------------------------------------------- Commercial licensing and support of this software is available from OpenSS7 Corporation at a fee. See http://www.openss7.com/ ----------------------------------------------------------------------------- Last Modified 2007/03/14 05:39:22 by brian ----------------------------------------------------------------------------- sl_x400p.c,v Revision 0.9.2.36 2007/03/14 05:39:22 brian - corrected support for older Dallas chips Revision 0.9.2.35 2007/03/13 19:12:22 brian - add support for DS2156 chip Revision 0.9.2.34 2007/03/13 11:29:16 brian - remove extraneous newlines Revision 0.9.2.33 2007/03/13 08:50:04 brian - bug fixes for PR x400p-ss7/5766 Revision 0.9.2.32 2007/03/13 05:46:00 brian - more info Revision 0.9.2.31 2007/03/09 04:09:33 brian - fixed timer bug in x400p driver Revision 0.9.2.30 2006/12/21 11:14:43 brian - documentation updates for release, and moved tali Revision 0.9.2.29 2006/12/18 10:51:27 brian - subpackaging changes for release Revision 0.9.2.28 2006/12/11 22:02:51 brian - performance tuning Revision 0.9.2.27 2006/12/11 11:57:40 brian - T1 works correctly, almost all test cases pass Revision 0.9.2.26 2006/12/11 07:40:12 brian - corrections from testing Revision 0.9.2.25 2006/12/09 10:40:24 brian - corrections from testing Revision 0.9.2.24 2006/12/08 12:16:13 brian - bufq lock correction Revision 0.9.2.23 2006/12/08 11:46:32 brian - a few more corrections from testing Revision 0.9.2.22 2006/12/08 05:32:09 brian - changes from testing of X400P-SS7 driver Revision 0.9.2.21 2006/12/07 12:56:17 brian - corrections from testing Revision 0.9.2.20 2006/12/07 09:58:39 brian - corrections and init scripts Revision 0.9.2.19 2006/12/06 11:45:22 brian - updated X400P driver and test suites Revision 0.9.2.18 2006/11/15 08:58:54 brian - error in sdl rx found by inspection Revision 0.9.2.17 2006/05/08 11:01:17 brian - new compilers mishandle postincrement of cast pointers Revision 0.9.2.16 2006/03/07 01:14:58 brian - binary compatible callouts Revision 0.9.2.15 2006/03/04 13:00:27 brian - FC4 x86_64 gcc 4.0.4 2.6.15 changes *****************************************************************************/#ident "@(#) sl_x400p.c,v openss7-0_9_2_E(0.9.2.36) 2007/03/14 05:39:22"static char const ident[] = "sl_x400p.c,v openss7-0_9_2_E(0.9.2.36) 2007/03/14 05:39:22";/* * This is an SL (Signalling Link) kernel module which provides all of the * capabilities of the SLI for the E400P-SS7 and T400P-SS7 cards. This is a * complete SS7 MTP Level 2 OpenSS7 implementation. *///#define _DEBUG 1#undef _DEBUG#define _LFS_SOURCE 1#define _MPS_SOURCE 1#define _SVR4_SOURCE 1#define X400P_DOWNLOAD_FIRMWARE 1#include <sys/os7/compat.h>#include <stdbool.h>#ifdef LINUX#include <linux/ioport.h>#include <asm/io.h>#include <asm/dma.h>#include <linux/pci.h>#include <linux/interrupt.h>#ifndef _MPS_SOURCE#if 0#include "bufpool.h"#else#include <sys/os7/bufpool.h>#endif#endif /* _MPS_SOURCE */#endif /* LINUX */#include <ss7/lmi.h>#include <ss7/lmi_ioctl.h>#include <ss7/sdli.h>#include <ss7/sdli_ioctl.h>#include <ss7/sdti.h>#include <ss7/sdti_ioctl.h>#include <ss7/sli.h>#include <ss7/sli_ioctl.h>#ifdef X400P_DOWNLOAD_FIRMWARE#include "v400pfw.h"#include "v401pfw.h"#endif#define SL_X400P_DESCRIP "X400P-SS7: SS7/SL (Signalling Link) STREAMS DRIVER."#define SL_X400P_EXTRA "Part of the OpenSS7 Stack for Linux Fast-STREAMS."#define SL_X400P_REVISION "OpenSS7 sl_x400p.c,v openss7-0_9_2_E(0.9.2.36) 2007/03/14 05:39:22"#define SL_X400P_COPYRIGHT "Copyright (c) 1997-2006 OpenSS7 Corporation. All Rights Reserved."#define SL_X400P_DEVICE "Supports the V40XP E1/T1/J1 (Tormenta II/III) PCI boards."#define SL_X400P_CONTACT "Brian Bidulock <bidulock@openss7.org>"#define SL_X400P_LICENSE "GPL"#define SL_X400P_BANNER SL_X400P_DESCRIP "\n" \ SL_X400P_EXTRA "\n" \ SL_X400P_REVISION "\n" \ SL_X400P_COPYRIGHT "\n" \ SL_X400P_DEVICE "\n" \ SL_X400P_CONTACT#define SL_X400P_SPLASH SL_X400P_DESCRIP " - " \ SL_X400P_REVISION#ifdef LINUXMODULE_AUTHOR(SL_X400P_CONTACT);MODULE_DESCRIPTION(SL_X400P_DESCRIP);MODULE_SUPPORTED_DEVICE(SL_X400P_DEVICE);#ifdef MODULE_LICENSEMODULE_LICENSE(SL_X400P_LICENSE);#endif /* MODULE_LICENSE */#if defined MODULE_ALIASMODULE_ALIAS("streams-sl_x400p");#endif#if defined MODULE_VERSIONMODULE_VERSION(__stringify(PACKAGE_RPMEPOCH) ":" PACKAGE_VERSION "." PACKAGE_RELEASE "-" PACKAGE_RPMRELEASE PACKAGE_RPMEXTRA2);#endif#endif /* LINUX */#ifdef LFS#define SL_X400P_DRV_ID CONFIG_STREAMS_SL_X400P_MODID#define SL_X400P_DRV_NAME CONFIG_STREAMS_SL_X400P_NAME#define SL_X400P_CMAJORS CONFIG_STREAMS_SL_X400P_NMAJORS#define SL_X400P_CMAJOR_0 CONFIG_STREAMS_SL_X400P_MAJOR#define SL_X400P_UNITS CONFIG_STREAMS_SL_X400P_NMINORS#endif#ifdef LINUX#ifdef MODULE_ALIAS#ifdef LFSMODULE_ALIAS("streams-modid-" __stringify(CONFIG_STREAMS_SL_X400P_MODID));MODULE_ALIAS("streams-driver-sl-x400p");MODULE_ALIAS("streams-major-" __stringify(CONFIG_STREAMS_SL_X400P_MAJOR));MODULE_ALIAS("/dev/streams/x400p-sl");MODULE_ALIAS("/dev/streams/x400p-sl/*");MODULE_ALIAS("/dev/streams/clone/x400p-sl");#endif /* LFS */MODULE_ALIAS("char-major-" __stringify(SL_X400P_CMAJOR_0));MODULE_ALIAS("char-major-" __stringify(SL_X400P_CMAJOR_0) "-*");MODULE_ALIAS("char-major-" __stringify(SL_X400P_CMAJOR_0) "-0");MODULE_ALIAS("/dev/x400p-sl");#endif /* MODULE_ALIAS */#endif /* LINUX *//* * ======================================================================= * * STREAMS Definitions * * ======================================================================= */#define DRV_ID SL_X400P_DRV_ID#define DRV_NAME SL_X400P_DRV_NAME#define CMAJORS SL_X400P_CMAJORS#define CMAJOR_0 SL_X400P_CMAJOR_0#define UNITS SL_X400P_UNITS#ifdef MODULE#define DRV_BANNER SL_X400P_BANNER#else /* MODULE */#define DRV_BANNER SL_X400P_SPLASH#endif /* MODULE */STATIC struct module_info xp_minfo = { .mi_idnum = DRV_ID, /* Module ID number */ .mi_idname = DRV_NAME, /* Module name */ .mi_minpsz = 1, /* Min packet size accepted */ .mi_maxpsz = INFPSZ, /* Max packet size accepted */ .mi_hiwat = 1024, /* Hi water mark */ .mi_lowat = 0, /* Lo water mark */};STATIC struct module_stat xp_mstat = { 0, };STATIC streamscall int xp_open(queue_t *, dev_t *, int, int, cred_t *);STATIC streamscall int xp_close(queue_t *, int, cred_t *);STATIC struct qinit xp_rinit = { .qi_putp = ss7_oput, /* Read put (message from below) */ .qi_srvp = ss7_osrv, /* Read queue service */ .qi_qopen = xp_open, /* Each open */ .qi_qclose = xp_close, /* Last close */ .qi_minfo = &xp_minfo, /* Information */ .qi_mstat = &xp_mstat, /* Statistics */};STATIC struct qinit xp_winit = { .qi_putp = ss7_iput, /* Write put (message from above) */ .qi_srvp = ss7_isrv, /* Write queue service */ .qi_minfo = &xp_minfo, /* Information */ .qi_mstat = &xp_mstat, /* Statistics */};STATIC struct streamtab sl_x400pinfo = { .st_rdinit = &xp_rinit, /* Upper read queue */ .st_wrinit = &xp_winit, /* Upper write queue */};/* * ======================================================================== * * Private structure * * ======================================================================== */struct xp;struct sp;struct cd;typedef struct xp_path { uint residue; /* residue bits */ uint rbits; /* number of residue bits */ ushort bcc; /* crc for message */ uint state; /* state */ uint mode; /* path mode */ uint type; /* path frame type */ uint bytes; /* number of whole bytes */ mblk_t *msg; /* message */ mblk_t *nxt; /* message chain block */ mblk_t *cmp; /* compression/repeat message */ uint repeat; /* compression/repeat count */ uint octets; /* octets counted */} xp_path_t;typedef struct xp { STR_DECLARATION (struct xp); /* stream declaration */ struct sp *sp; /* span for this channel */ int chan; /* index (chan) */ int slot; /* 32-bit backplane timeslot */ xp_path_t tx; /* transmit path variables */ xp_path_t rx; /* receive path variables */ lmi_option_t option; /* LMI protocol and variant options */ struct { bufq_t rb; /* received buffer */ bufq_t tb; /* transmission buffer */ bufq_t rtb; /* retransmission buffer */ sl_timers_t timers; /* SL protocol timers */ sl_config_t config; /* SL configuration */ sl_statem_t statem; /* SL state machine */ sl_notify_t notify; /* SL notification options */ sl_stats_t stats; /* SL statistics */ sl_stats_t stamp; /* SL statistics timestamps */ sl_stats_t statsp; /* SL statistics periods */ } sl; struct { bufq_t tb; /* transmission buffer */ sdt_timers_t timers; /* SDT protocol timers */ sdt_config_t config; /* SDT configuration */ sdt_statem_t statem; /* SDT state machine */ sdt_notify_t notify; /* SDT notification options */ sdt_stats_t stats; /* SDT statistics */ sdt_stats_t stamp; /* SDT statistics timestamps */ sdt_stats_t statsp; /* SDT statistics periods */ } sdt; struct { bufq_t tb; /* transmission buffer */ sdl_timers_t timers; /* SDL protocol timers */ sdl_config_t config; /* SDL configuration */ sdl_statem_t statem; /* SDL state machine variables */ sdl_notify_t notify; /* SDL notification options */ sdl_stats_t stats; /* SDL statistics */ sdl_stats_t stamp; /* SDL statistics timestamps */ sdl_stats_t statsp; /* SDL statistics periods */ } sdl;} xp_t;#define XP_PRIV(__q) ((struct xp *)(__q)->q_ptr)STATIC struct xp *xp_alloc_priv(queue_t *, struct xp **, dev_t *, cred_t *);STATIC void xp_free_priv(struct xp *);STATIC struct xp *xp_get(struct xp *);STATIC void xp_put(struct xp *);typedef struct sp { HEAD_DECLARATION (struct sp); /* head declaration */ struct cd *cd; /* card for this span */ struct xp *slots[32]; /* timeslot structures */ ulong recovertime; /* alarm recover time */ ulong iobase; /* span iobase */ int span; /* index (span) */ volatile ulong loopcnt; /* loop command count */ sdl_config_t config; /* span configuration */} sp_t;STATIC struct sp *xp_alloc_sp(struct cd *, uint8_t);STATIC void xp_free_sp(struct sp *);STATIC struct sp *sp_get(struct sp *);STATIC void sp_put(struct sp *);typedef struct cd { HEAD_DECLARATION (struct cd); /* head declaration */ ulong xll_region; /* Xilinx 32-bit memory region */ ulong xll_length; /* Xilinx 32-bit memory length */ volatile uint32_t *xll; /* Xilinx 32-bit memory map */ ulong xlb_region; /* Xilinx 8-bit memory region */ ulong xlb_length; /* Xilinx 8-bit memory lenght */ volatile uint8_t *xlb; /* Xilinx 8-bit memory map */ ulong plx_region; /* PLX 9030 memory region */ ulong plx_length; /* PLX 9030 memory length */ volatile uint16_t *plx; /* PLX 9030 memory map */ uint frame; /* frame number */ struct sp *spans[4]; /* structures for spans */ uint32_t *wbuf; /* wr buffer */ uint32_t *rbuf; /* rd buffer */ volatile int uebno; /* upper elastic buffer number */ volatile int lebno; /* lower elastic buffer number */ volatile int eval_syncsrc; /* need to reevaluate sync src */ volatile int leds; /* leds on the card */ int card; /* index (card) */ int board; /* board hardware index */ int device; /* device hardware index */ int devrev; /* device hardware revision */ int hw_flags; /* board and device hardware flags */ ulong irq; /* card irq */ ulong iobase; /* card iobase */ struct tasklet_struct tasklet; /* card tasklet */ irqreturn_t(*isr) (int, void *, struct pt_regs *); /* interrupt service routine */ sdl_config_t config; /* card configuration */} cd_t;STATIC struct cd *xp_alloc_cd(void);STATIC void xp_free_cd(struct cd *);STATIC struct cd *cd_get(struct cd *);STATIC void cd_put(struct cd *);#ifdef _MPS_SOURCE#define ss7_fast_allocb(__bufpoolp, __size, __priority) allocb(__size, __priority)#define ss7_fast_freemsg(__bufpoolp, __mp) freemsg(__mp)#define ss7_bufpool_reserve(__bufpoolp, __numb) do { } while (0)#define ss7_bufpool_release(__bufpoolp, __numb) do { } while (0)#define ss7_bufpool_init(__bufpoolp) do { } while (0)#define ss7_bufpool_term(__bufpoolp) do { } while (0)#else /* _MPS_SOURCE */STATIC struct ss7_bufpool xp_bufpool = { 0, };#endif /* _MPS_SOURCE *//* * ------------------------------------------------------------------------ * * Card Structures and Macros * * ------------------------------------------------------------------------ */#ifdef X400P_DOWNLOAD_FIRMWARE#define GPIOC (0x54 >> 1) /* GPIO control register */#define GPIO_WRITE 0x4000 /* GPIO4 data */#define GPIO_PROGRAM 0x20000 /* GPIO5 data */#define GPIO_INIT 0x100000 /* GPIO6 data */#define GPIO_DONE 0x800000 /* GPIO7 data */#endif#define INTCSR (0x4c >> 1)#define PLX_INTENA 0x43#define SYNREG 0x400#define CTLREG 0x401#define LEDREG 0x402#define STAREG 0x400#define LOOPUP 0x80#define LOOPDN 0x40#define INTENA 0x01 /* Interrupt Enable */#define OUTBIT 0x02 /* Drives "TEST1" signal ("Interrupt" outbit) */#define DINTENA 0x04 /* Dallas Interrupt Enable (Allows DINT signal to driver INT) */#define MASTER 0x08 /* External Syncrhonization Enable (MASTER signal). */#define E1DIV 0x10 /* Select E1 Divisor Mode (0 to T1, 1 for E1). */#define RSERLB 0x20 /* Local serial loopback. */#define LSERLB 0x40 /* Remote serial loopback. */#define INTACK 0x80 /* Interrupt Acknowledge (set to 1 to acknowledge interrupt) */#define INTACTIVE 2#define SYNCSELF 0#define SYNC1 1#define SYNC2 2#define SYNC3 3#define SYNC4 4#define LEDBLK 0#define LEDGRN 1#define LEDRED 2#define LEDYEL 3#define X400_ABIT 8#define X400_BBIT 4#define X400_SPANS 4 /* 4 spans per card */#define X400P_SDL_ALARM_SETTLE_TIME 5000 /* allow alarms to settle for 5 seconds *//* * Mapping of channels 0-23 for T1, 1-31 for E1 into PCM highway timeslots. */STATIC int xp_t1_chan_map[] = { 1, 2, 3, 5, 6, 7, 9, 10, 11, 13, 14, 15, 17, 18, 19, 21, 22, 23, 25, 26, 27, 29, 30, 31};STATIC int xp_e1_chan_map[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31};#define X400P_T1_CHAN_DESCRIPTOR 0xEEEEEEEE#define X400P_E1_CHAN_DESCRIPTOR 0xFFFFFFFE#ifdef __LITTLE_ENDIAN#define span_to_byte(__span) (3-(__span))#else#ifdef __BIG_ENDIAN
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