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📄 hwdefs.h

📁 ARM下加一个硬件驱动比较复杂
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// 
#define  GPIOF_PCMCIA_WP            0x01
#define  GPIOF_PCMCIA_CD1           0x02
#define  GPIOF_PCMCIA_CD2           0x04
#define  GPIOF_PCMCIA_BVD1          0x08
#define  GPIOF_PCMCIA_BVD2          0x10
#define  GPIOF_PCMCIA_VS1           0x20
#define  GPIOF_PCMCIA_IRQ           0x40
#define  GPIOF_PCMCIA_VS2           0x80

//
// EEprom control signals.
//
#define GPIOG_EECLK                 0x01
#define GPIOG_EEDAT                 0x02
#define GPIOG_SLA0                  0x04
#define GPIOG_SLA1                  0x08

//
// AAC/AC97 base
//
#define AC97I_BASE                  (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x00880000)
#define AC97I_CH1_BASE              ((volatile ULONG *)(AC97I_BASE + 0x00))
#define AC97I_CH2_BASE              ((volatile ULONG *)(AC97I_BASE + 0x20))
#define AC97I_CH3_BASE              ((volatile ULONG *)(AC97I_BASE + 0x40))
#define AC97I_CH4_BASE              ((volatile ULONG *)(AC97I_BASE + 0x60))
#define AC97I_S1DATA                ((volatile ULONG *)(AC97I_BASE + 0x80))
#define AC97I_S2DATA                ((volatile ULONG *)(AC97I_BASE + 0x84))
#define AC97I_S12DATA               ((volatile ULONG *)(AC97I_BASE + 0x88))
#define AC97I_RGIS                  ((volatile ULONG *)(AC97I_BASE + 0x8C))
#define AC97I_GIS                   ((volatile ULONG *)(AC97I_BASE + 0x90))
#define AC97I_IM                    ((volatile ULONG *)(AC97I_BASE + 0x94))
#define AC97I_EOI                   ((volatile ULONG *)(AC97I_BASE + 0x98))
#define AC97I_GCR                   ((volatile ULONG *)(AC97I_BASE + 0x9C))
#define AC97I_RESET                 ((volatile ULONG *)(AC97I_BASE + 0xA0))
#define AC97I_SYNC                  ((volatile ULONG *)(AC97I_BASE + 0xA4))
#define AC97I_GCIS                  ((volatile ULONG *)(AC97I_BASE + 0xA8))
                                                            
#define AC97I_DR                    0x00
#define AC97I_RXCR                  0x04
#define AC97I_TXCR                  0x08
#define AC97I_SR                    0x0c
#define AC97I_RISR                  0x10
#define AC97I_ISR                   0x14
#define AC97I_IE                    0x18

#define RXCR_REN                    0x00000001
#define RXCR_SLOT1                  0x00000002
#define RXCR_SLOT2                  0x00000004
#define RXCR_SLOT3                  0x00000008
#define RXCR_SLOT4                  0x00000010
#define RXCR_SLOT5                  0x00000020
#define RXCR_SLOT6                  0x00000040
#define RXCR_SLOT7                  0x00000080
#define RXCR_SLOT8                  0x00000100
#define RXCR_SLOT9                  0x00000200
#define RXCR_SLOT10                 0x00000400
#define RXCR_SLOT11                 0x00000800
#define RXCR_SLOT12                 0x00001000
#define RXCR_RSIZE_16               0x00000000
#define RXCR_RSIZE_18               0x00002000
#define RXCR_RSIZE_20               0x00004000
#define RXCR_RSIZE_12               0x00006000
#define RXCR_RSIZE_MASK             0x00006000
#define RXCR_CM                     0x00008000
#define RXCR_FDIS                   0x00010000

#define TXCR_TEN                    0x00000001
#define TXCR_SLOT1                  0x00000002
#define TXCR_SLOT2                  0x00000004
#define TXCR_SLOT3                  0x00000008
#define TXCR_SLOT4                  0x00000010
#define TXCR_SLOT5                  0x00000020
#define TXCR_SLOT6                  0x00000040
#define TXCR_SLOT7                  0x00000080
#define TXCR_SLOT8                  0x00000100
#define TXCR_SLOT9                  0x00000200
#define TXCR_SLOT10                 0x00000400
#define TXCR_SLOT11                 0x00000800
#define TXCR_SLOT12                 0x00001000
#define TXCR_RSIZE_16               0x00000000
#define TXCR_RSIZE_18               0x00002000
#define TXCR_RSIZE_20               0x00004000
#define TXCR_RSIZE_12               0x00006000
#define TXCR_RSIZE_MASK             0x00006000
#define TXCR_CM                     0x00008000
#define TXCR_FDIS                   0x00010000

#define SR_TXUE                     0x00000040
#define SR_RXOE                     0x00000020
#define SR_TXBUSY                   0x00000010
#define SR_TXFF                     0x00000008
#define SR_RXFF                     0x00000004
#define SR_TXFE                     0x00000002
#define SR_RXFE                     0x00000001

#define ISR_TCIS                    0x00000001
#define ISR_RTIS                    0x00000002
#define ISR_TIS                     0x00000004
#define ISR_RIS                     0x00000008

#define IE_TCIE                     0x00000001
#define IE_RTIE                     0x00000002
#define IE_TIE                      0x00000004
#define IE_RIE                      0x00000008

#define S1DATA_MASK                 0x000000ff
#define S2DATA_MASK                 0x0000ffff
#define S12DATA_MASK                0x00FFFFFF

#define GIS_SLOT1TXCOMPLETE         0x00000001
#define GIS_SLOT2RXVALID            0x00000002
#define GIS_GPIOTXCOMPLETE          0x00000004
#define GIS_GPIOINT                 0x00000008
#define GIS_WINT                    0x00000010
#define GIS_CODEC_READY             0x00000020
#define GIS_SLOT2TXCOMPLETE         0x00000040

#define IM_SLOT1TXCOMPLETE          0x00000001
#define IM_SLOT2RXVALID             0x00000002
#define IM_GPIOTXCOMPLETE           0x00000004
#define IM_GPIOINT                  0x00000008
#define IM_WINT                     0x00000010
#define IM_CODEC_READY              0x00000020
#define IM_SLOT2TXCOMPLETE          0x00000040

#define EOI_WINT                    0x00000001
#define EOI_CODECREADY              0x00000002

#define GCR_AC97IFE                 0x00000001
#define GCR_LOOP                    0x00000002
#define GCR_OCODECREADY             0x00000004

#define RESET_TIMEDRESET            0x00000001
#define RESET_FORCED_RESET          0x00000002
#define RESET_EFORCER               0x00000004

#define SYNC_TIMEDSYNC              0x00000001
#define SYNC_FORCEDSYNC             0x00000002
#define SYNC_EFORCES                0x00000004

#define GCIS_ISR1                   0x0000000F
#define GCIS_ISR2                   0x000000F0
#define GCIS_ISR3                   0x00000F00
#define GCIS_ISR4                   0x0000F000
#define GCIS_GIS                    0x003F0000


//
// SPI Base
//
#define SPI_BASE                    (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008A0000)
#define SPI_CR0                     ((volatile ULONG *)(SPI_BASE + 0x0 ))
#define SPI_CR1                     ((volatile ULONG *)(SPI_BASE + 0x4 ))
#define SPI_DR                      ((volatile ULONG *)(SPI_BASE + 0x8 ))
#define SPI_SR                      ((volatile ULONG *)(SPI_BASE + 0xC ))
#define SPI_CPSR                    ((volatile ULONG *)(SPI_BASE + 0x10 ))
#define SPI_IIR                     ((volatile ULONG *)(SPI_BASE + 0x14 ))
#define SPI_ICR                     ((volatile ULONG *)(SPI_BASE + 0x14 ))

//
// SPI control register 0
//
#define SPICR0_DSS_MASK             0x0000000F
#define SPICR0_FRF_MASK             0x00000030
#define SPICR0_FRF_MOTOROLA         0x00000000
#define SPICR0_FRF_TI               0x00000010
#define SPICR0_FRF_MICROWIRE        0x00000020
#define SPICR0_SPO                  0x00000040
#define SPICR0_SPH                  0x00000080
#define SPICR0_SCR_MASK             0x0000FF00
#define SPICR0_SCR_SHIFT            8

//
// SPI control register 1
//
#define SPICR1_RIE                  0x00000001
#define SPICR1_TIE                  0x00000002
#define SPICR1_RORIE                0x00000004
#define SPICR1_LBM                  0x00000008
#define SPICR1_SSE                  0x00000010
#define SPICR1_MS                   0x00000020
#define SPICR1_SOD                  0x00000040

//
// SPI Status registers
//
#define SPISR_TFE                   0x00000001
#define SPISR_TNF                   0x00000002
#define SPISR_RNE                   0x00000004
#define SPISR_RFF                   0x00000008
#define SPISR_BUSY                  0x00000010

//
// SPI Clock prescale register.
//
#define SPICPSR_DVSR_MASK           0x0000000F

//
// SPI Interrupt status register.
//
#define SPIIIR_RIS                  0x00000001
#define SPIIIR_TIS                  0x00000002
#define SPIIIR_RORIS                0x00000004




//
// High speed IrDA 
//
#define IRDA_BASE                   (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008B0000)
#define IRDA_IRENABLE               ((volatile ULONG *)(IRDA_BASE + 0x00  ))
#define IRDA_IRCON                  ((volatile ULONG *)(IRDA_BASE + 0x04  ))
#define IRDA_IRAMV                  ((volatile ULONG *)(IRDA_BASE + 0x08  ))
#define IRDA_IRFLAG                 ((volatile ULONG *)(IRDA_BASE + 0x0C  ))
#define IRDA_IRDATA                 ((volatile ULONG *)(IRDA_BASE + 0x10  ))
#define IRDA_IRDATATAIL             ((volatile ULONG *)(IRDA_BASE + 0x14  ))
#define IRDA_IRRIB                  ((volatile ULONG *)(IRDA_BASE + 0x20  ))
#define IRDA_MISR                   ((volatile ULONG *)(IRDA_BASE + 0x80  ))
#define IRDA_MIMR                   ((volatile ULONG *)(IRDA_BASE + 0x84  ))
#define IRDA_MIIR                   ((volatile ULONG *)(IRDA_BASE + 0x88  ))
#define IRDA_FISR                   ((volatile ULONG *)(IRDA_BASE + 0x180 ))
#define IRDA_FIMR                   ((volatile ULONG *)(IRDA_BASE + 0x184 ))
#define IRDA_FIIR                   ((volatile ULONG *)(IRDA_BASE + 0x188 ))

#define IRENABLE_FD                 0x10
#define IRENABLE_MD                 0x08
#define IRENABLE_LBM                0x04
#define IRENABLE_FIR                0x03
#define IRENABLE_MIR                0x02
#define IRENABLE_SIR                0x01
#define IRENABLE_DISABLE            0x00

#define IRCON_MUX                   0x01
#define IRCON_MIR_FAST              0x02
#define IRCON_TUS                   0x04
#define IRCON_TXE                   0x08
#define IRCON_RXE                   0x10
#define IRCON_TXP                   0x20
#define IRCON_RXP                   0x40
#define IRCON_AME                   0x80

#define IRFLAG_ABORT                0x01
#define IRFLAG_CRCERR               0x02
#define IRFLAG_OVRRUN               0x04
#define IRFLAG_FRAME                0x08
#define IRFLAG_EOF                  0x40
#define IRFLAG_SYNCED               0x80
#define IRFLAG_INFRM                0x100
#define IRFLAG_TXBUSY               0x200



//
// serial ports
//
#define PRODUCT_SER_BASE            (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008C0000)
#define IR_SER_BASE                 (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008D0000)
#define DEBUG_SER_BASE              (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008E0000)
#define UART1_BASE                  (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008C0000)
#define UART2_BASE                  (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008D0000)
#define UART3_BASE                  (VIRTUAL_SYSTEM_ASIC_REGS_BASE + 0x008E0000)



#define UART1_DR                    ((volatile ULONG *)(UART1_BASE + 0x00))
#define UART1_SR                    ((volatile ULONG *)(UART1_BASE + 0x04))
#define UART1_LCR_H                 ((volatile ULONG *)(UART1_BASE + 0x08))
#define UART1_LCR_M                 ((volatile ULONG *)(UART1_BASE + 0x0C))
#define UART1_LCR_L                 ((volatile ULONG *)(UART1_BASE + 0x10))
#define UART1_CR                    ((volatile ULONG *)(UART1_BASE + 0x14))
#define UART1_FR                    ((volatile ULONG *)(UART1_BASE + 0x18))
#define UART1_IIR                   ((volatile ULONG *)(UART1_BASE + 0x1C))
#define UART1_ILPR                  ((volatile ULONG *)(UART1_BASE + 0x20))
#define UART1_MCR                   ((volatile ULONG *)(UART1_BASE + 0x100))
#define UART1_MCS                   ((volatile ULONG *)(UART1_BASE + 0x104))


#define UART2_DR                    ((volatile ULONG *)(UART2_BASE + 0x00))
#define UART2_SR     

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