ad9851_2007.tan.qmsg

计算实用教程adadad9851实用教程

{ "Info" "ITDB_FULL_SLACK_RESULT" "altpll0:inst6\|altpll:altpll_component\|_clk0 register ROM256ADDR:inst10\|Aout\[1\] register ROM256ADDR:inst10\|Aout\[5\] 28.723 ns " "Info: Slack time is 28.723 ns for clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" between source register \"ROM256ADDR:inst10\|Aout\[1\]\" and destination register \"ROM256ADDR:inst10\|Aout\[5\]\"" { { "Info" "ITDB_SIMPLE_FMAX_RESULT_RESTRICTED" "275.03 MHz " "Info: Fmax is restricted to 275.03 MHz due to tcl and tch limits" {  } {  } 0 0 "Fmax is restricted to %1!s! due to tcl and tch limits" 0 0} { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "30.989 ns + Largest register register " "Info: + Largest register to register requirement is 30.989 ns" { { "Info" "ITDB_FULL_SETUP_REQUIREMENT" "31.250 ns + " "Info: + Setup relationship between source and destination is 31.250 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch 29.365 ns " "Info: + Latch edge is 29.365 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination altpll0:inst6\|altpll:altpll_component\|_clk0 31.250 ns -1.885 ns  50 " "Info: Clock period of Destination clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" is 31.250 ns with  offset of -1.885 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0} { "Info" "ITDB_EDGE_RESULT" "- Launch -1.885 ns " "Info: - Launch edge is -1.885 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source altpll0:inst6\|altpll:altpll_component\|_clk0 31.250 ns -1.885 ns  50 " "Info: Clock period of Source clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" is 31.250 ns with  offset of -1.885 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0}  } {  } 0 0 "%2!c! Setup relationship between source and destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns + Largest " "Info: + Largest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altpll0:inst6\|altpll:altpll_component\|_clk0 destination 10.507 ns + Shortest register " "Info: + Shortest clock path from clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" to destination register is 10.507 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altpll0:inst6\|altpll:altpll_component\|_clk0 1 CLK PLL_1 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 3; CLK Node = 'altpll0:inst6\|altpll:altpll_component\|_clk0'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { altpll0:inst6|altpll:altpll_component|_clk0 } "NODE_NAME" } "" } } { "altpll.tdf" "" { Text "e:/altera/quartus51/libraries/megafunctions/altpll.tdf" 763 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(0.935 ns) 2.577 ns fp_5:inst7\|Cout\[2\] 2 REG LC_X29_Y9_N8 6 " "Info: 2: + IC(1.642 ns) + CELL(0.935 ns) = 2.577 ns; Loc. = LC_X29_Y9_N8; Fanout = 6; REG Node = 'fp_5:inst7\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "2.577 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(0.935 ns) 4.289 ns fp_5:inst8\|Cout\[2\] 3 REG LC_X28_Y9_N5 6 " "Info: 3: + IC(0.777 ns) + CELL(0.935 ns) = 4.289 ns; Loc. = LC_X28_Y9_N5; Fanout = 6; REG Node = 'fp_5:inst8\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.712 ns" { fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.570 ns) + CELL(0.935 ns) 5.794 ns fp_5:inst9\|Cout\[2\] 4 REG LC_X28_Y9_N2 11 " "Info: 4: + IC(0.570 ns) + CELL(0.935 ns) = 5.794 ns; Loc. = LC_X28_Y9_N2; Fanout = 11; REG Node = 'fp_5:inst9\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.505 ns" { fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.002 ns) + CELL(0.711 ns) 10.507 ns ROM256ADDR:inst10\|Aout\[5\] 5 REG LC_X16_Y6_N5 4 " "Info: 5: + IC(4.002 ns) + CELL(0.711 ns) = 10.507 ns; Loc. = LC_X16_Y6_N5; Fanout = 4; REG Node = 'ROM256ADDR:inst10\|Aout\[5\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "4.713 ns" { fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.516 ns ( 33.46 % ) " "Info: Total cell delay = 3.516 ns ( 33.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.991 ns ( 66.54 % ) " "Info: Total interconnect delay = 6.991 ns ( 66.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altpll0:inst6\|altpll:altpll_component\|_clk0 source 10.507 ns - Longest register " "Info: - Longest clock path from clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" to source register is 10.507 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altpll0:inst6\|altpll:altpll_component\|_clk0 1 CLK PLL_1 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 3; CLK Node = 'altpll0:inst6\|altpll:altpll_component\|_clk0'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { altpll0:inst6|altpll:altpll_component|_clk0 } "NODE_NAME" } "" } } { "altpll.tdf" "" { Text "e:/altera/quartus51/libraries/megafunctions/altpll.tdf" 763 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(0.935 ns) 2.577 ns fp_5:inst7\|Cout\[2\] 2 REG LC_X29_Y9_N8 6 " "Info: 2: + IC(1.642 ns) + CELL(0.935 ns) = 2.577 ns; Loc. = LC_X29_Y9_N8; Fanout = 6; REG Node = 'fp_5:inst7\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "2.577 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(0.935 ns) 4.289 ns fp_5:inst8\|Cout\[2\] 3 REG LC_X28_Y9_N5 6 " "Info: 3: + IC(0.777 ns) + CELL(0.935 ns) = 4.289 ns; Loc. = LC_X28_Y9_N5; Fanout = 6; REG Node = 'fp_5:inst8\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.712 ns" { fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.570 ns) + CELL(0.935 ns) 5.794 ns fp_5:inst9\|Cout\[2\] 4 REG LC_X28_Y9_N2 11 " "Info: 4: + IC(0.570 ns) + CELL(0.935 ns) = 5.794 ns; Loc. = LC_X28_Y9_N2; Fanout = 11; REG Node = 'fp_5:inst9\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.505 ns" { fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.002 ns) + CELL(0.711 ns) 10.507 ns ROM256ADDR:inst10\|Aout\[1\] 5 REG LC_X16_Y6_N1 4 " "Info: 5: + IC(4.002 ns) + CELL(0.711 ns) = 10.507 ns; Loc. = LC_X16_Y6_N1; Fanout = 4; REG Node = 'ROM256ADDR:inst10\|Aout\[1\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "4.713 ns" { fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.516 ns ( 33.46 % ) " "Info: Total cell delay = 3.516 ns ( 33.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.991 ns ( 66.54 % ) " "Info: Total interconnect delay = 6.991 ns ( 66.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns - " "Info: - Micro clock to output delay of source is 0.224 ns" {  } { { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns - " "Info: - Micro setup delay of destination is 0.037 ns" {  } { { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.266 ns - Longest register register " "Info: - Longest register to register delay is 2.266 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ROM256ADDR:inst10\|Aout\[1\] 1 REG LC_X16_Y6_N1 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X16_Y6_N1; Fanout = 4; REG Node = 'ROM256ADDR:inst10\|Aout\[1\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.529 ns) + CELL(0.564 ns) 1.093 ns ROM256ADDR:inst10\|Aout\[1\]~61 2 COMB LC_X16_Y6_N1 2 " "Info: 2: + IC(0.529 ns) + CELL(0.564 ns) = 1.093 ns; Loc. = LC_X16_Y6_N1; Fanout = 2; COMB Node = 'ROM256ADDR:inst10\|Aout\[1\]~61'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.093 ns" { ROM256ADDR:inst10|Aout[1] ROM256ADDR:inst10|Aout[1]~61 } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 1.171 ns ROM256ADDR:inst10\|Aout\[2\]~65 3 COMB LC_X16_Y6_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.078 ns) = 1.171 ns; Loc. = LC_X16_Y6_N2; Fanout = 2; COMB Node = 'ROM256ADDR:inst10\|Aout\[2\]~65'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "0.078 ns" { ROM256ADDR:inst10|Aout[1]~61 ROM256ADDR:inst10|Aout[2]~65 } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 1.249 ns ROM256ADDR:inst10\|Aout\[3\]~69 4 COMB LC_X16_Y6_N3 2 " "Info: 4: + IC(0.000 ns) + CELL(0.078 ns) = 1.249 ns; Loc. = LC_X16_Y6_N3; Fanout = 2; COMB Node = 'ROM256ADDR:inst10\|Aout\[3\]~69'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "0.078 ns" { ROM256ADDR:inst10|Aout[2]~65 ROM256ADDR:inst10|Aout[3]~69 } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 1.427 ns ROM256ADDR:inst10\|Aout\[4\]~73 5 COMB LC_X16_Y6_N4 3 " "Info: 5: + IC(0.000 ns) + CELL(0.178 ns) = 1.427 ns; Loc. = LC_X16_Y6_N4; Fanout = 3; COMB Node = 'ROM256ADDR:inst10\|Aout\[4\]~73'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "0.178 ns" { ROM256ADDR:inst10|Aout[3]~69 ROM256ADDR:inst10|Aout[4]~73 } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.839 ns) 2.266 ns ROM256ADDR:inst10\|Aout\[5\] 6 REG LC_X16_Y6_N5 4 " "Info: 6: + IC(0.000 ns) + CELL(0.839 ns) = 2.266 ns; Loc. = LC_X16_Y6_N5; Fanout = 4; REG Node = 'ROM256ADDR:inst10\|Aout\[5\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "0.839 ns" { ROM256ADDR:inst10|Aout[4]~73 ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.737 ns ( 76.65 % ) " "Info: Total cell delay = 1.737 ns ( 76.65 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.529 ns ( 23.35 % ) " "Info: Total interconnect delay = 0.529 ns ( 23.35 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "2.266 ns" { ROM256ADDR:inst10|Aout[1] ROM256ADDR:inst10|Aout[1]~61 ROM256ADDR:inst10|Aout[2]~65 ROM256ADDR:inst10|Aout[3]~69 ROM256ADDR:inst10|Aout[4]~73 ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "2.266 ns" { ROM256ADDR:inst10|Aout[1] ROM256ADDR:inst10|Aout[1]~61 ROM256ADDR:inst10|Aout[2]~65 ROM256ADDR:inst10|Aout[3]~69 ROM256ADDR:inst10|Aout[4]~73 ROM256ADDR:inst10|Aout[5] } { 0.000ns 0.529ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.564ns 0.078ns 0.078ns 0.178ns 0.839ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[5] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[1] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "2.266 ns" { ROM256ADDR:inst10|Aout[1] ROM256ADDR:inst10|Aout[1]~61 ROM256ADDR:inst10|Aout[2]~65 ROM256ADDR:inst10|Aout[3]~69 ROM256ADDR:inst10|Aout[4]~73 ROM256ADDR:inst10|Aout[5] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "2.266 ns" { ROM256ADDR:inst10|Aout[1] ROM256ADDR:inst10|Aout[1]~61 ROM256ADDR:inst10|Aout[2]~65 ROM256ADDR:inst10|Aout[3]~69 ROM256ADDR:inst10|Aout[4]~73 ROM256ADDR:inst10|Aout[5] } { 0.000ns 0.529ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.564ns 0.078ns 0.078ns 0.178ns 0.839ns } } }  } 0 0 "Slack time is %6!s! for clock \"%1!s!\" between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\"" 0 0}
{ "Info" "ITDB_FULL_SLACK_RESULT" "CLK register ROM256ADDR:inst10\|Aout\[7\] memory lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7 -1.918 ns " "Info: Slack time is -1.918 ns for clock \"CLK\" between source register \"ROM256ADDR:inst10\|Aout\[7\]\" and destination memory \"lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7\"" { { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "-0.066 ns + Largest register memory " "Info: + Largest register to memory requirement is -0.066 ns" { { "Info" "ITDB_FULL_SETUP_REQUIREMENT" "1.885 ns + " "Info: + Setup relationship between source and destination is 1.885 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch 6.250 ns " "Info: + Latch edge is 6.250 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination CLK 25.000 ns 0.000 ns  50 " "Info: Clock period of Destination clock \"CLK\" is 25.000 ns with  offset of 0.000 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0} { "Info" "ITDB_EDGE_RESULT" "- Launch 4.365 ns " "Info: - Launch edge is 4.365 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source altpll0:inst6\|altpll:altpll_component\|_clk0 31.250 ns -1.885 ns  50 " "Info: Clock period of Source clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" is 31.250 ns with  offset of -1.885 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0}  } {  } 0 0 "%2!c! Setup relationship between source and destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-1.634 ns + Largest " "Info: + Largest clock skew is -1.634 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 8.873 ns + Shortest memory " "Info: + Shortest clock path from clock \"CLK\" to destination memory is 8.873 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_28 169 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 169; CLK Node = 'CLK'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { CLK } "NODE_NAME" } "" } } { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { -240 -224 -56 -224 "CLK" "" } { 344 -360 -256 360 "CLK" "" } { 488 -344 -304 504 "CLK" "" } { 680 416 432 712 "CLK" "" } { 696 208 248 712 "CLK" "" } { -248 336 384 -232 "CLK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.935 ns) 3.149 ns fp_2:inst\|Cout 2 REG LC_X8_Y10_N3 2 " "Info: 2: + IC(0.745 ns) + CELL(0.935 ns) = 3.149 ns; Loc. = LC_X8_Y10_N3; Fanout = 2; REG Node = 'fp_2:inst\|Cout'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.680 ns" { CLK fp_2:inst|Cout } "NODE_NAME" } "" } } { "fp_2.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_2.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.569 ns) + CELL(0.935 ns) 4.653 ns fp_2:inst3\|Cout 3 REG LC_X8_Y10_N2 172 " "Info: 3: + IC(0.569 ns) + CELL(0.935 ns) = 4.653 ns; Loc. = LC_X8_Y10_N2; Fanout = 172; REG Node = 'fp_2:inst3\|Cout'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.504 ns" { fp_2:inst|Cout fp_2:inst3|Cout } "NODE_NAME" } "" } } { "fp_2.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_2.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.498 ns) + CELL(0.722 ns) 8.873 ns lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7 4 MEM M4K_X17_Y6 8 " "Info: 4: + IC(3.498 ns) + CELL(0.722 ns) = 8.873 ns; Loc. = M4K_X17_Y6; Fanout = 8; MEM Node = 'lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "4.220 ns" { fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "db/altsyncram_n8s.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/altsyncram_n8s.tdf" 183 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.061 ns ( 45.77 % ) " "Info: Total cell delay = 4.061 ns ( 45.77 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.812 ns ( 54.23 % ) " "Info: Total interconnect delay = 4.812 ns ( 54.23 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "8.873 ns" { CLK fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "8.873 ns" { CLK CLK~out0 fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } { 0.000ns 0.000ns 0.745ns 0.569ns 3.498ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.722ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altpll0:inst6\|altpll:altpll_component\|_clk0 source 10.507 ns - Longest register " "Info: - Longest clock path from clock \"altpll0:inst6\|altpll:altpll_component\|_clk0\" to source register is 10.507 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altpll0:inst6\|altpll:altpll_component\|_clk0 1 CLK PLL_1 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 3; CLK Node = 'altpll0:inst6\|altpll:altpll_component\|_clk0'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { altpll0:inst6|altpll:altpll_component|_clk0 } "NODE_NAME" } "" } } { "altpll.tdf" "" { Text "e:/altera/quartus51/libraries/megafunctions/altpll.tdf" 763 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.642 ns) + CELL(0.935 ns) 2.577 ns fp_5:inst7\|Cout\[2\] 2 REG LC_X29_Y9_N8 6 " "Info: 2: + IC(1.642 ns) + CELL(0.935 ns) = 2.577 ns; Loc. = LC_X29_Y9_N8; Fanout = 6; REG Node = 'fp_5:inst7\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "2.577 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.777 ns) + CELL(0.935 ns) 4.289 ns fp_5:inst8\|Cout\[2\] 3 REG LC_X28_Y9_N5 6 " "Info: 3: + IC(0.777 ns) + CELL(0.935 ns) = 4.289 ns; Loc. = LC_X28_Y9_N5; Fanout = 6; REG Node = 'fp_5:inst8\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.712 ns" { fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.570 ns) + CELL(0.935 ns) 5.794 ns fp_5:inst9\|Cout\[2\] 4 REG LC_X28_Y9_N2 11 " "Info: 4: + IC(0.570 ns) + CELL(0.935 ns) = 5.794 ns; Loc. = LC_X28_Y9_N2; Fanout = 11; REG Node = 'fp_5:inst9\|Cout\[2\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.505 ns" { fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] } "NODE_NAME" } "" } } { "fp_5.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/fp_5.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.002 ns) + CELL(0.711 ns) 10.507 ns ROM256ADDR:inst10\|Aout\[7\] 5 REG LC_X16_Y6_N7 2 " "Info: 5: + IC(4.002 ns) + CELL(0.711 ns) = 10.507 ns; Loc. = LC_X16_Y6_N7; Fanout = 2; REG Node = 'ROM256ADDR:inst10\|Aout\[7\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "4.713 ns" { fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.516 ns ( 33.46 % ) " "Info: Total cell delay = 3.516 ns ( 33.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.991 ns ( 66.54 % ) " "Info: Total interconnect delay = 6.991 ns ( 66.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "8.873 ns" { CLK fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "8.873 ns" { CLK CLK~out0 fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } { 0.000ns 0.000ns 0.745ns 0.569ns 3.498ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.722ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns - " "Info: - Micro clock to output delay of source is 0.224 ns" {  } { { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns - " "Info: - Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_n8s.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/altsyncram_n8s.tdf" 183 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "8.873 ns" { CLK fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "8.873 ns" { CLK CLK~out0 fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } { 0.000ns 0.000ns 0.745ns 0.569ns 3.498ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.722ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } { 0.000ns 1.642ns 0.777ns 0.570ns 4.002ns } { 0.000ns 0.935ns 0.935ns 0.935ns 0.711ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.852 ns - Longest register memory " "Info: - Longest register to memory delay is 1.852 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ROM256ADDR:inst10\|Aout\[7\] 1 REG LC_X16_Y6_N7 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X16_Y6_N7; Fanout = 2; REG Node = 'ROM256ADDR:inst10\|Aout\[7\]'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "" { ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "ROM256ADDR.v" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ROM256ADDR.v" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.469 ns) + CELL(0.383 ns) 1.852 ns lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7 2 MEM M4K_X17_Y6 8 " "Info: 2: + IC(1.469 ns) + CELL(0.383 ns) = 1.852 ns; Loc. = M4K_X17_Y6; Fanout = 8; MEM Node = 'lpm_rom0:inst11\|altsyncram:altsyncram_component\|altsyncram_n8s:auto_generated\|ram_block1a7~porta_address_reg7'" {  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.852 ns" { ROM256ADDR:inst10|Aout[7] lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "db/altsyncram_n8s.tdf" "" { Text "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/altsyncram_n8s.tdf" 183 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.383 ns ( 20.68 % ) " "Info: Total cell delay = 0.383 ns ( 20.68 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.469 ns ( 79.32 % ) " "Info: Total interconnect delay = 1.469 ns ( 79.32 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "1.852 ns" { ROM256ADDR:inst10|Aout[7] lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "1.852 ns" { ROM256ADDR:inst10|Aout[7] lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } { 0.000ns 1.469ns } { 0.000ns 0.383ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "8.873 ns" { CLK fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "8.873 ns" { CLK CLK~out0 fp_2:inst|Cout fp_2:inst3|Cout lpm_rom0:inst11|altsyncram:altsyncram_component|altsyncram_n8s:auto_generated|ram_block1a7~porta_address_reg7 } { 0.000ns 0.000ns 0.745ns 0.569ns 3.498ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.722ns } } } { "e:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "e:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "ad9851_2007" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/ad9851_2007/db/ad9851_2007.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/ad9851_2007/" "" "10.507 ns" { altpll0:inst6|altpll:altpll_component|_clk0 fp_5:inst7|Cout[2] fp_5:inst8|Cout[2] fp_5:inst9|Cout[2] ROM256ADDR:inst10|Aout[7] } "NODE_NAME" } "" } } { "e:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus51/bin/Technology_Viewer.qrui" "10.507 ns" { altpll0:inst6|altpll: