ad9851_2007.tan.qmsg

计算实用教程adadad9851实用教程

{ "Warning" "WTAN_USE_ENABLE_CLOCK_LATENCY_FOR_PLL" "" "Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled" {  } {  } 0 0 "Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "ALE " "Info: Assuming node \"ALE\" is an undefined clock" {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { -168 -216 -48 -152 "ALE" "" } { -160 146 184 -144 "ALE" "" } { -816 74 104 -800 "ALE" "" } } } } { "e:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "ALE" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "P2\[4\] " "Info: Assuming node \"P2\[4\]\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { 160 -216 -48 176 "P2\[7..0\]" "" } { -40 136 176 -24 "P2\[7\]" "" } { -24 136 176 -8 "P2\[6..4\]" "" } { -400 440 528 -384 "P2\[1\]" "" } } } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "P2\[5\] " "Info: Assuming node \"P2\[5\]\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { 160 -216 -48 176 "P2\[7..0\]" "" } { -40 136 176 -24 "P2\[7\]" "" } { -24 136 176 -8 "P2\[6..4\]" "" } { -400 440 528 -384 "P2\[1\]" "" } } } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "P2\[7\] " "Info: Assuming node \"P2\[7\]\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { 160 -216 -48 176 "P2\[7..0\]" "" } { -40 136 176 -24 "P2\[7\]" "" } { -24 136 176 -8 "P2\[6..4\]" "" } { -400 440 528 -384 "P2\[1\]" "" } } } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "P2\[6\] " "Info: Assuming node \"P2\[6\]\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { 160 -216 -48 176 "P2\[7..0\]" "" } { -40 136 176 -24 "P2\[7\]" "" } { -24 136 176 -8 "P2\[6..4\]" "" } { -400 440 528 -384 "P2\[1\]" "" } } } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0} { "Info" "ITAN_NODE_MAP_TO_SPECIAL_CLK" "WR " "Info: Assuming node \"WR\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." {  } { { "ad9851_2007.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/ad9851_2007/ad9851_2007.bdf" { { -56 -232 -64 -40 "WR" "" } { 112 136 168 128 "WR" "" } { 816 240 288 832 "WR" "" } { 664 216 248 680 "WR" "" } { -648 64 96 -632 "WR" "" } { -632 432 480 -616 "WR" "" } { 24 848 896 40 "WR" "" } } } }  } 0 0 "Assuming node \"%1!s!\" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin." 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}