mytest.hif

本程序功能: DDS文件夹内的程序

HIF003
--
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	altrom.tdf
	{
		altrom [DEVICE_FAMILY,REGISTERINPUTMODE=DEFAULT,FILE,NUMWORDS,AD_WIDTH,WIDTH,USE_LPM_FOR_AHDL_OPERATORS] [memmodes.inc,lpm_decode.inc,lpm_mux.inc,aglobal.inc]
		{
			38 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="E:/myDDS/verilog/pr3.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,Address7,Address6,Address5,Address4,Address3,Address2,Address1,Address0];
			36 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="E:/myDDS/verilog/pr2.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,Address7,Address6,Address5,Address4,Address3,Address2,Address1,Address0];
			34 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="E:/myDDS/verilog/pr.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q7,Q6,Q5,Q4,Q3,Q2,Q1,Q0,Address7,Address6,Address5,Address4,Address3,Address2,Address1,Address0];
			8 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="D:/newvhd/mytest/pr.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7];
			18 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="D:/newvhd/mytest/pr2.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7];
			23 [DEVICE_FAMILY=FLEX10K,REGISTERINPUTMODE=DEFAULT,FILE="D:/newvhd/mytest/pr3.mif",NUMWORDS=256,AD_WIDTH=8,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7];
		}
	}
	phaserom1.v
	{
		phaserom1 [] [lpm_rom.inc]
		{
			41 [] [];
		}
	}
	mainctrl.v
	{
		mainctrl [] []
		{
			46 [] [];
		}
	}
	lpm_add_sub.tdf
	{
		lpm_add_sub [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY,STYLE] [aglobal.inc,altshift.inc,bypassff.inc,look_add.inc,addcore.inc,lpm_add_sub.inc]
		{
			24 [STYLE=NORMAL,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=ADD,LPM_REPRESENTATION=UNSIGNED,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [RESULT7,RESULT6,RESULT5,RESULT4,RESULT3,RESULT2,RESULT1,RESULT0,DATAB0,DATAB1,DATAB2,DATAB3,DATAB4,DATAB5,DATAB6,DATAB7,DATAA0,DATAA1,DATAA2,DATAA3,DATAA4,DATAA5,DATAA6,DATAA7];
			2 [STYLE=NORMAL,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=DEFAULT,LPM_REPRESENTATION=SIGNED,LPM_WIDTH=3,USE_LPM_FOR_AHDL_OPERATORS=OFF] [DATAA0,DATAA1,DATAA2,DATAB0,DATAB1,DATAB2,CIN,RESULT0,RESULT1,RESULT2];
			10 [STYLE=NORMAL,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=YES,LPM_DIRECTION=ADD,LPM_REPRESENTATION=UNSIGNED,LPM_WIDTH=6,USE_LPM_FOR_AHDL_OPERATORS=OFF] [DATAA5,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0,DATAB5,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4,RESULT5];
			13 [STYLE=NORMAL,DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,OPTIMIZE_FOR_SPEED=5,MAXIMIZE_SPEED=5,LPM_PIPELINE=0,ONE_INPUT_IS_CONSTANT=NO,LPM_DIRECTION=ADD,LPM_REPRESENTATION=UNSIGNED,LPM_WIDTH=16,USE_LPM_FOR_AHDL_OPERATORS=OFF] [DATAA15,DATAA14,DATAA13,DATAA12,DATAA11,DATAA10,DATAA9,DATAA8,DATAA7,DATAA6,DATAA5,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0,DATAB15,DATAB14,DATAB13,DATAB12,DATAB11,DATAB10,DATAB9,DATAB8,DATAB7,DATAB6,DATAB5,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4,RESULT5,RESULT6,RESULT7,RESULT8,RESULT9,RESULT10,RESULT11,RESULT12,RESULT13,RESULT14,RESULT15];
			27 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=4,LPM_REPRESENTATION=UNSIGNED,LPM_DIRECTION=ADD,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K,STYLE=NORMAL] [DATAA3,DATAA2,DATAA1,DATAA0,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3];
			30 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=5,LPM_REPRESENTATION=UNSIGNED,LPM_DIRECTION=ADD,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K,STYLE=NORMAL] [DATAA4,DATAA3,DATAA2,DATAA1,DATAA0,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4];
		}
	}
	addcore.tdf
	{
		addcore [USE_LPM_FOR_AHDL_OPERATORS,width,CONSTANT_CIN,CARRY_CHAIN,CARRY_CHAIN_LENGTH,DEVICE_FAMILY] [aglobal.inc,addcore.inc]
		{
			25 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=1,width=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result7,result6,result5,result4,result3,result2,result1,result0,dataa7,dataa6,dataa5,dataa4,dataa3,dataa2,dataa1,dataa0,datab7,datab6,datab5,datab4,datab3,datab2,datab1,datab0,cin];
			3 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=0,width=3,USE_LPM_FOR_AHDL_OPERATORS=OFF] [cin,datab0,datab1,datab2,dataa0,dataa1,dataa2,result0,result1,result2];
			14 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=1,width=16,USE_LPM_FOR_AHDL_OPERATORS=OFF] [cin,datab0,datab1,datab2,datab3,datab4,datab5,datab6,datab7,datab8,datab9,datab10,datab11,datab12,datab13,datab14,datab15,dataa0,dataa1,dataa2,dataa3,dataa4,dataa5,dataa6,dataa7,dataa8,dataa9,dataa10,dataa11,dataa12,dataa13,dataa14,dataa15,result0,result1,result2,result3,result4,result5,result6,result7,result8,result9,result10,result11,result12,result13,result14,result15];
			11 [DEVICE_FAMILY=FLEX10K,CARRY_CHAIN_LENGTH=32,CARRY_CHAIN=IGNORE,CONSTANT_CIN=1,width=6,USE_LPM_FOR_AHDL_OPERATORS=OFF] [cin,datab0,datab1,datab2,datab3,datab4,datab5,dataa0,dataa1,dataa2,dataa3,dataa4,dataa5,result0,result1,result2,result3,result4,result5];
			28 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=4,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K] [cin,datab0,datab1,datab2,datab3,dataa0,dataa1,dataa2,dataa3,result0,result1,result2,result3];
			31 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=5,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10K] [cin,datab0,datab1,datab2,datab3,datab4,dataa0,dataa1,dataa2,dataa3,dataa4,result0,result1,result2,result3,result4];
		}
	}
	altshift.tdf
	{
		altshift [USE_LPM_FOR_AHDL_OPERATORS,WIDTH=4,DEPTH=0] []
		{
			26 [DEPTH=0,WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [result7,result6,result5,result4,result3,result2,result1,result0,data7,data6,data5,data4,data3,data2,data1,data0];
			4 [DEPTH=0,WIDTH=3,USE_LPM_FOR_AHDL_OPERATORS=OFF] [data0,data1,data2,result0,result1,result2];
			5 [DEPTH=0,WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [data0,result0];
			15 [DEPTH=0,WIDTH=16,USE_LPM_FOR_AHDL_OPERATORS=OFF] [data0,data1,data2,data3,data4,data5,data6,data7,data8,data9,data10,data11,data12,data13,data14,data15,result0,result1,result2,result3,result4,result5,result6,result7,result8,result9,result10,result11,result12,result13,result14,result15];
			12 [DEPTH=0,WIDTH=6,USE_LPM_FOR_AHDL_OPERATORS=OFF] [data0,data1,data2,data3,data4,data5,result0,result1,result2,result3,result4,result5];
			29 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=4,DEPTH=0] [data0,data1,data2,data3,result0,result1,result2,result3];
			32 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=5,DEPTH=0] [data0,data1,data2,data3,data4,result0,result1,result2,result3,result4];
		}
	}
	lpm_rom.tdf
	{
		lpm_rom [DEVICE_FAMILY,LPM_FILE,LPM_OUTDATA=REGISTERED,LPM_ADDRESS_CONTROL=REGISTERED,LPM_NUMWORDS,LPM_WIDTHAD,LPM_WIDTH,USE_LPM_FOR_AHDL_OPERATORS] [altrom.inc,aglobal.inc]
		{
			37 [DEVICE_FAMILY=FLEX10K,LPM_FILE="E:/myDDS/verilog/pr3.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [q0,q1,q2,q3,q4,q5,q6,q7,address0,address1,address2,address3,address4,address5,address6,address7];
			35 [DEVICE_FAMILY=FLEX10K,LPM_FILE="E:/myDDS/verilog/pr2.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [q0,q1,q2,q3,q4,q5,q6,q7,address0,address1,address2,address3,address4,address5,address6,address7];
			1 [DEVICE_FAMILY=FLEX10K,LPM_FILE="E:/myDDS/verilog/pr.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [q0,q1,q2,q3,q4,q5,q6,q7,address0,address1,address2,address3,address4,address5,address6,address7];
			7 [DEVICE_FAMILY=FLEX10K,LPM_FILE="D:/newvhd/mytest/pr.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [address7,address6,address5,address4,address3,address2,address1,address0,q7,q6,q5,q4,q3,q2,q1,q0];
			17 [DEVICE_FAMILY=FLEX10K,LPM_FILE="D:/newvhd/mytest/pr2.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [address7,address6,address5,address4,address3,address2,address1,address0,q7,q6,q5,q4,q3,q2,q1,q0];
			22 [DEVICE_FAMILY=FLEX10K,LPM_FILE="D:/newvhd/mytest/pr3.mif",LPM_OUTDATA=UNREGISTERED,LPM_ADDRESS_CONTROL=UNREGISTERED,LPM_WIDTHAD=8,LPM_WIDTH=8,USE_LPM_FOR_AHDL_OPERATORS=OFF] [address7,address6,address5,address4,address3,address2,address1,address0,q7,q6,q5,q4,q3,q2,q1,q0];
		}
	}
	cmdctrl.v
	{
		cmdctrl [] []
		{
			45 [] [];
		}
	}
	phaserom2.v
	{
		phaserom2 [] [lpm_rom.inc]
		{
			42 [] [];
		}
	}
	modsel.v
	{
		modsel [] []
		{
			43 [] [];
		}
	}
	phaserom3.v
	{
		phaserom3 [] [lpm_rom.inc]
		{
			44 [] [];
		}
	}
	mytest.gdf
	{
		mytest [] []
		{
			0 [] [];
		}
	}
}
TREE
{
	mytest::(0,0):(0): mytest.gdf
	{
		mainctrl:46:(0,0):(45): mainctrl.v
		{
			lpm_add_sub:27:(26,0):(119): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:29:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				addcore:28:(212,4):(46,adder): addcore.tdf;
			}
			lpm_add_sub:13:(31,0):(118): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(183,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(175,carry_ext_latency_ffs): altshift.tdf;
				altshift:15:(222,2):(137,result_ext_latency_ffs): altshift.tdf;
				addcore:14:(212,4):(82,adder): addcore.tdf;
			}
			lpm_add_sub:30:(16,0):(117): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(95,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(87,carry_ext_latency_ffs): altshift.tdf;
				altshift:32:(222,2):(71,result_ext_latency_ffs): altshift.tdf;
				addcore:31:(212,4):(49,adder): addcore.tdf;
			}
		}
		cmdctrl:45:(0,0):(44): cmdctrl.v;
		phaserom3:44:(0,0):(37): phaserom3.v
		{
			lpm_rom:37:(47,0):(25,lpm_rom_component): lpm_rom.tdf
			{
				altrom:38:(63,3):(46,srom): altrom.tdf;
			}
		}
		modsel:43:(0,0):(35): modsel.v;
		phaserom2:42:(0,0):(34): phaserom2.v
		{
			lpm_rom:35:(47,0):(25,lpm_rom_component): lpm_rom.tdf
			{
				altrom:36:(63,3):(46,srom): altrom.tdf;
			}
		}
		phaserom1:41:(0,0):(20): phaserom1.v
		{
			lpm_rom:1:(47,0):(25,lpm_rom_component): lpm_rom.tdf
			{
				altrom:34:(63,3):(46,srom): altrom.tdf;
			}
		}
		kbscan::(0,0):(2): kbscan.vhd
		{
			lpm_add_sub:2:(20,8):(44): lpm_add_sub.tdf
			{
				altshift:5:(226,2):(79,oflow_ext_latency_ffs): altshift.tdf;
				altshift:5:(224,2):(71,carry_ext_latency_ffs): altshift.tdf;
				altshift:4:(222,2):(59,result_ext_latency_ffs): altshift.tdf;
				addcore:3:(212,4):(43,adder): addcore.tdf;
			}
		}
	}
}