msp430x42x0_ta_22.s43

MSP430F42x0.zip c语言 例程打包

;******************************************************************************
;   MSP430x42x0 Demo - Timer_A, Output 40kHz Square Wave, Up Mode, SMCLK DCO
;
;   Description: Outputs ~40.3khz square wave on P1.2 using Timer_A. Timer_A
;   is configured for up mode. CCR0 defines the period and CCR1 the duty cycle
;   which is set at 50%. CCR1 is output on P1.2. The 40khz square wave is
;   generated by hardware and does not require any CPU resources.
;   ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
;   //* An external watch crystal between XIN & XOUT is required for ACLK *//	
;
;
;                MSP430F4270
;             -----------------
;         /|\|              XIN|-
;          | |                 | 32kHz
;          --|RST          XOUT|-
;            |                 |
;            |         P1.2/TA1|--> ~ 40.3kHz
;
;  L. Westlund / S. Karthikeyan
;  Texas Instruments Inc.
;  June 2005
;  Built with IAR Embedded Workbench Version: 3.30A
;******************************************************************************
#include  <msp430x42x0.h>
;------------------------------------------------------------------------------
            ORG     08000h                  ; Program Start
;------------------------------------------------------------------------------
RESET       mov.w   #300h,SP                ; Initialize stackpointer
SetupWDT    mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupFLL    bis.b   #XCAP14PF,&FLL_CTL0     ; Configure load caps
SetupTA     mov.w   #TASSEL1+TACLR,&TACTL   ; SMCLK, Clear TAR
SetupC0     mov.w   #26-1,&CCR0             ; PWM Period
SetupC1     mov.w   #OUTMOD2+OUTMOD1+OUTMOD0,&CCTL1 ; CCR1 Reset\Set
            mov.w   #13,&CCR1               ; CCR1 PWM Duty Cycle	
SetupP1     bis.b   #004h,&P1DIR            ; P1.2 output
            bis.b   #004h,&P1SEL            ; P1.2/TA1 port function
            bis.w   #MC0,&TACTL             ; Start TA up Mode
                                            ;													
Mainloop    bis.w   #CPUOFF,SR              ; CPU not required
            nop                             ; Required only for debugger
                                            ;
;------------------------------------------------------------------------------
;           Interrupt Vectors
;------------------------------------------------------------------------------
            ORG     0FFFEh                  ; RESET Vector
            DW      RESET                   ;
            END