tft_main_file.c

freescale最新的16位单片机

#include <hidef.h>            /* common defines and macros */
#include "9S12XDP512.h"     /* derivative information */

#include"stdio.h"
#include"termio.h"
#pragma LINK_INFO DERIVATIVE "mc9s12xdp512"


#include <string.h>
#include "PWM_phs.h"

#include "xgate.h"

#include "con_msg_dis.h"  // Disable some warning messages, add by rc574c 10-Jan-2006

/* TFT related file, add by rc574c 10-Jan-2006 */
#include "tft_main_file.h"


#define ROUTE_INTERRUPT(vec_adr, cfdata)                \
  INT_CFADDR= (vec_adr) & 0xF0;                         \
  INT_CFDATA_ARR[((vec_adr) & 0x0F) >> 1]= (cfdata)


#define SOFTWARETRIGGER0_VEC  0x72 /* vector address= 2 * channel id */
#define SOFTWARETRIGGER7_VEC  0x64
#define PTI0_VEC              0x7A /* vector address= 2 * channel id */
#define IC0_VEC               0xEE /* vector address= 2 * channel id */
#define KWP7_VEC              0x8E /* vector address= 2 * channel id */
#define ATD1_VEC              0xD0

#define RAM_PAGE1 0xF8
#define RAM_PAGE2 0xF9 
#define INIT_PPAGE 0xE2 // see *.prm file PAGE_E2_E6 (former 0xF4)
#define LINE_PER_BLOCK 16     //BLOCK_SIZE/NB_PIXELS_PER_LINES
#define PIXEL_PER_BLOCK 3840  //LINE_PER_BLOCK*NB_PIXELS_PER_LINES 

#define INIT_PPAGE_ANIM 0xEC
#define RAM_PAGE_C 0xFC
#define RAM_PAGE_B 0xFB
#define RAM_PAGE_A 0xFA 

#define NUMBER_OF_IMAGE 39

volatile char flag =0;
volatile unsigned char Old_number=0,Max_image=29;
unsigned char runDec; // Add by rc574c, 16-01-2006

//-------------------------------------------------------------------------------------//
// initialize the XGATE vector block and set the XGVBR register to its start address
static void SetupXGATE(void) 
{

  XGVBR = (unsigned int)(void*__far)(XGATE_VectorTable - XGATE_VECTOR_OFFSET);

  /* switch software trigger 0 interrupt to XGATE */
  ROUTE_INTERRUPT(SOFTWARETRIGGER0_VEC, 0x82); /* RQST=1 and PRIO=1 */
  ROUTE_INTERRUPT(PTI0_VEC, 0x81);             /* RQST=1  and PRIO=1 */
  ROUTE_INTERRUPT(IC0_VEC, 0x81);              /* RQST=1  and PRIO=1 */
  ROUTE_INTERRUPT(KWP7_VEC, 0x81);             /* RQST=1  and PRIO=1 */
  ROUTE_INTERRUPT(SOFTWARETRIGGER7_VEC, 0x01); /* RQST=1  and PRIO=1 */
      // RQST=0x80 : By XGATE
      // RQST=0x00 : By CPU12

  /* enable XGATE mode and interrupts */
  //XGMCTL= 0xFBC1; /* XGE | XGFRZ | XGIE */
  XGMCTL = 0xC1C1;
    
PVISU=0x8000  ;   //0= (int)__SEG_START_XGATE_DATAVISU ;// : (offset 0)  dynamic RAM visu pointer 
CBLOC = 0 ;       //: (offset 2) block counter (00 - 01 - 10 - 11)
CLINE = 0 ;       //: (offset 4) line counter in a block of 60 lines
CPSV = 0 ;        //: (offset 6) line counter for vertical synchro duration 
PVISU0=0x8000 ;   //: (offset 8) start address of RAM visu buffer 
REV = 0;		      //10
VSYN_CNT=1;       //12 CPSV2=0;  
CLS_CNT=0;        //14
CURRENT_BLOCK_MAX_LINE=16;  // 4096/240  3840
LAST_BLOCK_MAX_LINE=16;     // 15 last lines of last block; (76800-(16*3840))/240
}

//-------------------------------------------------------------------------------------//
static void PITSetup(void)
{
  PITMUX   = 0;                   /* select micro timer 0 as the source for all channels */
  PITMTLD0 = 39;                  /* use a /40 for micro timer 0 => 1 uS at 40MHz */
  PITLD0   = 192;                 /* 10 mS period at 40MHz */
  PITINTE  = PITINTE_PINTE0_MASK; /* enable interrupts on PIT channel 0 */  
  PITCE    = PITCE_PCE0_MASK;	    /* enable PIT channel 0 */
  PITCFLMT = PITCFLMT_PITFRZ_MASK | PITCFLMT_PITE_MASK; /* enable the PIT timer module, freeze in BDM */  
}

//-------------------------------------------------------------------------------------//
static void Cap1_Init(void)
{

/* ICSYS: SH37=0,SH26=0,SH15=0,SH04=0,TFMOD=0,PACMX=0,BUFEN=0,LATQ=0 */
  ICSYS = 0 ;										      

  TIOS_IOS0 = 0 ;           // Input Capture   
  TSCR2_PR = 0;             /* Set prescaler register according to the selected high speed CPU mode */                       
  TIE_C0I = 1;              /* Enable interrupt */
  TCTL4 |= 2;               /* Enable capture function on falling edge */
  TSCR1_TFFCA = 1;          // Clear all pending int flag
  TSCR1_TFFCA = 0;
  TSCR1_TEN = 1;            // Enable Timer clocks     
}

//-------------------------------------------------------------------------------------//
static void PortSetup(void)
{
	 PORTD = 0x0C;    // PS and SPS set to 1
	 DDRD = 0x7F;	    // Bit 0 for Screen lighting

	 //PORTB = 0x0;     // F0
	 //DDRB = 0x0;		  // FF  

	 PORTA = 0;
	 DDRA = 0xFF;
	 
	 //DDRE_DDRE4 = 1;  // output CLK on PE4
	 //ECLKCTL_NECLK = 0;
}

//-------------------------------------------------------------------------------------//
static void ScreenROM_Init (void){
unsigned int  i,block_counter=0;
unsigned char dest_page[2]={RAM_PAGE1,RAM_PAGE2};
unsigned char pagecounter=0,ppage=INIT_PPAGE; 
unsigned int  counter=0x8000; 
volatile char dummy_for_linker;

  for (i=0;i<NUMBER_OF_BLOCK;i++){
      
      Bank[i].source_addr = counter;  
      Bank[i].source_ppage1 = ppage; 
      Bank[i].dest_rpage = dest_page[i&1];  
      if ((counter+PIXEL_PER_BLOCK)<0xC000) {
        
        Bank[i].length1 = PIXEL_PER_BLOCK;
        Bank[i].length2 = 0;
        counter+=PIXEL_PER_BLOCK;

      } else {
              
        Bank[i].length1 = 0xC000 - counter ;
        Bank[i].length2 = PIXEL_PER_BLOCK- Bank[i].length1;
        ppage ++;  
        counter = 0x8000+Bank[i].length2;  // reinitialize counter to beginning of  next page    
        }
      Bank[i].source_ppage2 = ppage;

  }

      // Last block calculation size  
      Bank[NUMBER_OF_BLOCK].source_addr = counter;  
      Bank[NUMBER_OF_BLOCK].source_ppage1 = ppage; 
      Bank[NUMBER_OF_BLOCK].dest_rpage = dest_page[i&1];  
      Bank[NUMBER_OF_BLOCK].length1 = IMAGE_SIZE-((NUMBER_OF_BLOCK)*PIXEL_PER_BLOCK);;
      Bank[NUMBER_OF_BLOCK].length2 = 0;
      Bank[NUMBER_OF_BLOCK].source_ppage2 = ppage;

  		dummy_for_linker = Screen_Array_IN_ROM[0];
} 

//-------------------------------------------------------------------------------------//
static void AnimROM_Init (void){
unsigned int i,block_counter=0;
unsigned char dest_page[3]={RAM_PAGE_A,RAM_PAGE_B,RAM_PAGE_C};  
unsigned char pagecounter=0,ppage=INIT_PPAGE_ANIM; //0x987
volatile char  dummy_for_linker;
unsigned int image_size[40]={
0x8e7,0x922,0x93c,0x98b,0x9c2,0x987,                   //EC
0x927,0x875,0x6c6,0x400,0x21a,0x4f6,0x777,0x8bd,2430,	 //ED
2481,2528,2441,2408,2333,2297,	                       //EE
2389,2425,2509,2481,2356,1987,1364,649,                //EF
1100,1776,2243,2505, 2564,2585,2474,                   //F0
2370,2316,2305 						                             //F1
} ;

unsigned char oldrpage;
   		Image_Number = 0;
   		
      BankAnim[0].source_addr = 0x8000;//begin with start address 
      BankAnim[0].source_ppage1 = ppage; 
      BankAnim[0].dest_rpage = dest_page[0];  
      BankAnim[0].length1 = image_size[0];
      for (i=1;i<=NUMBER_OF_IMAGE;i++) {
        if (( BankAnim[i-1].source_addr + BankAnim[i-1].length1+ image_size[i])<0xBFFF) {
          BankAnim[i].source_addr = BankAnim[i-1].source_addr + BankAnim[i-1].length1;
          BankAnim[i].source_ppage1 = ppage;
          BankAnim[i].dest_rpage = dest_page[0]; 
          BankAnim[i].length1 = image_size[i]; 
        } else {
          BankAnim[i].source_addr = 0x8000;
          ppage++;
          BankAnim[i].source_ppage1 = ppage; 
          BankAnim[i].dest_rpage = dest_page[0];  
          BankAnim[i].length1 = image_size[i];

        }
        
      }
			
			dummy_for_linker = S12Animation_EC[0];
			dummy_for_linker = S12Animation_ED[0];			
			dummy_for_linker = S12Animation_EE[0];
			dummy_for_linker = S12Animation_EF[0];
			dummy_for_linker = S12Animation_F0[0];
			dummy_for_linker = S12Animation_F1[0];			
			dummy_for_linker = Anim_ref[0];
}
#pragma CODE_SEG __NEAR_SEG NON_BANKED		/* these functions have to be allocated in the non banked area */

//-------------------------------------------------------------------------------------//
void  Decompression(unsigned char Image) {

// Load background
unsigned char oldrpage;
Anim_Bank *bankPtr;

  oldrpage = RPAGE;
  bankPtr = &BankAnim[Image];

  asm {
     LDX  bankPtr
     LDAB dest_rpage_offset2,X		// Load RPAGE
     STAB RPAGE
     
     LDAB source_ppage1_offset2,X // Load PPAGE1
     STAB PPAGE

     LDY  #0x1000		// Y contains 0x1000, destination address

     LDX  source_addr_offset, X 	// X contains source address

///////////////////////////////////////////
// Image is 160x57 pixels	 ; first image is 0A74 compressed bytes  
///////////////////////////////////////////
// First Bank : 
///////////////////////////////////////////
	
loop:
     LDAA 1,X+		 
     CMPA #$0       //FF
     BEQ background_A
  	 STAA  1,Y+
     TFR  Y,D			  // end of block
     CPD  #$1C80		// 1000 + C80 (10+10lines * 160 pix/line)
     DBNE  D, loop  
     BRA  exit     
     
     
background_A:   
     LDAA #$FF
     STAA  1,Y+
     LDAA 1,X+ 	    // counter 
     LDAB #$FF
loop_bgnd:
     STAB  1,Y+
     DBNE  A, loop_bgnd  
 
     TFR  Y,D			  // end of block
     CPD  #$1C80
     BLT loop 
//recopy extra unccompressed onto next bank
		 BEQ exit
		 SUBD #$1C80	  // fill counter in B
		 
		 LDAA RPAGE
		 INCA 
		 STAA RPAGE
		 LDY #$1000
		 LDAA #$FF
trans:		 
		 STAA  1,Y+
		 DBNE B,trans
		 		 
exit:

///////////////////////////////////////////
// Second Bank : 20 lines  
///////////////////////////////////////////
loop2:
     LDAA 1,X+			 
     CMPA #$0       //FF
     BEQ background_B
		 STAA  1,Y+
     TFR  Y,D			  // end of block
     CPD  #$1C80		// 1000 + C80 (10+10lines * 160 pix/line)
     DBNE  D, loop2  
     BRA  exit2     
     
     
background_B:   
     LDAA #$FF
     STAA  1,Y+
     LDAA 1,X+ 	    // counter 
     LDAB #$FF
loop_bgnd2:
     STAB  1,Y+
     DBNE  A, loop_bgnd2  
 
     TFR  Y,D			  // end of block
     CPD  #$1C80
     BLT loop2 
  
//recopy extra unccompressed onto next bank
		 BEQ exit2
		 SUBD #$1C80	  // fill counter in B
		 
		 LDAA RPAGE
		 INCA 
		 STAA RPAGE
		 LDY #$1000
		 LDAA #$FF
		
trans2:		 
		 STAA  1,Y+
		 DBNE B,trans2
		 
exit2:


///////////////////////////////////////////
// Third Bank : 17 lines  
///////////////////////////////////////////
loop3:
     LDAA 1,X+			 
     CMPA #$0       //FF
     BEQ background_C
		 STAA  1,Y+
     TFR  Y,D			  // end of block
     CPD  #$1AA0		// 1000 + AA0 (10+7lines * 160 pix/line)
     DBNE  D, loop3  
     BRA  exit3     
     
     
background_C:    
     LDAA #$FF     
     STAA  1,Y+
     LDAA 1,X+ 	    // counter 
     LDAB #$FF
loop_bgnd3:
     STAB  1,Y+
     DBNE  A, loop_bgnd3  
 
     TFR  Y,D			  // end of block
     CPD  #$1AA0
     BLT loop3 
  

exit3:
  }
   RPAGE = oldrpage;

}

//-------------------------------------------------------------------------------------//
void TFT_Init(void)
{
	unsigned int i,OldMax=0;
	
	SetupXGATE();
//	ScreenROM_Init();
//	AnimROM_Init();
//	Decompression(0); 
//	InitChar();
//	PWM_Init();					
//	Cap1_Init();
//    PortSetup(); // Already initialized in pim.c file of S12X demo project  
}


//-------------------------------------------------------------------------------------//
void S12X_img_up(void)
{
	unsigned int i,OldMax=0;

	//if (!PORTB)
	//{
		if (Image_Number!=Old_number) 
		{	 // change image
		   // PTS_PTS5 = 0;
			if (Image_Number>Max_image) Image_Number=0;
			Decompression(Image_Number);
			Old_number =  Image_Number;
		//	PTS_PTS5 = 1;
		}
	//}
}