pim.c

freescale最新的16位单片机

/******************************************************************************
*
* Freescale Semiconductor Inc.
* (c) Copyright 2004-2005 Freescale Semiconductor, Inc.
* ALL RIGHTS RESERVED.
*
***************************************************************************//*!
*
* @file      pim.c
*
* @author    R89994
* 
* @version   1.0.9.0
* 
* @date      Jul-27-2006
* 
* @brief     set-up GPIO pins, primary and alternate functions
*
*******************************************************************************/

#include "main.h"
#include "pim.h"


void SetupPIM(void)
{
    PORTD   = 0x0C;       // TFT display PS and SPS set to 1
    DDRD    = 0xFF;	      // TFT display Bit 0 for Screen lighting BIT7 - Door Lock 2 EN2

    PORTA   = 0;			    // TFT display

    DDRA    = 0xFF;		    // TFT display
    DDRB    = 0x3F;		    // PortB - Data direction register [PTB7(I)-WINDOW_HALL2, PTB6(I)-WINDOW_HALL1, PTB5(O)-DOOR_MIRROR2_IN2, PTB4(O)-DOOR_MIRROR2_IN1, PTB3(O)-CSB_MC33892, PTB2(O)-FR_A2, PTB1(O)- FR_A1, PTB0(O)-FR_BSEL1]
    DDRC    = 0x00;       // PortCD - Data direction register
    DDRE    = 0xC0;       // PortE - Data direction register
    DDRK    = 0xFB;       // PortK - Data direction register [PTK7(O)-CS MC33580, PTK6(O)-DOOR_MIRROR2_EN, PTK5(O)-DOOR_MIRROR1_CSB, PTK4(O)-DOOR_MIRROR2_D1, PTK3(O)-LIN3_EN, PTK2(I)-DOOR_MIRROR2_FS, PTK1(O)-DOOR_MIRROR1_EN, PTK0(O)-FR]
    DDRT    = 0xE2;				// PortT - Data direction register 
    
    // PullUps in port C, E, K (S12X_EBI ports)
    PUCR    = 0xD4;
    
    
    RDRIV   = 0x00;       // Reduced drive register (for S12X_EBI ports)


    RDRT    = 0x00;      // PortT - Reduced drive register
    PERT    = 0x00;      // PortT - Pull device enable register
    PPST    = 0x00;      // PortT - Polarity select register

    DDRS    = 0xF0;      // PortS - Data direction register [PTS7(O)-CS MSDI, PTS6(O)-PWM MC33879, PP5(O)-FR, PP4(O)-FR, PP3(O)-Switch_S102 TFT_LADC, PP2(I)-Interrupt MC33742, PP1(O)-FR Wake up, PP0(O)-TFT_LSCLK]
    RDRS    = 0x00;      // PortS - Reduced drive register
    PERS    = 0xB0;      // PortS - Pull device enable register
    PPSS    = 0x00;      // PortS - Polarity select register
    WOMS    = 0x00;      // PortS - Wired-Or mode register

    DDRM    = 0xF0;      // PortS - Data direction register
    RDRM    = 0x00;      // PortS - Reduced drive register
    PERM    = 0x00;      // PortS - Pull device enable register
    PPSM    = 0x00;      // PortS - Polarity select register
    WOMM    = 0x00;      // PortS - Wired-Or mode register

    DDRP    = 0xFB;      // PortP - Data direction register [PWM7(O)-PWM MC33879, PWM6(O)-PWM MC33879, PP5(O)-FR, PP4(O)-FR, PP3(O)-Switch_S102 TFT_LADC, PP2(I)-Interrupt MC33742, PP1(O)-FR Wake up, PP0(O)-TFT_LSCLK]
    RDRP    = 0x00;      // PortP - Reduced drive register [Full drive strength]
    PERP    = 0xFB;      // PortP - Pull device enable register
    PPSP    = 0x00;      // PortP - Polarity select register
    PIEP    = 0x00;      // PortP - Interrupt enable register
    PIFP    = 0x00;      // PortP - Interrupt flag enable register

    /* Configure PH5 as pull-up input (MC33889 an MC33972 INTB pin) as well */ 
    DDRH    = 0x86;      // PortH - Data direction register [PH7(O)-RS232 TXD5, PH6(I)-RS232 RXD5, PH5(I)-Interrupt(MSDI1, MSDI2), PH4(I)-Interrupt MC33889, PH3(I)-Interrupt (MC33580 FSB, DOOR_LOCK1 FS, DOOR_LOCK2 FS), SCLK(O)-SPI, MOSI(O)-SPI, MISO(I)-SPI]
    RDRH    = 0x00;      // PortH - Reduced drive register [Full drive strength]
    PERH    = 0xA6;      // PortH - Pull device enable register
    PPSH    = 0x00;      // PortH - Polarity select register
    PIEH    = 0x00;      // PortH - Interrupt enable register
    PIFH    = 0x00;      // PortH - Interrupt flag enable register
    
    // PortJ - Data direction register [PJ7(O)-Display clock, PJ6(O)-Display data, PJ5(O)-FR CSx_sel, PJ4(O)-CAN3_en, PJ3(none) - none, PJ2(I)-WakeUp time, TXD2(O)-LIN3, RXD2(I)-LIN3]
    DDRJ_DDRJ1  = 1;
    DDRJ_DDRJ4  = 1;
    DDRJ_DDRJ5  = 1;
    DDRJ_DDRJ2  = 1;
    RDRJ        = 0x00;  // PortJ - Reduced drive register [Full drive strength]
    PERJ_PERJ1  = 1;
    PERJ_PERJ4  = 1;
    PERJ_PERJ5  = 1;
    PPSJ        = 0x37;

    PIEJ    = 0x00;      // PortJ - Interrupt enable register [disable interrupt PJ2 - Wake up time measurement]
    PIFJ    = 0x00;      // PortJ - Interrupt flag enable register - disabled


    // pins PAD[23:16] 
    // PortAD1 - Data direction register 0 [PAD23(O)-CS MSDI2, PAD22(O)-CS 33742, PAD21(O)-LIN2, PAD20(O)-Door lock, PAD19(I)-Door Mirror, PAD18(O)-COSS, PAD17(I)-TFT, PAD16(I)-TFT]
    DDR0AD1_DDR0AD118   = 1;
    DDR0AD1_DDR0AD120   = 1;
    DDR0AD1_DDR0AD121   = 1;
    DDR0AD1_DDR0AD122   = 1;
    DDR0AD1_DDR0AD123   = 1;
    PER0AD1_PER0AD118   = 1;
    PER0AD1_PER0AD120   = 1;
    PER0AD1_PER0AD121   = 1;
    PER0AD1_PER0AD122   = 1;
    PER0AD1_PER0AD123   = 1;

    // pins PAD[15:08] 
    // PortAD1 - Data direction register 1 [PAD15(I)-TFT, PAD14(I)-TFT, PAD13(O)- CS COSS, PAD12(I)-Mirror2, PAD11(I)-Door Lock2, PAD10(O)-Window rel2, PAD9(O)-RSTB 33892, PAD8(O)-Door lock1]
    DDR1AD1_DDR1AD18    = 1;
    DDR1AD1_DDR1AD19    = 1;
    DDR1AD1_DDR1AD110   = 1;
    DDR1AD1_DDR1AD113   = 1;
    // PortAD1 - Reduced drive register 1
    // PortAD1 - Pull up enable register 1
    PER1AD1_PER1AD18    = 1;
    PER1AD1_PER1AD19    = 1;
    PER1AD1_PER1AD110   = 1;
    PER1AD1_PER1AD113   = 1;

    IRQCR   = 0x00;     // Interrupt by IRQ pin is not activated
	  MODRR   = 0x21;	    // Routing SPI1 to PH0, PH1, PH2, PH3 and msCAN0 to PM2 and PM3 

    // first value of ports
    PT0AD1  = 0xC0;     // PortAD1 - data register 0 [PAD23 (CS MSDI2, U405) = 1, PAD22 (CS 33742, U202) = 1]
    PT1AD1  = 0x20;     // PortAD0 - data register 1 [PAD13 (CS 33879, U403) = 1]
    PTS     = 0xA0;     // PortS [PTS7 (CS MSDI1, U404) = 1, PTS5 (CS MC33889, U201) = 1, PTS6 pokusne taky]
    PORTK   = 0xA0;     // PortK - [PTK7 (CS MC33580, U402) = 1, PTK5 (DOOR_MIRROR1_CSB, U605) = 1]

    /* MC33889 and MC33742 SBC chip select init */
	CSB_U202        = 1;
	CSB_MC33742_DDR = 1;
	CSB_U201        = 1;
	CSB_MC33889_DDR = 1;
}