📄 dm642main.asm
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;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.32 *
;* Date/Time created: Tue Apr 03 20:55:50 2007 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C64xx *
;* Optimization : Disabled *
;* Optimizing for : Compile time, Ease of Development *
;* Based on options: no -o, no -ms *
;* Endian : Little *
;* Interrupt Thrshld : Disabled *
;* Memory Model : Small *
;* Calls to RTS : Near *
;* Pipelining : Disabled *
;* Memory Aliases : Presume are aliases (pessimistic) *
;* Debug Info : COFF Debug *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
.file "dm642main.c"
.sect ".cinit:c"
.align 8
.field (CIR - $) - 8, 32
.field _id_InBuffA+0,32
.field -1,32 ; _id_InBuffA @ 0
.sect ".text"
.global _id_InBuffA
_id_InBuffA: .usect ".bss:c",4,4
.sym _id_InBuffA,_id_InBuffA, 14, 2, 32
.sect ".cinit:c"
.align 4
.field -1,32 ; _id_OutBuffA @ 0
.sect ".text"
.global _id_OutBuffA
_id_OutBuffA: .usect ".bss:c",4,4
.sym _id_OutBuffA,_id_OutBuffA, 14, 2, 32
.sect ".cinit:c"
.align 4
.field -1,32 ; _id_InBuffA1 @ 0
.sect ".text"
.global _id_InBuffA1
_id_InBuffA1: .usect ".bss:c",4,4
.sym _id_InBuffA1,_id_InBuffA1, 14, 2, 32
.sect ".cinit:c"
.align 4
.field -1,32 ; _id_OutBuffA1 @ 0
.sect ".text"
.global _id_OutBuffA1
_id_OutBuffA1: .usect ".bss:c",4,4
.sym _id_OutBuffA1,_id_OutBuffA1, 14, 2, 32
.global _ColumnA
.bss _ColumnA,320,8
.sym _ColumnA,_ColumnA, 60, 2, 2560,, 320
.global _ColumnB
.bss _ColumnB,320,8
.sym _ColumnB,_ColumnB, 60, 2, 2560,, 320
.global _ColumnC
.bss _ColumnC,320,8
.sym _ColumnC,_ColumnC, 60, 2, 2560,, 320
.global _ColumnOUT
.bss _ColumnOUT,320,8
.sym _ColumnOUT,_ColumnOUT, 60, 2, 2560,, 320
.global _ColumnP
.bss _ColumnP,320,8
.sym _ColumnP,_ColumnP, 60, 2, 2560,, 320
.global _ColumnA1
.bss _ColumnA1,320,8
.sym _ColumnA1,_ColumnA1, 60, 2, 2560,, 320
.global _ColumnB1
.bss _ColumnB1,320,8
.sym _ColumnB1,_ColumnB1, 60, 2, 2560,, 320
.global _ColumnC1
.bss _ColumnC1,320,8
.sym _ColumnC1,_ColumnC1, 60, 2, 2560,, 320
.global _ColumnOUT1
.bss _ColumnOUT1,320,8
.sym _ColumnOUT1,_ColumnOUT1, 60, 2, 2560,, 320
.global _ColumnP1
.bss _ColumnP1,320,8
.sym _ColumnP1,_ColumnP1, 60, 2, 2560,, 320
.global _src
_src: .usect ".external",76800,8
.sym _src,_src, 60, 2, 614400,, 76800
.global _dst
_dst: .usect ".external",76800,8
.sym _dst,_dst, 60, 2, 614400,, 76800
.global _comp
_comp: .usect ".external",76800,8
.sym _comp,_comp, 60, 2, 614400,, 76800
.sect ".cinit"
.align 8
.field IR_1,32
.field _Seeddm642ConfigA+0,32
.field 335992,32 ; _Seeddm642ConfigA._gblctl @ 0
.field -45,32 ; _Seeddm642ConfigA._cectl0 @ 32
.field 1940033025,32 ; _Seeddm642ConfigA._cectl1 @ 64
.field 581077538,32 ; _Seeddm642ConfigA._cectl2 @ 96
.field 581077570,32 ; _Seeddm642ConfigA._cectl3 @ 128
.field 1460752384,32 ; _Seeddm642ConfigA._sdctl @ 160
.field 2075,32 ; _Seeddm642ConfigA._sdtim @ 192
.field 2076493,32 ; _Seeddm642ConfigA._sdext @ 224
.field 2,32 ; _Seeddm642ConfigA._cesec0 @ 256
.field 2,32 ; _Seeddm642ConfigA._cesec1 @ 288
.field 2,32 ; _Seeddm642ConfigA._cesec2 @ 320
.field 115,32 ; _Seeddm642ConfigA._cesec3 @ 352
IR_1: .set 48
.sect ".text"
.global _Seeddm642ConfigA
.bss _Seeddm642ConfigA,48,4
.sym _Seeddm642ConfigA,_Seeddm642ConfigA, 8, 2, 384, $$fake5
; d:\ti\c6000\cgtools\bin\acp6x.exe -@C:\DOCUME~1\rado\LOCALS~1\Temp\TI1876_4
.sect ".text"
.file "D:/ti/myprojects/SEEDVPM642_meanfilter_3/include/csl.h"
.sym _CSL_init,_CSL_init, 32, 3, 0
.func 117
;******************************************************************************
;* FUNCTION NAME: _CSL_init *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
;* A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
;* B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
;* A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
;* B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Local Frame Size : 0 Args + 0 Auto + 4 Save = 4 byte *
;******************************************************************************
_CSL_init:
;** --------------------------------------------------------------------------*
.line 1
STW .D2T2 B3,*SP--(8) ; |117|
NOP 2
.line 26
MVKL .S2 _CSLDM642_LIB_,B4 ; |142|
MVKH .S2 _CSLDM642_LIB_,B4 ; |142|
CALL .S2 B4 ; |142|
ADDKPC .S2 RL0,B3,4 ; |142|
RL0: ; CALL OCCURS ; |142|
.line 44
MVKL .S1 __CSL_init,A3 ; |160|
MVKH .S1 __CSL_init,A3 ; |160|
MVK .D1 0xffffffff,A4 ; |160|
CALL .S2X A3 ; |160|
ADDKPC .S2 RL1,B3,4 ; |160|
RL1: ; CALL OCCURS ; |160|
.line 45
LDW .D2T2 *++SP(8),B3 ; |161|
NOP 4
RETNOP .S2 B3,5 ; |161|
; BRANCH OCCURS ; |161|
.endfunc 161,000080000h,8
.sect ".text"
.global _main
.file "dm642main.c"
.sym _main,_main, 32, 2, 0
.func 151
;******************************************************************************
;* FUNCTION NAME: _main *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23,A24, *
;* A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19,B20, *
;* B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,DP,SP,A16,A17,A18,A19,A20,A21,A22,A23, *
;* A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19, *
;* B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Local Frame Size : 16 Args + 24 Auto + 4 Save = 44 byte *
;******************************************************************************
_main:
;** --------------------------------------------------------------------------*
.line 2
.sym _i,20, 4, 1, 32
.sym _j,24, 4, 1, 32
.sym _HALFHEIGHT,28, 4, 1, 32
.sym _start,32, 14, 1, 32
.sym _overhead,36, 14, 1, 32
.sym _elapsed,40, 14, 1, 32
STW .D2T2 B3,*SP--(48) ; |152|
NOP 2
.line 13
CALL .S1 _CSL_init ; |163|
ADDKPC .S2 RL2,B3,4 ; |163|
RL2: ; CALL OCCURS ; |163|
.line 17
MVKL .S1 _EMIFA_config,A3 ; |167|
MVKH .S1 _EMIFA_config,A3 ; |167|
MVK .S2 (_Seeddm642ConfigA-$bss),B4 ; |167|
CALL .S2X A3 ; |167|
ADD .D2 DP,B4,B4 ; |167|
ADDKPC .S2 RL3,B3,2 ; |167|
MV .D1X B4,A4 ; |167|
RL3: ; CALL OCCURS ; |167|
.line 21
MVKL .S1 _CACHE_setL2Mode,A3 ; |171|
MVKH .S1 _CACHE_setL2Mode,A3 ; |171|
ZERO .D1 A4 ; |171|
CALL .S2X A3 ; |171|
ADDKPC .S2 RL4,B3,4 ; |171|
RL4: ; CALL OCCURS ; |171|
.line 23
MVKL .S2 _DAT_open,B5 ; |173|
MVKH .S2 _DAT_open,B5 ; |173|
CALL .S2 B5 ; |173|
ADDKPC .S2 RL5,B3,1 ; |173|
ZERO .D1 A4 ; |173|
MVK .D2 0x1,B4 ; |173|
ZERO .S1 A6 ; |173|
RL5: ; CALL OCCURS ; |173|
.line 26
CALL .S1 _clock ; |176|
ADDKPC .S2 RL6,B3,4 ; |176|
RL6: ; CALL OCCURS ; |176|
STW .D2T1 A4,*+SP(32) ; |176|
NOP 2
.line 27
CALL .S1 _clock ; |177|
ADDKPC .S2 RL7,B3,4 ; |177|
RL7: ; CALL OCCURS ; |177|
LDW .D2T2 *+SP(32),B4 ; |177|
NOP 4
SUB .S2X A4,B4,B4 ; |177|
STW .D2T2 B4,*+SP(36) ; |177|
NOP 2
.line 28
MVK .S2 120,B4 ; |178|
STW .D2T2 B4,*+SP(28) ; |178|
NOP 2
.line 30
ZERO .D2 B4 ; |180|
|| MVKL .S1 0x12bff,A3 ; |180|
MVKH .S1 0x12bff,A3 ; |180|
CMPLT .L1X B4,A3,A0 ; |180|
[!A0] BNOP .S1 L2,3 ; |180|
MVK .S2 255,B7 ; |182|
STW .D2T2 B4,*+SP(20) ; |180|
|| MVK .S2 9,B9 ; |183|
|| MVK .L2 3,B16 ; |184|
; BRANCH OCCURS ; |180|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;* Disqualified loop: Software pipelining disabled
;*----------------------------------------------------------------------------*
L1:
.line 32
MV .D2 B4,B5
SHR .S2 B5,7,B4 ; |182|
|| MV .D2 B4,B6
SHRU .S2 B4,24,B4 ; |182|
ADD .D2 B4,B5,B4 ; |182|
MVKL .S2 _src,B4 ; |182|
|| ANDN .D2 B4,B7,B8 ; |182|
SUB .D2 B5,B8,B5 ; |182|
|| MVKH .S2 _src,B4 ; |182|
STB .D2T2 B5,*+B6[B4] ; |182|
NOP 2
.line 33
LDW .D2T2 *+SP(20),B5 ; |183|
NOP 2
MVKL .S2 _dst,B4 ; |183|
MVKH .S2 _dst,B4 ; |183|
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