dm642main.c

基于VPM642开发板的中值滤波程序

/********************************************************************/
/*  Copyright 2004 by SEED Incorporated.							*/
/*  All rights reserved. Property of SEED Incorporated.				*/
/*  Restricted rights to use, duplicate or disclose this code are	*/
/*  granted through contract.									    */
/*  															    */
/********************************************************************/
#include <stdio.h>
#include <std.h>
#include <csl.h>
#include <csl_emifa.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include <time.h>
#include <csl_cache.h>
#include <csl_dat.h>

#include "seeddm642.h"

Uint32  id_InBuffA  = DAT_XFRID_WAITALL,
        id_OutBuffA = DAT_XFRID_WAITALL,
        id_InBuffA1  = DAT_XFRID_WAITALL,
        id_OutBuffA1 = DAT_XFRID_WAITALL;
        
#define WIDTH   320
#define HEIGHT  240

//#pragma DATA_ALIGN(InBuffA, L1D_LINESIZE)
//#pragma DATA_ALIGN(InBuffB, L1D_LINESIZE)
unsigned char ColumnA [WIDTH];
unsigned char ColumnB [WIDTH];
unsigned char ColumnC [WIDTH];
unsigned char ColumnOUT [WIDTH];
unsigned char ColumnP [WIDTH];  //used for test

unsigned char ColumnA1 [WIDTH];
unsigned char ColumnB1 [WIDTH];
unsigned char ColumnC1 [WIDTH];
unsigned char ColumnOUT1 [WIDTH];
unsigned char ColumnP1 [WIDTH]; 

/* ------------------------------------------------------------------------ */
/*  Source data to process in external memory                               */
/*  Destination for processed data in external memory                       */
/* ------------------------------------------------------------------------ */
#pragma DATA_SECTION(src,".external")
#pragma DATA_SECTION(dst,".external")
#pragma DATA_SECTION(comp,".external")
unsigned char src[WIDTH*HEIGHT];
unsigned char dst[WIDTH*HEIGHT];
unsigned char comp[WIDTH*HEIGHT];

/*SEEDDM642的emifa的设置结构*/
EMIFA_Config Seeddm642ConfigA ={
	   EMIFA_FMKS(GBLCTL, EK2RATE, HALFCLK)    |
        EMIFA_FMKS(GBLCTL, EK2HZ, CLK)          |
        EMIFA_FMKS(GBLCTL, EK2EN, ENABLE)       |
        EMIFA_FMKS(GBLCTL, BRMODE, MRSTATUS)    |
        EMIFA_FMKS(GBLCTL, NOHOLD, DISABLE)     |
        EMIFA_FMKS(GBLCTL, EK1HZ, HIGHZ)        |
        EMIFA_FMKS(GBLCTL, EK1EN, ENABLE)       |
        EMIFA_FMKS(GBLCTL, CLK4EN, ENABLE)      |
        EMIFA_FMKS(GBLCTL, CLK6EN, ENABLE),
        
        EMIFA_FMKS(CECTL, WRSETUP, DEFAULT)    |
        EMIFA_FMKS(CECTL, WRSTRB, DEFAULT)     |
        EMIFA_FMKS(CECTL, WRHLD, DEFAULT)      |
        EMIFA_FMKS(CECTL, RDSETUP, DEFAULT)    |
        EMIFA_FMKS(CECTL, TA, DEFAULT)         |
        EMIFA_FMKS(CECTL, RDSTRB, DEFAULT)     |
        EMIFA_FMKS(CECTL, MTYPE, SDRAM64)      |
        EMIFA_FMKS(CECTL, RDHLD, DEFAULT),
        
        EMIFA_FMKS(CECTL, WRSETUP, OF(7))      |
        EMIFA_FMKS(CECTL, WRSTRB, OF(14))      |
        EMIFA_FMKS(CECTL, WRHLD, OF(2))        |
        EMIFA_FMKS(CECTL, RDSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, TA, OF(2))           |
        EMIFA_FMKS(CECTL, RDSTRB, OF(14))      |
        EMIFA_FMKS(CECTL, MTYPE, ASYNC8)       |
        EMIFA_FMKS(CECTL, RDHLD, OF(1)),
        
        EMIFA_FMKS(CECTL, WRSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, WRSTRB, OF(10))      |
        EMIFA_FMKS(CECTL, WRHLD, OF(2))        |
        EMIFA_FMKS(CECTL, RDSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, TA, OF(2))           |
        EMIFA_FMKS(CECTL, RDSTRB, OF(10))      |
        EMIFA_FMKS(CECTL, MTYPE, ASYNC32)      |
        EMIFA_FMKS(CECTL, RDHLD, OF(2)),

        EMIFA_FMKS(CECTL, WRSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, WRSTRB, OF(10))      |
        EMIFA_FMKS(CECTL, WRHLD, OF(2))        |
        EMIFA_FMKS(CECTL, RDSETUP, OF(2))      |
        EMIFA_FMKS(CECTL, TA, OF(2))           |
        EMIFA_FMKS(CECTL, RDSTRB, OF(10))      |
        EMIFA_FMKS(CECTL, MTYPE, SYNC32)       |
        EMIFA_FMKS(CECTL, RDHLD, OF(2)),
        
        EMIFA_FMKS(SDCTL, SDBSZ, 4BANKS)       |
        EMIFA_FMKS(SDCTL, SDRSZ, 12ROW)        |
        EMIFA_FMKS(SDCTL, SDCSZ, 8COL)         |
        EMIFA_FMKS(SDCTL, RFEN, ENABLE)        |
        EMIFA_FMKS(SDCTL, INIT, YES)           |
        EMIFA_FMKS(SDCTL, TRCD, OF(1))         |
        EMIFA_FMKS(SDCTL, TRP, OF(1))          |
        EMIFA_FMKS(SDCTL, TRC, OF(5))          |
        EMIFA_FMKS(SDCTL, SLFRFR, DISABLE),
        
        EMIFA_FMKS(SDTIM, XRFR, OF(0))         |
        EMIFA_FMKS(SDTIM, PERIOD, OF(2075)),
        
        EMIFA_FMKS(SDEXT, WR2RD, OF(1))        |
        EMIFA_FMKS(SDEXT, WR2DEAC, OF(3))      |
        EMIFA_FMKS(SDEXT, WR2WR, OF(1))        |
        EMIFA_FMKS(SDEXT, R2WDQM, OF(3))       |
        EMIFA_FMKS(SDEXT, RD2WR, OF(2))        |
        EMIFA_FMKS(SDEXT, RD2DEAC, OF(3))      |
        EMIFA_FMKS(SDEXT, RD2RD, OF(1))        |
        EMIFA_FMKS(SDEXT, THZP, OF(2))         |
        EMIFA_FMKS(SDEXT, TWR, OF(2))          |
        EMIFA_FMKS(SDEXT, TRRD, OF(0))         |
        EMIFA_FMKS(SDEXT, TRAS, OF(6))         |
        EMIFA_FMKS(SDEXT, TCL, OF(1)),           
        
        EMIFA_CESEC_DEFAULT,

        EMIFA_CESEC_DEFAULT,

        EMIFA_CESEC_DEFAULT,

        EMIFA_FMKS(CESEC, SNCCLK, ECLKOUT2)    |
        EMIFA_FMKS(CESEC, RENEN, READ)         |
        EMIFA_FMKS(CESEC, CEEXT, ACTIVE)       |
        EMIFA_FMKS(CESEC, SYNCWL, 0CYCLE)      |
        EMIFA_FMKS(CESEC, SYNCRL, 3CYCLE)
};

void IMG_median_3x3
(
   const unsigned char *restrict i_data1, /* Input image     */
   const unsigned char *restrict i_data2, /* Input image     */
   const unsigned char *restrict i_data3, /* Input image     */
   int n,                                 /* Length of input */
   unsigned char       *restrict o_data   /* Output image    */
); 



void main()
{
    int i,j,HALFHEIGHT;
    clock_t start;
	clock_t overhead;
	clock_t elapsed;
	
    /* Return lower 8 bits of register */
/*-------------------------------------------------------*/
/* perform all initializations                           */
/*-------------------------------------------------------*/
	//Initialise CSL，初始化CSL库*/
	CSL_init();
/*----------------------------------------------------------*/
	/*EMIFA的初始化，将CE0设为SDRAM空间，CE1设为异步空间
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&Seeddm642ConfigA);
/*----------------------------------------------------------*/
	
    
    CACHE_setL2Mode(CACHE_0KCACHE);
    
    DAT_open(DAT_CHAANY, DAT_PRI_HIGH, 0);	 
    
	/* Calculate the overhead from calling clock() */
	start = clock();
	overhead = clock()-start;
	HALFHEIGHT=HEIGHT/2;
	/* Calculate the elapsed time */
	for (i=0; i<WIDTH*HEIGHT-1; i++)
    {
       src[i] = i % 256;
       dst[i] = 9;
       comp[i]= 3;
    }
    
    C_meanfilterblock(src,HEIGHT,WIDTH,comp);
	
	for (i=0; i<WIDTH-1; i=i+1)
    {
       ColumnA[i]=0;
       ColumnB[i]=0; 
    }//initial two rows of process1	

    start = clock();
    
    id_InBuffA = DAT_copy(src+WIDTH*(HALFHEIGHT-2), ColumnA1, WIDTH);
    id_InBuffA1 = DAT_copy(src+WIDTH*(HALFHEIGHT-1), ColumnB1, WIDTH);
    DAT_wait(id_InBuffA);
    DAT_wait(id_InBuffA1);
    // initial two rows process2
    id_InBuffA = DAT_copy(src, ColumnC, WIDTH);
    DAT_wait(id_InBuffA);
    IMG_median_3x3(ColumnA,ColumnB,ColumnC,WIDTH,ColumnOUT);
    id_InBuffA1 = DAT_copy(src+WIDTH*HALFHEIGHT, ColumnC1, WIDTH);
    DAT_wait(id_InBuffA1);
    //prelog
    
    for (i=0; i<HALFHEIGHT; i=i+3)
    {
       
       id_OutBuffA = DAT_copy(ColumnOUT,dst+WIDTH*i,WIDTH);
       id_InBuffA = DAT_copy(src+WIDTH*(i+1), ColumnA, WIDTH);
       IMG_median_3x3(ColumnA1,ColumnB1,ColumnC1,WIDTH,ColumnOUT1);
       DAT_wait(id_InBuffA);
       DAT_wait(id_OutBuffA);
       id_OutBuffA1 = DAT_copy(ColumnOUT1,dst+WIDTH*(HALFHEIGHT+i),WIDTH);
       id_InBuffA1 = DAT_copy(src+WIDTH*(HALFHEIGHT+i+1), ColumnA1, WIDTH);
       IMG_median_3x3(ColumnB,ColumnC,ColumnA,WIDTH,ColumnOUT);
       DAT_wait(id_InBuffA1);
       DAT_wait(id_OutBuffA1);
       
       id_OutBuffA = DAT_copy(ColumnOUT,dst+WIDTH*(i+1),WIDTH);
       id_InBuffA = DAT_copy(src+WIDTH*(i+2), ColumnB, WIDTH);
       IMG_median_3x3(ColumnB1,ColumnC1,ColumnA1,WIDTH,ColumnOUT1);
       DAT_wait(id_InBuffA);
       DAT_wait(id_OutBuffA);
       id_OutBuffA1 = DAT_copy(ColumnOUT1,dst+WIDTH*(HALFHEIGHT+i+1),WIDTH);
       id_InBuffA1 = DAT_copy(src+WIDTH*(HALFHEIGHT+i+2), ColumnB1, WIDTH);
       IMG_median_3x3(ColumnC,ColumnA,ColumnB,WIDTH,ColumnOUT);
       DAT_wait(id_InBuffA1);
       DAT_wait(id_OutBuffA1);
       
       id_OutBuffA = DAT_copy(ColumnOUT,dst+WIDTH*(i+2),WIDTH);
       id_InBuffA = DAT_copy(src+WIDTH*(i+3), ColumnC, WIDTH);
       IMG_median_3x3(ColumnC1,ColumnA1,ColumnB1,WIDTH,ColumnOUT1);
       DAT_wait(id_InBuffA);
       DAT_wait(id_OutBuffA);
       id_OutBuffA1 = DAT_copy(ColumnOUT1,dst+WIDTH*(HALFHEIGHT+i+2),WIDTH);
       id_InBuffA1 = DAT_copy(src+WIDTH*(HALFHEIGHT+i+3), ColumnC1, WIDTH);
       IMG_median_3x3(ColumnA,ColumnB,ColumnC,WIDTH,ColumnOUT);
       DAT_wait(id_InBuffA1);
       DAT_wait(id_OutBuffA1);
    }
       
    DAT_wait(id_OutBuffA1);
    
    elapsed = clock()-start-overhead;
	printf("Time = %ld cycles\n",(long)elapsed);
    
    for(i=0;i<WIDTH;i++)
    {
       dst[i]=0;
    }
    for(i=0;i<WIDTH;i++)
    {
       dst[WIDTH*1+i]=0;
    }
    for(i=0;i<HEIGHT;i++)
    {
       dst[i*WIDTH]=0;
    }
    for(i=0;i<HEIGHT;i++)
    {
       dst[i*WIDTH+1]=0;
    }
    for (i=1; i<HEIGHT; i++)
	{    
	    for (j=1; j<WIDTH; j++)
	    {
	        if ((dst[(i+1)*WIDTH+j+1] ) != comp[i*WIDTH+j])
	        {
	            printf("Data Mismatch!\n");
	            printf("i=%d , j=%d \n",i,j);
	            DAT_close();
	            exit(0);
	        }
	    }
	}

    printf("Successfully completed!\n");
	DAT_close();
	/*测试完成*/
    for(;;){}
}