📄 eth860.c
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* FUNCTION NAME: rs232_2_enable_ads
* DESCRIPTION:
*
* Enable/Disable RS232 port2 on 821/860 ADS and MBX boards.
*
* PARAMETERS:
* setting - 0 in lsb Disable port and (turns off LED on ADS)
* 1 in lsb Enable port and turns on LED.
*-------------------------------------------------------------------------*/
void rs232_2_enable_ads(word setting)
{
BCSR *csr;
#if (ADS860)
csr = (BCSR *)(IMMR->memc_br1 & 0xFFFF8000);
if (setting & 0x01)
csr->bcsr1 &= ~RS232EN2; /* Enable RS232 port2 (turn on LED) */
else
csr->bcsr1 |= RS232EN2; /* Disable RS232 port1 (turn off LED) */
#elif(MPC860)
//#error - there is no port 2 on MPC boards
// csr = (BCSR *)((IMMR->memc_br4 & 0xffff8000) | 0x00100000);
// if (setting & 0x01)
// csr->bcsr1 &= ~0x03;
// else
// csr->bcsr1 |= 0x01;
#else
#error
#endif
} /* end rs232_2_enable_ads */
#endif /* #if(!RTKD860) */
#if(EBSMC860TERM)
/*-------------------------------------------------------------------------
* FUNCTION NAME: smc_term_open
* DESCRIPTION:
*
* Set up SMC port for a polled RS232 serial interface
*
*-------------------------------------------------------------------------*/
#if(RTKD860)
void smc_term_open()
{
}
#else
void smc_term_open()
{
int i;
#if(SMC1TERM)
/* Disable SMC1 while we program the buffer */
/* Clear the ENT/ENR bits -- disable Transmit/Receive */
IMMR->smc_regs[SMC1_REG].smc_smcmr &= 0xFFFC;
/* port B settings define smc1 tx,rx pins */
IMMR->pip_pbpar |= (PB_SMTXD1 | PB_SMRXD1);
IMMR->pip_pbdir &= ~(PB_SMTXD1 | PB_SMRXD1);
IMMR->pip_pbodr &= ~(PB_SMTXD1 | PB_SMRXD1);
#if(ADS860)
/*set BRG1 clock: @24 Mhz, 9600 baud */
IMMR->brgc1 = 0x10136; /* 9600 baud */
IMMR->si_simode = SIMODE_SMC1CS_BRG1; /* BRG 1 */
#elif(MPC860)
/*set BRG1 clock: @50 Mhz, 9600 baud */
IMMR->brgc1 = 0x1028A; /* 9600 baud */
IMMR->si_simode = SIMODE_SMC1CS_BRG1; /* BRG 1 */
#else
#error
#endif
/* set up one receive input buffer */
BUFFER_DESCRIPTORS[SMC1_RX_BD].flags = BD_SMC_UART_RX_EMPTY;
BUFFER_DESCRIPTORS[SMC1_RX_BD].length = 0;
BUFFER_DESCRIPTORS[SMC1_RX_BD].buffer = term_inbuf;
BUFFER_DESCRIPTORS[SMC1_RX_BD].flags |= BD_SMC_UART_RX_WRAP;
/* set up one output buffer */
BUFFER_DESCRIPTORS[SMC1_TX_BD].flags = 0;
BUFFER_DESCRIPTORS[SMC1_TX_BD].length = 0;
BUFFER_DESCRIPTORS[SMC1_TX_BD].buffer = 0;
BUFFER_DESCRIPTORS[SMC1_TX_BD].flags |= BD_SMC_UART_TX_WRAP;
/* Set RXBD pointer in SMC1 parameter ram */
term_recbd = BUFFER_DESCRIPTORS+SMC1_RX_BD;
bd_union.bd = term_recbd;
SMC1_PRAM[0].rbase = bd_union.rbase[1]; /* least sig word */
/* Set TXBD pointer in SMC1 parameter ram */
term_sendbd = BUFFER_DESCRIPTORS+SMC1_TX_BD;
bd_union.bd = term_sendbd;
SMC1_PRAM[0].tbase = bd_union.tbase[1]; /* least sig word */
SMC1_PRAM[0].rfcr = 0x18; /* Byte ordering, DMA FC */
SMC1_PRAM[0].tfcr = 0x18;
SMC1_PRAM[0].mrblr = 1; /* max chars on receive */
SMC1_PRAM[0].max_idl = 0; /* no idle timeout */
SMC1_PRAM[0].brkln = 0;
SMC1_PRAM[0].brkec = 0;
SMC1_PRAM[0].brkcr = 1;
/* Initialize the CP with the new rx and tx parameters */
IMMR->cp_cr = CPCR_INIT_TX_RX_PARAMS |
CPCR_SMC1_DSP1_CH |
CPCR_FLG; /* ISSUE COMMAND */
while ((IMMR->cp_cr & CPCR_FLG) != READY_TO_RX_CMD); /* remove */
/* not enabling interrupts! */
IMMR->smc_regs[SMC1_REG].smc_smcm = 0x00; /* clear any old mask bits */
IMMR->smc_regs[SMC1_REG].smc_smce = 0xFF; /* clear any old event bits */
IMMR->smc_regs[SMC1_REG].smc_smcmr = 0x4820; /* 8N1 */
IMMR->smc_regs[SMC1_REG].smc_smcmr = 0x4823; /* Tx, Rx enabled */
rs232_1_enable_ads(1); /* enable rs232 860 boards */
#elif(SMC2TERM)
/* Disable SMC2 while we program the buffer */
/* Clear the ENT/ENR bits -- disable Transmit/Receive */
IMMR->smc_regs[SMC2_REG].smc_smcmr &= 0xFFFC;
/* port B settings define smc2 tx,rx pins */
IMMR->pip_pbpar |= (PB_SMTXD2 | PB_SMRXD2);
IMMR->pip_pbdir &= ~(PB_SMTXD2 | PB_SMRXD2);
IMMR->pip_pbodr &= ~(PB_SMTXD2 | PB_SMRXD2);
#if(ADS860)
/*set BRG2 clock: @24 Mhz, 9600 baud */
IMMR->brgc2 = 0x10136; /* 9600 baud */
IMMR->si_simode = SIMODE_SMC2CS_BRG2; /* BRG 2 */
#elif(MPC860)
/*set BRG2 clock: @50 Mhz, 9600 baud */
IMMR->brgc2 = 0x1028A; /* 9600 baud */
IMMR->si_simode = SIMODE_SMC2CS_BRG2; /* BRG 2 */
#else
#error
#endif
/* set up one receive input buffer */
BUFFER_DESCRIPTORS[SMC2_RX_BD].flags = BD_SMC_UART_RX_EMPTY;
BUFFER_DESCRIPTORS[SMC2_RX_BD].length = 0;
BUFFER_DESCRIPTORS[SMC2_RX_BD].buffer = term_inbuf;
BUFFER_DESCRIPTORS[SMC2_RX_BD].flags |= BD_SMC_UART_RX_WRAP;
/* set up one output buffer */
BUFFER_DESCRIPTORS[SMC2_TX_BD].flags = 0;
BUFFER_DESCRIPTORS[SMC2_TX_BD].length = 0;
BUFFER_DESCRIPTORS[SMC2_TX_BD].buffer = 0;
BUFFER_DESCRIPTORS[SMC2_TX_BD].flags |= BD_SMC_UART_TX_WRAP;
/* Set RXBD pointer in SMC2 parameter ram */
term_recbd = BUFFER_DESCRIPTORS+SMC2_RX_BD;
bd_union.bd = term_recbd;
SMC2_PRAM[0].rbase = bd_union.rbase[1]; /* least sig word */
/* Set TXBD pointer in SMC2 parameter ram */
term_sendbd = BUFFER_DESCRIPTORS+SMC2_TX_BD;
bd_union.bd = term_sendbd;
SMC2_PRAM[0].tbase = bd_union.tbase[1]; /* least sig word */
SMC2_PRAM[0].rfcr = 0x18; /* Byte ordering, DMA FC */
SMC2_PRAM[0].tfcr = 0x18;
SMC2_PRAM[0].mrblr = 1; /* max chars on receive */
SMC2_PRAM[0].max_idl = 0; /* no idle timeout */
SMC2_PRAM[0].brkln = 0;
SMC2_PRAM[0].brkec = 0;
SMC2_PRAM[0].brkcr = 1;
/* Initialize the CP with the new rx and tx parameters */
IMMR->cp_cr = CPCR_INIT_TX_RX_PARAMS |
CPCR_SMC2_DSP2_CH |
CPCR_FLG; /* ISSUE COMMAND */
while ((IMMR->cp_cr & CPCR_FLG) != READY_TO_RX_CMD); /* remove */
/* not enabling interrupts! */
IMMR->smc_regs[SMC2_REG].smc_smcm = 0x00; /* clear any old mask bits */
IMMR->smc_regs[SMC2_REG].smc_smce = 0xFF; /* clear any old event bits */
IMMR->smc_regs[SMC2_REG].smc_smcmr = 0x4820; /* 8N1 */
IMMR->smc_regs[SMC2_REG].smc_smcmr = 0x4823; /* Tx, Rx enabled */
rs232_2_enable_ads(1); /* enable rs232 860 boards */
#endif /* SMC1TERM,SMC2TERM */
}
#endif /* #if(RTKD860) */
/* ******************************************************************** */
/* Transmit a buffer. */
/* */
/* Test the transmit buffer status. If busy, return status -1. If ready, queue */
/* output to buffer descriptor and return 0. */
/* */
/* ******************************************************************** */
#if(RTKD860)
int smc_term_send( void *buf, int length )
{
long i;
for (i = 0; i < 10000; i++)
if (!(RTKsmc_term_sendl( buf,length )))
break;
return 0;
}
#else
int smc_term_send( void *buf, int length )
{
long i;
if(term_sendbd->flags & BD_SCC_TRANS_TX_READY) return -1;
term_sendbd->length =(unsigned short)length;
term_sendbd->buffer =buf;
term_sendbd->flags |= BD_SCC_TRANS_TX_READY;
for (i = 0; i < 100000; i++)
if (!(term_sendbd->flags & BD_SCC_TRANS_TX_READY))
break;
return 0;
}
#endif /* #if(RTKD860) */
/* ********************************************************************* */
/* Receive a character. */
/* */
/* Test the receive buffer status. If empty, return 0. If ready, return */
/* the input character. */
/* */
/* ********************************************************************* */
#if(RTKD860)
char smc_term_getc()
{
return RTKsmc_term_getc();
}
#else
char smc_term_getc()
{
if(term_recbd->flags & BD_SCC_TRANS_RX_EMPTY) return 0;
term_recbd->flags |= BD_SCC_TRANS_RX_EMPTY; /*RESET EMPTY FLAG */
term_c_pointer= term_recbd->buffer;
return *term_c_pointer;
}
#endif /* #if(RTKD860) */
/* ******************************************************************** */
/* Test for a character. */
/* */
/* Test the receive buffer status. If empty, return 0. If ready, return 1 */
/* */
/* */
#if(RTKD860)
int smc_term_kbhit(void)
{
return RTKsmc_term_kbhit();
}
#else
int smc_term_kbhit(void)
{
if(term_recbd->flags & BD_SCC_TRANS_RX_EMPTY) return 0;
else
return 1;
}
#endif /* #if(RTKD860) */
#endif /* #if(EBSMC860TERM) */
#if (EBSSMCUART)
/**************************************************************************** */
/* open the SMC UART driver interface. */
/* */
/* This routine is called from uart_init (UART.c) to open hardware specific */
/* UART functions. */
/* If the open is successful it returns TRUE otherwise FALSE. */
/* */
/* NOTE!!! Some of the CPM setup is done in eth860_open including setting up */
/* the CPM interrupt control(CICR register)with the IRQ level and setting the */
/* Interrupt Level Bit in SIMASK (12-6).These functions should be moved into */
/* initppc. */
/* */
BOOLEAN smc_uart_open(PUART_INFO uinfo)
{
int i;
uartIface = uinfo->rs232_pi; /* remember our interface ID */
uartInfo = uinfo;
#if(SMC2UART)
return(FALSE); /* not implemented for SMC2 */
#elif(SMC1UART)
/* Disable SMC1 while we program the buffer */
rs232_1_enable_ads(0); /* disable rs232 860 boards */
/* Clear the ENT/ENR bits -- disable Transmit/Receive */
IMMR->smc_regs[SMC1_REG].smc_smcmr &= 0xFFFC;
/*----------------------------------------------------*/
/* port B settings define smc1 tx,rx pins */
/*----------------------------------------------------*/
IMMR->pip_pbpar |= (PB_SMTXD1 | PB_SMRXD1);
IMMR->pip_pbdir &= ~(PB_SMTXD1 | PB_SMRXD1);
IMMR->pip_pbodr &= ~(PB_SMTXD1 | PB_SMRXD1);
/*----------------------------------------------------*/
/* SET UP THE BAUD RATE GENERATOR. We use BRG1 */
/*----------------------------------------------------*/
switch (uinfo->baud_rate)
{
case 1152:
IMMR->brgc1 = B115400; /* 115400 baud */
break;
case 576:
IMMR->brgc1 = B57600; /* 57600 baud */
break;
case 384:
IMMR->brgc1 = B38400; /* 38400 baud */
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