rs232lan_vhl.rpt

CPLD 9536 程序 我自己用的代码. VHDL语言

(unused)              0       0     0   5     FB2_6         33    GSR/I/O I
(unused)              0       0     0   5     FB2_7         32    I/O     I
(unused)              0       0     0   5     FB2_8         31    I/O     I
(unused)              0       0     0   5     FB2_9         30    I/O     I
(unused)              0       0     0   5     FB2_10        29    I/O     I
(unused)              0       0     0   5     FB2_11        28    I/O     I
(unused)              0       0     0   5     FB2_12        27    I/O     I
(unused)              0       0     0   5     FB2_13        23    I/O     I
(unused)              0       0     0   5     FB2_14        22    I/O     I
(unused)              0       0     0   5     FB2_15        21    I/O     I
(unused)              0       0     0   5     FB2_16        20    I/O     I
(unused)              0       0     0   5     FB2_17        19    I/O     I
(unused)              0       0     0   5     FB2_18              (b)     
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pwr Mode     - Macrocell power mode
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
    The number of Signals Used may exceed the number of FB Inputs Used due
    to wire-ANDing in the switch matrix.
;;-----------------------------------------------------------------;;
; Implemented Equations.


cs1 <= NOT (((sa9 AND sa8 AND sa7 AND sa6 AND NOT iow AND NOT sa3 AND NOT aen AND 
	sa5 AND sa4)
	OR (sa9 AND sa8 AND sa7 AND sa6 AND NOT ior AND NOT sa3 AND NOT aen AND 
	sa5 AND sa4)));


cs2 <= NOT (((sa9 AND sa8 AND sa7 AND sa6 AND NOT iow AND NOT sa3 AND NOT aen AND 
	sa5 AND NOT sa4)
	OR (sa9 AND sa8 AND sa7 AND sa6 AND NOT ior AND NOT sa3 AND NOT aen AND 
	sa5 AND NOT sa4)));


cs3 <= NOT (((sa9 AND NOT sa8 AND sa7 AND sa6 AND NOT iow AND NOT sa3 AND NOT aen AND 
	sa5 AND sa4)
	OR (sa9 AND NOT sa8 AND sa7 AND sa6 AND NOT ior AND NOT sa3 AND NOT aen AND 
	sa5 AND sa4)));


cs4 <= NOT (((sa9 AND NOT sa8 AND sa7 AND sa6 AND NOT iow AND NOT sa3 AND NOT aen AND 
	sa5 AND NOT sa4)
	OR (sa9 AND NOT sa8 AND sa7 AND sa6 AND NOT ior AND NOT sa3 AND NOT aen AND 
	sa5 AND NOT sa4)));


doc_cs <= NOT (((sa18 AND sa16 AND sa15 AND sa14 AND NOT aen AND NOT sa13 AND 
	NOT sa17 AND NOT smemw AND sa19)
	OR (sa18 AND sa16 AND sa15 AND sa14 AND NOT aen AND NOT sa13 AND 
	NOT sa17 AND NOT smemr AND sa19)));


irq10 <= irqcom3;


irq11 <= irqcom4;


irq15_I <= '0';
irq15 <= irq15_I when irq15_OE = '1' else 'Z';
irq15_OE <= '0';


irq12_I <= '0';
irq12 <= irq12_I when irq12_OE = '1' else 'Z';
irq12_OE <= '0';


irq5 <= irqcom1;


irq7 <= irqcom2;

Register Legend:
 FDCPE (Q,D,C,CLR,PRE); 
 FTCPE (Q,D,C,CLR,PRE); 
 LDCP  (Q,D,G,CLR,PRE); 

****************************  Device Pin Out ****************************

Device : XC9536-10-VQ44


   -----------------------------------  
  /44 43 42 41 40 39 38 37 36 35 34 33 \
 | 1                                32 | 
 | 2                                31 | 
 | 3                                30 | 
 | 4                                29 | 
 | 5          XC9536-10-VQ44        28 | 
 | 6                                27 | 
 | 7                                26 | 
 | 8                                25 | 
 | 9                                24 | 
 | 10                               23 | 
 | 11                               22 | 
 \ 12 13 14 15 16 17 18 19 20 21 22 23 /
   -----------------------------------  


Pin Signal                         Pin Signal                        
No. Name                           No. Name                          
  1 cs4                              23 sa19                          
  2 cs1                              24 TDO                           
  3 irqcom4                          25 GND                           
  4 GND                              26 VCC                           
  5 irqcom1                          27 sa18                          
  6 irq5                             28 sa17                          
  7 irq7                             29 sa16                          
  8 irq10                            30 sa15                          
  9 TDI                              31 sa14                          
 10 TMS                              32 sa13                          
 11 TCK                              33 sa9                           
 12 irq11                            34 sa8                           
 13 irq12                            35 VCC                           
 14 irq15                            36 sa7                           
 15 VCC                              37 sa6                           
 16 doc_cs                           38 sa5                           
 17 GND                              39 sa4                           
 18 aen                              40 sa3                           
 19 smemw                            41 irqcom3                       
 20 smemr                            42 cs3                           
 21 iow                              43 irqcom2                       
 22 ior                              44 cs2                           


Legend :  NC  = Not Connected, unbonded pin
         PGND = Unused I/O configured as additional Ground pin
         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
         VCC  = Dedicated Power Pin
         GND  = Dedicated Ground Pin
         TDI  = Test Data In, JTAG pin
         TDO  = Test Data Out, JTAG pin
         TCK  = Test Clock, JTAG pin
         TMS  = Test Mode Select, JTAG pin
         PE   = Port Enable pin
  PROHIBITED  = User reserved pin
****************************  Compiler Options  ****************************

Following is a list of all global compiler options used by the fitter run.

Device(s) Specified                         : xc9536-10-VQ44
Optimization Method                         : SPEED
Multi-Level Logic Optimization              : ON
Ignore Timing Specifications                : OFF
Default Register Power Up Value             : LOW
Keep User Location Constraints              : ON
What-You-See-Is-What-You-Get                : OFF
Exhaustive Fitting                          : OFF
Keep Unused Inputs                          : OFF
Slew Rate                                   : FAST
Power Mode                                  : STD
Ground on Unused IOs                        : OFF
Global Clock Optimization                   : ON
Global Set/Reset Optimization               : ON
Global Ouput Enable Optimization            : ON
FASTConnect/UIM optimzation                 : ON
Local Feedback                              : ON
Pin Feedback                                : ON
Input Limit                                 : 36
Pterm Limit                                 : 25