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📄 int32pci.h

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/***********************************************************************

FILE
    int32.h  -  all the declarations needed for int32.c

LAST UPDATE
    25 February 1998 - RAB

***********************************************************************/

#ifndef INT32

#define CLOCKFREQ   2500000L        /* clock frequency */
#define MAX_MS      .0262F            /* max interval in seconds */

/*      Port addresses of the 8536 chip                                      */

#define INT_PORTC_1     ((PUCHAR)(BADR2+0x0))
#define INT_PORTB_1     ((PUCHAR)(BADR2+0x1))
#define INT_PORTA_1     ((PUCHAR)(BADR2+0x2))
#define INT_STA_CNTR_1  ((PUCHAR)(BADR2+0x3))
#define INT_PORTC_2     ((PUCHAR)(BADR2+0x4))
#define INT_PORTB_2     ((PUCHAR)(BADR2+0x5))
#define INT_PORTA_2     ((PUCHAR)(BADR2+0x6))
#define INT_STA_CNTR_2  ((PUCHAR)(BADR2+0x7))
#define INT_ICR  ((PUCHAR)(BADR2+0x8))
#define INT_ISR  ((PUCHAR)(BADR2+0x9))
#define INT_PCIINT  ((PULONG)(BADR1+0x4C))
/*  Register addresses of the 8536 chip                                      */

#define MASTER_INT_CNTR      0x0
#define MASTER_CONF_CNTR     0x1
#define PORT_A_INT_VECT      0x2
#define PORT_B_INT_VECT      0x3
#define CNT_INT_VECT         0x4
#define PORT_C_DATA_PATH_POL 0x5
#define PORT_C_DATA_DIR      0x6
#define PORT_C_SPECIAL       0x7
#define PORT_A_COM_STA       0x8
#define PORT_B_COM_STA       0x9
#define CNT_1_COM_STA        0xA
#define CNT_2_COM_STA        0xB
#define CNT_3_COM_STA        0xC
#define PORT_A_DATA          0xD
#define PORT_B_DATA          0xE
#define PORT_C_DATA          0xF
#define CNT_1_CURR_CNT_MSB   0x10
#define CNT_1_CURR_CNT_LSB   0x11
#define CNT_2_CURR_CNT_MSB   0x12
#define CNT_2_CURR_CNT_LSB   0x13
#define CNT_3_CURR_CNT_MSB   0x14
#define CNT_3_CURR_CNT_LSB   0x15
#define CNT_1_TIME_CNST_MSB  0x16
#define CNT_1_TIME_CNST_LSB  0x17
#define CNT_2_TIME_CNST_MSB  0x18
#define CNT_2_TIME_CNST_LSB  0x19
#define CNT_3_TIME_CNST_MSB  0x1A
#define CNT_3_TIME_CNST_LSB  0x1B
#define CNT_1_MODE_SPEC      0x1C
#define CNT_2_MODE_SPEC      0x1D
#define CNT_3_MODE_SPEC      0x1E
#define CURRENT_VECTOR       0x1F
#define PORT_A_MODE_SPEC     0x20
#define PORT_A_HAND          0x21
#define PORT_A_DATA_PATH_POL 0x22
#define PORT_A_DATA_DIR      0x23
#define PORT_A_SPECIAL       0x24
#define PORT_A_PATTERN_POL   0x25
#define PORT_A_PATTERN_TRAN  0x26
#define PORT_A_PATTERN_MASK  0x27
#define PORT_B_MODE_SPEC     0x28
#define PORT_B_HAND          0x29
#define PORT_B_DATA_PATH_POL 0x2A
#define PORT_B_DATA_DIR      0x2B
#define PORT_B_SPECIAL       0x2C
#define PORT_B_PATTERN_POL   0x2D
#define PORT_B_PATTERN_TRAN  0x2E
#define PORT_B_PATTERN_MASK  0x2F

/*    Configuration Parameters                                               */

#define INT_RESET            0x03
#define CLR_INT_RESET        0x02
#define INT_CONTROL_SETUP    0xDE
#define PORTA_VECTOR         0xA0
#define PORTB_VECTOR         0xB0
#define CNT_VECTOR           0xC0

/* MASTER_CONF_CNTR settings */
#define PORT_A_EN_BIT        0x04
#define PORT_B_EN_BIT        0x80
#define PORT_C_CNT_3_EN_BIT  0x10
#define CNT_2_EN_BIT         0x20
#define CNT_1_EN_BIT         0x40
#define CNT_1_2_INDEP        0X00		// CTR's 1 & 2 are independent
#define CNT_1_GATE_2         0X01       // CTR 1 gates CTR 2
#define CNT_1_TRIG_2         0X02		// CTR 1 trigers CTR 2
#define CNT_1_CLK_2          0X03		// CTR 1 is input to CTR 2

/* Comand and Status Registers commands  */
#define CLEAR_IP_AND_IUS     0x20
#define SET_IUS              0x40
#define CLEAR_IUS            0x60
#define SET_IP               0x80
#define CLEAR_IP             0xA0
#define SET_IE               0xC0
#define CLEAR_IE             0xE0
#define COM_STA_MASK         0x1F
#define INT_ON_ERR           0x01		// flag interrupt errors
#define GATE_CNT             0x04		// bit to gate counter
#define TRIG_CNT             0x02		// bit to trigger counter
#define READ_CNT             0x08		// Freeze current count to read it
/* Command and Status Registers flags  */
#define COM_STA_IUS          0x80
#define COM_STA_IE           0x40
#define COM_STA_IP           0x20
#define COM_STA_IERR         0x10	
#define COM_STA_ORE          0x08
#define COM_STA_IRF          0x04
#define COM_STA_PMF          0x02
#define CNT_IN_PROG          0x01

/*  Counter Timer Mode bits  */
#define CNT_MODE_CONT_PULSE  0x80		// Continuous operation (~one cycle)
#define CNT_MODE_EOE         0x40		// Count appears on output line
#define CNT_MODE_ECE         0x20		// count line is counter input
#define CNT_MODE_ETE         0x10		// trigger line is counter trigger
#define CNT_MODE_EGE         0x08		// Gate line is counter gate
#define CNT_MODE_REB         0x04		// Allow counter retriggers
#define CNT_MODE_PULSE       0x00		// Output is narrow pulses
#define CNT_MODE_ONE         0x01         // Output is one-shot (wide)
#define CNT_MODE_SQWV        0x02		// output is square wave

/*  Port Mode bits  */
#define PORT_TYPE_BIT        0X00		// Bit addressable-no handshake
#define PORT_TYPE_MASK       0x3F
#define PORT_MODE_NOPM       0X00		// Disable pattern matching
#define PORT_MODE_ANDPM      0X02		// AND mode pattern matching
#define PORT_MODE_ORPM       0x04		// OR mode pattern matching
#define PORT_MODE_INT_VEC    0x06		// Priority encoded vector mode
#define PORT_PM_MASK         0xF9
#define PORT_MODE_LPM        0x01		// Latch port on pattern match


#define PORT_DIR_ALL_INPUTS  0xFF
#define GATE_AND_TRIGGER_COMMAND 0x6

/* All possible interrupt vectors that can be returned */
#define PORTA_BIT7  0xAE
#define PORTA_BIT6  0xAC
#define PORTA_BIT5  0xAA
#define PORTA_BIT4  0xA8
#define PORTA_BIT3  0xA6
#define PORTA_BIT2  0xA4
#define PORTA_BIT1  0xA2
#define PORTA_BIT0  0xA0

#define PORTB_BIT7  0xBE
#define PORTB_BIT6  0xBC
#define PORTB_BIT5  0xBA
#define PORTB_BIT4  0xB8
#define PORTB_BIT3  0xB6
#define PORTB_BIT2  0xB4
#define PORTB_BIT1  0xB2
#define PORTB_BIT0  0xB0

#define TIMER1      0xC4
#define TIMER2      0xC2
#define TIMER3      0xC0

#define BIT7        0x80
#define BIT6        0x40
#define BIT5        0x20
#define BIT4        0x10
#define BIT3        0x8
#define BIT2        0x4
#define BIT1        0x2
#define BIT0        0x1

extern ULONG Int32_Initialize(void);
extern int Int32_Read_Register(int,int);
extern void Int32_Write_Register(int,int,int);
extern void Int32_Reset(int);
extern int Int32_Read_PortA(int);
extern int Int32_Read_PortB(int);
extern int Int32_Read_PortC(int);
extern void Int32_Write_PortA(int,int);
extern void Int32_Write_PortB(int,int);
extern void Int32_Write_PortC(int,int);
extern void Int32_EnableINT_Chip1(void);
extern void Int32_DisableINT_Chip1(void);
//void Int32_ClearINT_Chip1(void);

#define INT32       1

#endif

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