📄 trad.asm
字号:
;Corresponding to Trad2.c.
;=Trad1.asm, but add WE command. WE command and RD dout can be multi-bytes.
;The length of bytes of the command or the data (= the number of bytes, e.g.
;length = 1 when the command is one-byte long) is given by pc.
;****************************
hsi_mode equ 03h
hsi_stat equ 06h
hsio_time equ 04h
int_mask equ 08h
int_pend equ 09h
int_mask1 equ 13h
int_pend1 equ 12h
sp_con equ 11h
sp_stat equ 11h
ioc0 equ 15h
ioc1 equ 16h
ioc2 equ 0bh
ios1 equ 16h
sp equ 18h
timer1 equ 0ah
timer2 equ 0ch
p1 equ 0fh
p0 equ 0eh
sbuf equ 07h
baud_r equ 0eh
;***************************
read_pc equ 1ah
calflag equ 1bh
stat equ 1ch
w1r0 equ 1dh
; equ 1eh
; equ 1fh
;***************************
doutl equ 20h
doutm equ 21h
douth equ 22h
doutx equ 23h
bx equ 24h
dinl equ 28h
dinm equ 29h
dinh equ 2ah
dinx equ 2bh
;reserve equ 2ch
;reserve equ 2dh
urange equ 2eh
irange equ 2fh
;***************************
length equ 30h
lengthcount equ 31h
adaddr equ 32h
;***************************
sendp16b equ 0c5h
indaddr equ 0c6h
send2fh equ 0c7h
readyb equ 0c8h
;equ 0c9h
;***************************
maintempl equ 0d0h
maintemph equ 0d1h
adtempl equ 0d2h
adtemph equ 0d3h
temp equ 0e3h
;***************************
; sbi_ad equ 3000h
;***************************
org 2080h
DB 3,3,3,3,3,3,2,1,3,1,1,1,1,1,2,2,2,2,2,1,1,1,1,1
DB 2,2,2,2,2,2,1,1,1,2,2,2,2,2,1,1,3,3,3,3,3,3,2,2
DB 2,2,2,2,2,2,2,2,2,2,1,1
ldb p1,#01101111b ;DIN(p1.7)=0,p1.6=1,SCLK(p1.4)=0,ADCS(p1.3)=DOUT(p1.0)=1
ldb readyb,#FFh ;ready signal
ldb sendp16b,#2bh ;indicate primary info has all been received
ld doutl,0h ;dout=0
ld douth,0h
ld sp,#00ffh
ld maintempl,#3000h
st maintempl,2008h[0] ;EXTINT=203ah,HSI.0=2008h,HSI.2=2004h
ldb baud_r,#4dh ;9600=804dh,4800=809bh,
ldb baud_r,#80h ;2400=8138h,1200=8270h
ldb sp_con,#0fh ;manner 3
ldb int_mask1,#0h ;RI=>02h, EXTINT=>20h
ldb int_mask,#0h ;HSI.0=>10h,p0.7=>80h,HSI.2=>04h
ldb ioc0,#00h ;hsi.0 disable
ldb ioc1,#20h ;TXD enable rather than /P2.0
ldb hsi_mode,#02h ;minus jump enable for hsi.0. Note hsi.0 disable now
preloop:ldb stat,sp_stat ;see if there is RXD
jbc stat,6,preloop
andb stat,#10010100b
jne prewrong
sjmp preset2ah
prewrong:rst ;wrong RXD, reset
preset2ah:ldb read_pc,sbuf
cmpb read_pc,readyb
jne prewrong
scall subtxd ;tell pc I am ready
main: ld doutl,0h ;dout=0
ld douth,0h
scall sub.readpc
ldb w1r0,read_pc ;take the W/R ad command
ldb temp,read_pc
andb temp,#3fh
LD BX,#2080H
LDB length,temp[BX]
jbc w1r0,7,mread
mwrite: ;this is a WE ad command
mtxdcom:
ldb lengthcount,length
ldb indaddr,#28h ;dinl address = 28h
stb read_pc [indaddr]+
mtxddin:scall sub.readpc ;take the command from pc
stb read_pc,[indaddr]+ ;save command in dinl, dinm, etc.
scall subtxd
djnz lengthcount,mtxddin ;have taken all? If not, goto mtxddin
ldb lengthcount,length
ldb indaddr,#28h ;dinl address = 28h
andb p1,#0f7h ;ADCS(p1.3)=0
mtxdwad: ldb adaddr,[indaddr]+ ;load command from dinl, dinm, etc.
scall sub.wad ;write r-command to ad register
djnz lengthcount,mtxdwad ;have taken all? If not, goto mtxdwad
orb p1,#08h ;ADCS(p1.3)=1
sjmp mainend
mread: ;this is a RD ad command
mrxdcom:
ldb lengthcount,length
ldb adaddr,read_pc
andb p1,#0f7h ;ADCS(p1.3)=0
scall sub.wad ;write r-command to ad register
mrxdrad: shll doutl,#01h
scall sub.rad ;read data from ad register
djnz lengthcount,mrxdrad ;have taken all? If not, goto mrxdrad
orb p1,#08h ;ADCS(p1.3)=1
ldb indaddr,#20h ;doutl address is 20h
ldb lengthcount,length
mrxddin: ldb read_pc,[indaddr]+
scall subtxd
djnz lengthcount,mrxddin ;have txd all dout? If not, goto mrxddin
mainend: sjmp main
sub.readpc:;************************
subrxd: ldb stat,sp_stat ;see if there is a RXD
jbc stat,6,subrxd
ldb read_pc,sbuf
andb stat,#10010100b
je subrxd_good
subrxd_wr: sjmp subrxd_wr ;error in parity, dead loop
subrxd_good:ret
subtxd:;****************************
stb read_pc,sbuf
subtxd_stat:ldb stat,sp_stat ;see if the data has been sent off
jbc stat,5,subtxd_stat ;bit5 (TI) = 0 goto subtxd_stat
ret ;bit5 (TI) = 1, TXD has finished
sub.wad:andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,7,sub.wbit7 ;if bit7=0, jump
orb p1,#80h ;bit7=1, so DIN(p1.7)=1
sub.wbit7:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,6,sub.wbit6 ;if bit6=0, jump
orb p1,#80h ;bit6=1, so DIN(p1.7)=1
sub.wbit6:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,5,sub.wbit5 ;if bit5=0, jump
orb p1,#80h ;bit5=1, so DIN(p1.7)=1
sub.wbit5:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,4,sub.wbit4 ;if bit4=0, jump
orb p1,#80h ;bit4=1, so DIN(p1.7)=1
sub.wbit4:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,3,sub.wbit3 ;if bit3=0, jump
orb p1,#80h ;bit3=1, so DIN(p1.7)=1
sub.wbit3:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,2,sub.wbit2 ;if bit2=0, jump
orb p1,#80h ;bit2=1, so DIN(p1.7)=1
sub.wbit2:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,1,sub.wbit1 ;if bit1=0, jump
orb p1,#80h ;bit1=1, so DIN(p1.7)=1
sub.wbit1:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
orb p1,#10h ;SCLK(p1.4)=1
jbc adaddr,0,sub.wbit0 ;if bit0=0, jump
orb p1,#80h ;bit0=1, so DIN(p1.7)=1
sub.wbit0:andb p1,#0efh ;SCLK(p1.4)=0
andb p1,#7fh ;preset DIN(p1.7)=0
ret
sub.rad:
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit7
andb maintempl,#01h ;so maintempl bit0 = DOUT(p1.0)
andb p1,#0efh ;SCLK(p1.4)=0
orb doutl,maintempl ;doutl bit0 = DOUT(p1.0)
shll doutl,#01h ;doutl bit0 => doutl bit1
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit6
andb maintempl,#01h ;so maintempl bit0 = DOUT(p1.0)
andb p1,#0efh ;SCLK(p1.4)=0
orb doutl,maintempl ;doutl bit0 = DOUT(p1.0)
shll doutl,#01h ;doutl bit0 => doutl bit1
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit5
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
shll doutl,#01h
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit4
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
shll doutl,#01h
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit3
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
shll doutl,#01h
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit2
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
shll doutl,#01h
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit1
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
shll doutl,#01h
orb p1,#10h ;SCLK(p1.4)=1
ldb maintempl,p1 ;take DOUT bit0
andb maintempl,#01h
andb p1,#0efh
orb doutl,maintempl
ret
end
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