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📄 pager 原代碼.txt

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       dw     adj_alm_hr
       dw     adj_alm_min10
       dw     adj_alm_min1
       dw     adj_alm_ap


adj_alm_24hr:
       mbbr   f_24hr,adj_alarm1
       inc    A
       bra    adj_alarm1

;;**********************************
;;;adj alarm branch
;;**********************************
adj_alm_num:
       inc    dsp_buf
       lda    dsp_buf
       and    #7fh            ;mask flash bit
       cmp    #04
       bne    $+4
       lda    #01h
       sta    dsp_buf

       dec    A
       tax
       lda    alm_reg_tab,x
       sta    mp1
       stz    mp2
       jmp   entry_alarm1

alm_reg_tab:
       db  90h,92h,94h

adj_onff:
       lda   (mp1)
       sta   tempa
       bbs7  tempa,alm_off
       smb7  tempa
       lda   tempa

       sta   (mp1)
       jmp   entry_alarm1

alm_off:
        rmb7 tempa
        lda  tempa
        sta  (mp1)
        jmp  entry_alarm1


adj_alm_hr:
       lda    (mp1)
       sta    tempa         ;temp on/off bit
       and    #7fh          ;mask on/off bit
       inc    A
       mbbr   f_24hr,adj_alm_hr2
       sta    (mp1)
       cmp    #24d
       beq    adj_alm_hr1

set_alm_onff:
       lda    #10000000b     ;set on
       ora    (mp1)
       bbs7   tempa,$+7

       lda    #01111111b     ;set off
       and    (mp1)
       sta    (mp1)
       jmp    entry_alarm1
adj_alm_hr1:
       lda    #0
       sta    (mp1)
       jmp    set_alm_onff


;;check 12hr for hour
adj_alm_hr2:
       cmp    #12
       beq    adj_alm_hr1
       cmp    #24
       beq    adj_alm_hr3
       sta    (mp1)
       jmp    set_alm_onff

adj_alm_hr3
       lda    #12d
       sta    (mp1)
       jmp    set_alm_onff


adj_alm_min10:
        inc    mp1
        lda   (mp1)
        sta   tempa
        jsr   inc_min_10
        sta   (mp1)
        dec   mp1
        jmp   entry_alarm1

adj_alm_min1:
        inc   mp1
        lda   (mp1)
        jsr   inc_min_one
        sta   (mp1)
        dec   mp1
        jmp   entry_alarm1


adj_alm_ap:
        lda   (mp1)
        sta   tempa
        and   #7fh
        cmp   #12
        bcc   adj_alm_ap1
        sec
        sbc   #12
        sta   (mp1)
        jmp   set_alm_onff
adj_alm_ap1:
        clc
        lda   #12
        adc   (mp1)
        sta   (mp1)
        jmp   set_alm_onff

;;================================
;;adjust alert mode
;;================================

adj_tone:
       inc    song_no
       lda    song_no
       cmp    #12d
       bne    adj_tone1
       stz    song_no
adj_tone1:
       jmp    entry_tone2

;;**************************
;;adjust time
;;**************************
adj_time:
       lda    shift
       cmp    #03
       beq    adj_ck_24hr
adj_time1:
       asl    A
       tax
       jmp    (adj_time_table,x)

adj_ck_24hr:
       mbbr   f_24hr,adj_time1
       inc    A
       bra    adj_time1
adj_time_table:
       dw     adj_hr
       dw     adj_min1
       dw     adj_min2
       dw     adj_ap
       dw     adj_hr_formate

adj_hr:
       inc    hour
       lda    hour
       mbbr   f_24hr,adj_hr12
       cmp    #24d
       beq    adj_hr1
       jmp    entry_time1
adj_hr1:
       stz    hour
       jmp    entry_time1

adj_hr12:
       cmp    #12
       beq    adj_hr1
       cmp    #24
       beq    adj_hr12_1
       jmp    entry_time1

adj_hr12_1
       lda    #12d
       sta    hour
       jmp    entry_time1

adj_min1:
        lda   min
        sta   tempa
        jsr   inc_min_10
        sta   min
        jmp   entry_time1

adj_min2:

        lda   min
        jsr   inc_min_one
        sta   min
        jmp   entry_time1

adj_ap:
        lda   hour
        cmp   #12
        bcc   adj_ap1
        sec
        sbc   #12
        sta   hour
        jmp   entry_time1
adj_ap1:
        clc
        lda   hour
        adc   #12
        sta   hour
        jmp   entry_time1

adj_hr_formate:
        mbbr  f_24hr,adj_hr_formate1
        mrmb  f_24hr
        bra   $+3
adj_hr_formate1:
        msmb  f_24hr
        jmp   entry_time1

;;*********************************
;;adjust date
;;*********************************
adj_date:
        lda   shift
        asl   A
        tax
        jmp   (adj_date_table,x)

adj_day:
        inc   day
        jsr   ck_day_range
        jsr   show_adj_date
        jmp   shift_date1

adj_month:
        jsr   inc_month
        jsr   ck_month_range
        jsr   show_adj_date
        jmp   shift_date1
adj_year:
        jsr   inc_year
        jsr   show_adj_date
        jmp   shift_date1

adj_date_table:
        dw    adj_day
        dw    adj_month
        dw    adj_year




;;******** clear flash bit *********

clr_flash_bit:
        rmb7    dsp_buf
        rmb7    dsp_buf1
        rmb7    dsp_buf2
        rmb7    dsp_buf3
        rmb7    dsp_buf4
        rmb7    dsp_buf5
        rmb7    dsp_buf6
        rmb7    dsp_buf7
        rmb7    dsp_buf8
        rmb7    dsp_buf9
        rmb7    dsp_buf10
        rmb7    dsp_buf11
        rts
;;******** increase 10 to Acc *********
;;increase 10 and check range of over60
;;tempa:arg
;;*************************************
inc_min_10:
        clc
        lda    #10
        adc    tempa
        cmp    #60
        bcc    $+5
        sec
        sbc    #60    ;2 bytes
        rts

;;******** increase one to Acc *********
;;increase  and check range of over10
;;tempa:arg
;;*************************************
inc_min_one:
        inc    A
        sta    tempa
        bin_bcd
        cmp    #0
        beq    inc_min_one1
        lda    tempa
        rts
inc_min_one1:
        lda    tempa
        sec
        sbc    #10
        rts
;;*********** power_on_test ***********
power_on_motor:
        lda    #13
        jsr    get_song_ptr1
        jsr    play_music2
        bra    test_check

power_on_test:

        mrmb   f_newkey
        stz    tempa       ;as counter
        stz    cnt_05s

        lda    #ffh
        jsr    fill_lcd

        msmb   music_ply           ;;for mute mode and power_on_motor
        mbbs   mute_mode,test_check
        mbbs   motor_mode,power_on_motor
        jsr    play_music

test_check:

        lda    cnt_05s
        cmp    #16d
        beq    end_test
        mbbr   music_ply,end_test
        mbbr   f_newkey,test_check

        lda    key_code            ;check program mode
        cmp    #prog_code
        bne    end_test2           ;have press key,but prog_key

        bbs0   flash_c,chk_prog_cnt
        bra    test_check
chk_prog_cnt:
        rmb0   flash_c
        inc    tempa
        lda    tempa
        cmp    #05
        bne    test_check
        sec
        bra    end_test1
end_test2
        jsr    show_all_dash
end_test:
        clc
end_test1:
        mrmb   music_ply
        rts
;============== show watch ============
show_watch_c:
        lda    hour
        sta    com1
        lda    min
        sta    com2

show_watch:
        jsr   clr_dspbuf1
        mbbr  f_24hr,show_watch12
show_watch1:
        bin_bcd  com1
show_watch2:
        cpy    #0
        bne    dsp_hr
        ldy    #space           ;check zero
dsp_hr:
        sty    dsp_buf
        sta    dsp_buf+1

        lda    #dot             ;show dash
        sta    dsp_buf+2
        smb7   dsp_buf+2        ;set to flash

dsp_min:
        bin_bcd   com2
        sty    dsp_buf+3
        sta    dsp_buf+4
        rts

show_watch12:
        lda    com1
        cmp    #12
        bcc    show_am      ;large and equal 12
        lda    #FONT_P
        sta    dsp_buf+5
        lda    com1
        cmp    #13
        bcs    show_pm12
        bra    show_watch1

show_pm12:
        sec
        sbc    #12
        bin_bcd
        bra    show_watch2

show_am:
        lda    #FONT_A
        sta    dsp_buf+5
        lda    com1
        cmp    #0
        bne    show_am1
        lda    #12
show_am1:
        bin_bcd
        bra    show_watch2

;;===== show  date ==========
show_date_c:
        lda    day
        sta    com1
        lda    month
        sta    com2

show_date:
dsp_day:
        bin_bcd  com1
        sty    dsp_buf1+6
        sta    dsp_buf1+7

        lda    #dash
        sta    dsp_buf1+8

dsp_mon:
        bin_bcd com2
        cpy    #0               ;check zero
        beq    dsp_mon1
        sty    dsp_buf1+9
        sta    dsp_buf1+10
        rts
     ;; bra    dsp_msg_no
dsp_mon1:
        sta    dsp_buf1+9
        rts
;;*****************************
dsp_msg_no:
        lda    unread_no
        bne    dsp_unread_no

        lda    msg_no
        beq    dsp_msg_no2
        bin_bcd msg_no
        jsr    dsp_msg_no3
        rts

dsp_msg_no3:
        cpy    #0
        beq    dsp_msg_no1
        sty    dsp_buf12
        sta    dsp_buf13
        bra    dsp_msg_no2
dsp_msg_no1:
        sta    dsp_buf12
        lda    #FONT_SP
        sta    dsp_buf13

dsp_msg_no2:
        rts

dsp_unread_no:
        bin_bcd unread_no
        jsr    dsp_msg_no3
        smb7   dsp_buf12
        smb7   dsp_buf13
        rts


;;********** initial I/O port **********
init_port:

        lda     #7fh           ;setting pa pull
        sta     pa_pull        ;;The pa7 Battery sense input

        lda     #80h           ;setting to bat vol sense input
        sta     pa_dual        ;and others to pa

        lda     #00001110b     ;setting port to wake up int
        sta     pa_int

        lda     #00h           ;setting  to input port
        sta     pb_io
        lda     #ffh           ;setting to push-pull or pull-up
        sta     pb_ctl
        stz     pb_dual        ;setting to portb

        lda     #ffh           ;;output high for pc4 - pc7
        sta     portc          ;disable motor,lamp,led,speaker
        lda     #f0h           ;setting pc4 - pc7 to push-pull
        sta     pc_ctl         ;setting pc0 - pc3 to open drain
        lda     #00h
        sta     pc_io          ;setting pc0 -pc3 to output
        stz     pc_dual        ;setting to portC

        stz     pd_io          ;set to output port
        lda     #ffh
        sta     pd_ctl         ;setting pd to push-pull

        rts

;;********* setting  Lcd control register ******
;;initial_lcd:

        ;;select lcd output,1:external device
       ;; lda     #0
       ;; sta     lcd_bus

       ;; lda     #81h         ;;bit7=1:trun on lcd panel
       ;; sta     lcd_ctl      ;;bit4=1:100k,0:150k,divide resistor
                               ;;bit0=1:64hz,0:32hz for lcd fram refresh rate
       ;; rts
;;***************************
clr_lcd_init:
        lda     #0
        sta     lcd_bus
        lda     #01h
        sta     lcd_ctl
        rts

;;************* timer setting ************
;initial rtc0 to 128hz  for key timer
;initial rtc1 to 2hz for real time clock
;;************************************
initial_timer:

        lda    #00001110b
        sta    rtc_ctl

        lda    #03h
        sta    tm0_ctl       ;;set tm0 output to pc0 of fx
        lda    #128          ;;set led switch freqency
        sta    tm0_d
        rts

;;*********** initial interrupt *******
init_int:

;;clear int mask register
        lda    #0ffh
        sta    int_mask0
        sta    int_mask1

;;clear int falg

        stz    int_flag0
        stz    int_flag1

;;init pocsag int control reg
;;set data in to int
;;and decoder sync interrupt

        lda    #85h
        sta    di_ctl         ;pocsag int control register

        rts

;;***** initial clock generator ******
initial_clk_gen:

        lda     #0
        sta     clk_gen_ctl    ;disable clock generate

        lda     #80h
        sta     sys_clk_ctl    ;enable system clock  with fx=76.8khz

        rts
;;************* initial battery fail detect ********
init_bfd:
   ;    lda    #0
   ;    sta    bfd_ctl
   ;    nop
   ;    nop
        lda    #10001110b    ;enable battery detection function
        sta    bfd_ctl
        rts
;**********BFD battery fail detection ***********
;bit7:enable BFD fuction
;bit0:B_ok eanble an intrrupt when battery voltage is ok
;bit1:B_fail will force intrrupt if battery is removed
;bit2:low battery reference voltage high:0.9v,low:0.8v
;bit3=1:battery ok,0:battery fail
;************************************************

;========= initial ram value ============

init_ram_value:

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