📄 avr100.lst
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.equ OR =3
.equ RXCIE =7
.equ TXCIE =6
.equ UDRIE =5
.equ RXEN =4
.equ TXEN =3
.equ CHR9 =2
.equ RXB8 =1
.equ TXB8 =0
.equ ACD =7
.equ ACO =5
.equ ACI =4
.equ ACIE =3
.equ ACIC =2
.equ ACIS1 =1
.equ ACIS0 =0
.def XL =r26
.def XH =r27
.def YL =r28
.def YH =r29
.def ZL =r30
.def ZH =r31
.equ RAMEND =$25F ;Last On-Chip SRAM Location
.equ XRAMEND =$FFFF
.equ E2END =$1FF
.equ FLASHEND=$FFF
.equ INT0addr=$001 ;External Interrupt0 Vector Address
.equ INT1addr=$002 ;External Interrupt1 Vector Address
.equ ICP1addr=$003 ;Input Capture1 Interrupt Vector Address
.equ OC1Aaddr=$004 ;Output Compare1A Interrupt Vector Address
.equ OC1Baddr=$005 ;Output Compare1B Interrupt Vector Address
.equ OVF1addr=$006 ;Overflow1 Interrupt Vector Address
.equ OVF0addr=$007 ;Overflow0 Interrupt Vector Address
.equ SPIaddr =$008 ;SPI Interrupt Vector Address
.equ URXCaddr=$009 ;UART Receive Complete Interrupt Vector Address
.equ UDREaddr=$00a ;UART Data Register Empty Interrupt Vector Address
.equ UTXCaddr=$00b ;UART Transmit Complete Interrupt Vector Address
.equ ACIaddr =$00c ;Analog Comparator Interrupt Vector Address
000000 c024 rjmp RESET ;Reset Handle
;***************************************************************************
;*
;* EEWrite
;*
;* This subroutine waits until the EEPROM is ready to be programmed, then
;* programs the EEPROM with register variable "EEdwr" at address "EEawr:EEawr"
;*
;* Number of words :1200 ; 5 + return
;* :8515 ; 7 + return
;* Number of cycles :1200 ; 8 + return (if EEPROM is ready)
;* :8515 ; 11 + return (if EEPROM is ready)
;* Low Registers used :None
;* High Registers used: ;3 (EEdwr,EEawr,EEawrh)
;*
;***************************************************************************
;***** Subroutine register variables
.def EEdwr =r16 ;data byte to write to EEPROM
.def EEawr =r17 ;address low byte to write to
.def EEawrh =r18 ;address high byte to write to
;***** Code
EEWrite:
000001 99e1 sbic EECR,EEWE ;if EEWE not clear
000002 cffe rjmp EEWrite ; wait more
; out EEAR,EEawr ;output address for 1200, commented out !
; the two following lines must be replaced with the line above if 1200 is used
000003 bb2f out EEARH,EEawrh ;output address high for 8515
000004 bb1e out EEARL,EEawr ;output address low for 8515
000005 bb0d out EEDR,EEdwr ;output data
000006 9ae2 sbi EECR,EEMWE ;set master write enable, remove if 1200 is used
000007 9ae1 sbi EECR,EEWE ;set EEPROM Write strobe
;This instruction takes 4 clock cycles since
;it halts the CPU for two clock cycles
000008 9508 ret
;***************************************************************************
;*
;* EERead
;*
;* This subroutine waits until the EEPROM is ready to be programmed, then
;* reads the register variable "EEdrd" from address "EEardh:EEard"
;*
;* Number of words :1200 ; 5 + return
;* :8515 ; 6 + return
;* Number of cycles :1200 ; 8 + return (if EEPROM is ready)
;* :8515 ; 9 + return (if EEPROM is ready)
;* Low Registers used :1 (EEdrd)
;* High Registers used: :2 (EEard,EEardh)
;*
;***************************************************************************
;***** Subroutine register variables
.def EEdrd =r0 ;result data byte
.def EEard =r17 ;address low to read from
.def EEardh =r18 ;address high to read from
;***** Code
EERead:
000009 99e1 sbic EECR,EEWE ;if EEWE not clear
00000a cffe rjmp EERead ; wait more
; out EEAR,EEard ;output address for 1200, commented out !
; the two following lines must be replaced with the line above if 1200 is used
00000b bb2f out EEARH,EEardh ;output address high for 8515
00000c bb1e out EEARL,EEard ;output address low for 8515
00000d 9ae0 sbi EECR,EERE ;set EEPROM Read strobe
;This instruction takes 4 clock cycles since
;it halts the CPU for two clock cycles
00000e b20d in EEdrd,EEDR ;get data
00000f 9508 ret
;***************************************************************************
;*
;* EEWrite_seq
;*
;* This subroutine increments the EEPROM address by one and waits until the
;* EEPROM is ready for programming. It then programs the EEPROM with
;* register variable "EEdwr_s".
;* Number of words :1200 ; 7 + return
;* :8515 ; 10 + return
;* Number of cycles :1200 ; 10 + return (if EEPROM is ready)
;* :8515 ; 15 + return (if EEPROM is ready)
;* Low Registers used :None
;* High Registers used: :3 (EEdwr_s,EEwtmp,EEwtmph)
;*
;***************************************************************************
;***** Subroutine register variables
.def EEwtmp =r24 ;temporary storage of address low byte
.def EEwtmph =r25 ;temporary storage of address high byte
.def EEdwr_s =r18 ;data to write
;***** Code
EEWrite_seq:
000010 99e1 sbic EECR,EEWE ;if EEWE not clear
000011 cffe rjmp EEWrite_seq ; wait more
; Write sequence for 1200
; in EEwtmp,EEAR ;get address for 1200, commented out !
; inc EEwtmp ;increment address 1200, commented out !
; out EEAR,EEwtmp ;output address 1200
; Write sequence for 8515, must be replaced with the lines above if 1200 is used
000012 b38e in EEwtmp,EEARL ;get address low 8515
000013 b39f in EEwtmph,EEARH ;get address high 8515
000014 9601 adiw EEwtmp,0x01 ;increment address 8515
000015 bb8e out EEARL,EEwtmp ;output address 8515
000016 bb9f out EEARH,EEwtmph ;output address 8515
000017 bb2d out EEDR,EEdwr_s ;output data
000018 9ae2 sbi EECR,EEMWE ;set master write enable, remove if 1200 is used
000019 9ae1 sbi EECR,EEWE ;set EEPROM Write strobe
;This instruction takes 4 clock cycles since
;it halts the CPU for two clock cycles
00001a 9508 ret
;***************************************************************************
;*
;* EERead_seq
;*
;* This subroutine increments the address stored in EEAR and reads the
;* EEPROM into the register variable "EEdrd_s".
;* Number of words :1200 ; 5 + return
;* :8515 ; 7 + return
;* Number of cycles :1200 ; 8 + return (if EEPROM is ready)
;* :8515 ; 11 + return (if EEPROM is ready)
;* Low Registers used :1 (EEdrd_s)
;* High Registers used: :2 (EErtmp,EErtmph)
;*
;***************************************************************************
;***** Subroutine register variables
.def EErtmp =r24 ;temporary storage of low address
.def EErtmph =r25 ;temporary storage of high address
.def EEdrd_s =r0 ;result data byte
;***** Code
EERead_seq:
00001b 99e1 sbic EECR,EEWE ;if EEWE not clear
00001c cffe rjmp EERead_seq ; wait more
; The above sequence for EEWE = 0 can be skipped if no write is initiated.
; Read sequence for 1200
; in EErtmp,EEAR ;get address for 1200, commented out !
; inc EErtmp ;increment address 1200, commented out !
; out EEAR,EErtmp ;output address 1200
; Read sequence for 8515, must be replaced with the lines above if 1200 is used
00001d b38e in EErtmp,EEARL ;get address low 8515
00001e b39f in EErtmph,EEARH ;get address high 8515
00001f 9601 adiw EErtmp,0x01 ;increment address 8515
000020 bb8e out EEARL,EErtmp ;output address 8515
000021 bb9f out EEARH,EErtmph ;output address 8515
000022 9ae0 sbi EECR,EERE ;set EEPROM Read strobe
;This instruction takes 4 clock cycles since
;it halts the CPU for two clock cycles
000023 b20d in EEdrd_s,EEDR ;get data
000024 9508 ret
;****************************************************************************
;*
;* Test/Example Program
;*
;****************************************************************************
;***** Main Program Register variables
.def counter =r19
.def temp =r20
;***** Code
RESET:
;***** Initialize stack pointer
;* Initialize stack pointer to highest address in internal SRAM
;* Comment out for devices without SRAM
000025 e002 ldi r16,high(RAMEND) ;High byte only required if
000026 bf0e out SPH,r16 ;RAM is bigger than 256 Bytes
000027 e50f ldi r16,low(RAMEND)
000028 bf0d out SPL,r16
;***** Program a random location
000029 ea0a ldi EEdwr,$aa
00002a e020 ldi EEawrh,$00
00002b e110 ldi EEawr,$10
00002c dfd4 rcall EEWrite ;store $aa in EEPROM location $0010
;***** Read from a random locations
00002d e020 ldi EEardh,$00
00002e e110 ldi EEard,$10
00002f dfd9 rcall EERead ;read address $10
000030 ba08 out PORTB,EEdrd ;output value to Port B
;***** Fill the EEPROM address 1..64 with bit pattern $55,$aa,$55,$aa,...
000031 e33f ldi counter,63 ;init loop counter
000032 2744 clr temp
000033 bb4f out EEARH,temp ;EEARH <- $00
000034 2744 clr temp
000035 bb4e out EEARL,temp ;EEAR <- $00 (start address - 1)
000036 e525 loop1: ldi EEdwr_s,$55
000037 dfd8 rcall EEWrite_seq ;program EEPROM with $55
000038 ea2a ldi EEdwr_s,$aa
000039 dfd6 rcall EEWrite_seq ;program EEPROM with $aa
00003a 953a dec counter ;decrement counter
00003b f7d1 brne loop1 ;and loop more if not done
;***** Copy 10 first bytes of EEPROM to r1-r11
00003c 2744 clr temp
00003d bb4f out EEARH,temp ;EEARH <- $00
00003e e040 ldi temp,$00
00003f bb4e out EEARL,temp ;EEAR <- $00 (start address - 1)
000040 27ff clr ZH
000041 e0e1 ldi ZL,1 ;Z-pointer points to r1
000042 dfd8 loop2: rcall EERead_seq ;get EEPROM data
000043 8200 st Z,EEdrd_s ;store to SRAM
000044 95e3 inc ZL
000045 30ec cpi ZL,12 ;reached the end?
000046 f7d9 brne loop2 ;if not, loop more
000047 cfff forever:rjmp forever ;eternal loop
Assembly complete with no errors.
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