sysalib.s

嵌入式操作系统VxWorks中板级支持包文件

 * Initial Peripheral Bus Unit devices here ...
 */


#ifdef INCLUDE_HEX_LED
#ifdef SECOND_HEX_LED
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_ALL_OFF), HEX_DISPLAY_MSB )
#endif
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_0 & L7SEG_Dot), HEX_DISPLAY_LSB )
#endif

#ifdef LOCAL_MEM_AUTOSIZE
/* DRAM sizing */
        bl      sdramSize               /* Figure out how much RAM */
#else
/*
 * Go with Factory default of 128M. Set up the registers for mcuInit.
 * mcuInit currently only uses r1 & r2...
 * r0 - SDRAM size in megabytes.
 * r1 - bank 0 size in megabytes.
 * r2 - bank 1 size in megabytes.
 * r3 - DIMM bank count (1 or 2).
 * r4 - SDRAM width in bits (8 or 16 bits).
 * r5 - SDRAM refresh rate type.
 */
        ldr     r0, =template_SDRAM_FIXED_SIZE
        ldr     r1, =template_SDRAM_BANK0_SIZE
        ldr     r2, =template_SDRAM_BANK1_SIZE
        ldr     r3, =template_SDRAM_DIMM_COUNT
        ldr     r4, =template_SDRAM_FIXED_WIDTH
        ldr     r5, =template_MCU_RFR_DEFAULT_VAL
#endif

/* Memory controller initialization */
        bl      mcuInit                 /* Set up memory controller */

#ifdef INCLUDE_HEX_LED
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_1 & L7SEG_Dot), HEX_DISPLAY_LSB )
#endif

/* flush instruction and data TLBs */
        mcr     p15, 0, r0, c8, c7, 0
        CPWAIT  (r0)                    /* Wait */

/* Enable Instruction Cache */
        mrc     p15, 0, r0, c1, c0, 0   /* Read Control Register*/
        orr     r0, r0, #0x1000         /* Set I-Cache bit */
        mcr     p15, 0, r0, c1, c0, 0   /* Write Back Control Register */
        CPWAIT  (r0)                    /* Wait */

#ifdef INCLUDE_HEX_LED
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_2 & L7SEG_Dot), HEX_DISPLAY_LSB )
#endif

/*** MMU Setup ***/
/* Set Translation Table Base */
        ldr     r0, =(LOCAL_MEM_LOCAL_ADRS + MMU_TRANSLATION_BASE)
        mcr     p15, 0, r0, c2, c0, 0   /* Set Translation Table Base Register */
        CPWAIT  (r0)                    /* Wait */

/* Invalidate Instruction, Data TLBs */
        mcr     p15, 0, r0, c8, c7, 0   /* Flush I & D TLBs*/
        CPWAIT  (r0)                    /* Wait */

/* Set Domain Access Control Register */
        ldr     r0, =0xffffffff         /* Set All 16 domains to manager access */
        mcr     p15, 0, r0, c3, c0, 0   /* Set Domain Permissions */
        CPWAIT  (r0)                    /* Wait */

/* Enable MMU */
        mrc     p15, 0, r0, c1, c0, 0   /* Read Control Register */
        orr     r0, r0, #0x00000001     /* Enable MMU */

        mcr     p15, 0, r0, c1, c0, 0   /* Write Back the Control Register */
        CPWAIT  (r0)                    /* Wait */

#ifdef INCLUDE_HEX_LED
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_3 & L7SEG_Dot), HEX_DISPLAY_LSB )
#endif

/*** Data Cache Setup ***/
/* Drain Write/Fill Buffers */
        mcr     p15, 0, r0, c7, c10, 4  /* Drain */
        CPWAIT  (r0)                    /* Wait */

/* Enable Data Cache */
        mrc     p15, 0, r0, c1, c0, 0   /* Read Control Reg */
        orr     r0, r0, #0x00000004     /* Enable Data Cache */
        mcr     p15, 0, r0, c1, c0, 0   /* Write Back */
        CPWAIT  (r0)                    /* Wait */

/* Enable Branch Target Buffer */
        mrc     p15, 0, r0, c1, c0, 0   /* Read Control Reg */
        orr     r0, r0, #0x00000800     /* Enable BTB */
        mcr     p15, 0, r0, c1, c0, 0   /* Write Back the Control Reg */
        CPWAIT  (r0)                    /* Wait */

#ifdef INCLUDE_HEX_LED
        HEX_DISPLAY_THIS ( r0, r1, (L7SEG_4 & L7SEG_Dot), HEX_DISPLAY_LSB )
#endif

        mov     r0, #BOOT_CLEAR /* pass startType */

/* now call usrInit */
        b       FUNC(usrInit)

#else /* ! INCLUDE_HSI_PROBE */
        .text
        .align 4

/*******************************************************************************
*
* sysInit - start after boot
*
* This routine is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting.  It disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit().  This
* stack is used only by usrInit() and is never used again.  Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A
*
* sysInit ()              /@ THIS IS NOT A CALLABLE ROUTINE @/
*
*/

_ARM_FUNCTION(sysInit)

/* Disable Interrupts */
        mrs     r1, cpsr                /* get current status */
        orr     r1, r1, #I_BIT | F_BIT  /* disable IRQ and FIQ */
        msr     cpsr, r1

/* Interrupts Disabled */
        ldr     r0, =template_MASK_ALL_INT
        mcr     p6, 0, r0, c0, c0, 0    /* Write Interrupt Control (INTCTL) Register */

        adr     sp, FUNC(sysInit)       /* initialise stack pointer */
        mov     fp, #0                  /* initialise frame pointer */
        mov     r0, #BOOT_WARM_AUTOBOOT /* pass startType */

/* now call usrInit */
        b       FUNC(usrInit)

#endif /* INCLUDE_HSI_PROBE */


/*******************************************************************************
*
* sysIntStackSplit - split interrupt stack and set interrupt stack pointers
*
* This routine is called, via a function pointer, during kernel
* initialisation.  It splits the allocated interrupt stack into IRQ and
* SVC-mode stacks and sets the processor's IRQ stack pointer. Note that
* the pointer passed points to the bottom of the stack allocated i.e.
* highest address+1.
*
* NOMANUAL
*
* void sysIntStackSplit
*     (
*     char *pBotStack   /@ pointer to bottom of interrupt stack @/
*     long size		/@ size of stack @/
*     )
*
*/

_ARM_FUNCTION(sysIntStackSplit)

/*
 * Split stack into 2 - IRQ and SVC-mode interrupt stacks.
 * IRQ stack needs 6 words per nested interrupt;
 * SVC-mode will need a good deal more for the C interrupt handlers.
 * For now, use ratio 1:7 with any excess allocated to the SVC-mode stack
 * at the lowest address.
 *
 * Note that FIQ is not handled by VxWorks so no stack is allocated for it.
 *
 * The stacks and the variables that describe them look like this.
 *
 *         - HIGH MEMORY -
 *     ------------------------ <--- vxIrqIntStackBase (r0 on entry)
 *     |                      |
 *     |       IRQ-mode       |
 *     |    interrupt stack   |
 *     |                      |
 *     ------------------------ <--{ vxIrqIntStackEnd
 *     |                      |    { vxSvcIntStackBase
 *     |       SVC-mode       |
 *     |    interrupt stack   |
 *     |                      |
 *     ------------------------ <--- vxSvcIntStackEnd
 *         - LOW  MEMORY -
 *
 *
 * r0 = base of space allocated for stacks (i.e. highest address)
 * r1 = size of space
 */

        sub     r2,r0,r1                /* r2 -> lowest usable address */
        ldr     r3,L$_vxSvcIntStackEnd
        str     r2,[r3]                 /*  == end of SVC-mode stack */
        sub     r2,r0,r1,ASR #3         /* leave 1/8 for IRQ */
        ldr     r3,L$_vxSvcIntStackBase
        str     r2,[r3]

/* now allocate IRQ stack, setting irq_sp */

        ldr     r3,L$_vxIrqIntStackEnd
        str     r2,[r3]
        ldr     r3,L$_vxIrqIntStackBase
        str     r0,[r3]

        mrs     r2,cpsr
        bic     r3,r2,#MASK_MODE
        orr     r3,r3,#MODE_IRQ32 | I_BIT       /* set irq_sp */
        msr     cpsr,r3
        mov     sp,r0

/* switch back to original mode and return */

        msr     cpsr,r2
        mov     pc,lr

/*****************************************************************************
* sysGetTransTblBase - Get Translation Table Base register.
*
* RETURNS:       UINT32 containing the Translation Table Base.
*/

_ARM_FUNCTION_CALLED_FROM_C(sysGetTransTblBase)

        mrc     p15, 0, r0, c2, c0, 0   /* Get Translation Table Base register */
        ldr     r1, =0xffffc000
        and     r0, r0, r1              /* remove reserved bits                */
        mov     pc, lr

/*******************************************************************************
* sysWrite16 - explicitly perform a 16-bit write
*
* This routine simply performs a 16-bit write, i.e. an STRH instruction. This
* would be used for I/O peripherals where it is significant whether a
* store is an STR, STRB or STRH. This routine may be particularly
* useful when the behaviour of the C compiler is not appropriate.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: N/A
*
* void sysWrite16
*       (
*       volatile UINT16 *       address,        /@ address to write to @/
*       UINT16                  data            /@ data to write @/
*       )
*
*/

_ARM_FUNCTION_CALLED_FROM_C(sysWrite16)

        strh    r1, [r0]                /* Store the 16-bit quantity */
        mov     pc, lr                  /* Return */

/*******************************************************************************
* sysRead16 - explicitly perform a 16-bit read
*
* This routine simply performs a 16-bit read, i.e. an LDRH instruction. This
* would be used for I/O peripherals where it is significant whether a store
* is an LDR, LDRB or LDRH.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the value read
*
* UINT16 sysRead16
*       (
*       volatile UINT16 *       address,        /@ address to read @/
*       )
*
*/

_ARM_FUNCTION_CALLED_FROM_C(sysRead16)

        ldrh    r0, [r0]                /* Load the 16-bit quantity */
        mov     pc, lr                  /* Return */

/*******************************************************************************
*
* swap32 - swap the bytes in a 32-bit word
*
* This routine swaps the bytes in a 32-bit word;  i.e. it would convert
* 0x12345678 to 0x78563412.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the swapped data
*
* UINT32 swap32
*       (
*       UINT32                  data            /@ data to be swapped @/
*       )
*/

_ARM_FUNCTION_CALLED_FROM_C(swap32)

        /* Assume r0 initially contains 11223344 */
        and     r1, r0, #0x0000FF00     /* r1 = 00003300 */
        mov     r1, r1, lsl #8          /* r1 = 00330000 */
        orr     r1, r1, r0, lsl #24     /* r1 = 44330000 */
        and     r2, r0, #0x00FF0000     /* r2 = 00220000 */
        orr     r1, r1, r2, lsr #8      /* r1 = 44332200 */
        orr     r0, r1, r0, lsr #24     /* r0 = 44332211 */
        mov     pc, lr                  /* Return */

/*******************************************************************************
*
* swap16 - swap the bytes in a 16-bit word
*
* This routine swaps the bytes in a 16-bit word;  i.e. it would convert
* 0x1234 to 0x3412.
*
* NOTE
* For reasons of efficiency, this routine does not establish a stack frame.
*
* RETURNS: the swapped data
*
* UINT16 swap16
*       (
*       UINT16                  data            /@ data to be swapped @/
*       )
*/

_ARM_FUNCTION_CALLED_FROM_C(swap16)

        /* Assume r0 initially contains xxxx1122 */
        mov     r0, r0, lsl #16        /* r0 = 11220000 */
        mov     r1, r0, lsl #8         /* r1 = 22000000 */
        orr     r1, r1, r0, lsr #8     /* r1 = 22112200 */
        mov     r0, r1, lsr #16        /* r0 = 00002211 */
        mov     pc, lr                 /* Return */

/*******************************************************************************
*
* Include Low Level Assembly Support Code for template Timers, Interrupts, and
* any additional low level assembly support routines required...
*/
#include "sysTimer.s"
#include "sysIntrCtl.s"

#ifdef LOCAL_MEM_AUTOSIZE
/*******************************************************************************
*
* sysPhysMemSize - returns auto-sized memory.
*
* RETURNS: the size of memory found when auto-sizing performed...
*
* NOTE - This routine depends on the fact that SBR0 & SBR1 are setup correctly
*        in romInit.s when the actual auto-sizing is performed.
*
* UINT32 sysPhysMemSize
*           (
*           void
*           ) 
*/
_ARM_FUNCTION_CALLED_FROM_C(sysPhysMemSize)

/* TODO  -Query SBR0 & SBR1 to determine physical memory discovered in romInit */

        mov     pc, lr
#endif

#if defined(INCLUDE_HSI_PROBE)
/*******************************************************************************
* mcuInit - set up the memory controller
*
* PARAMETERS
*
* r0 - SDRAM size in megabytes.
* r1 - bank 0 size in megabytes.
* r2 - bank 1 size in megabytes.
* r3 - DIMM count (1 or 2).
* r4 - SDRAM width in bits (8 or 16 bits).
* r5 - SDRAM refresh rate type.
*
* RETURNS:
*
*/

mcuInit:

        /* TODO - Consult template Spec to determine how to initialize Memory Controller */

        mov     pc, lr

#ifdef LOCAL_MEM_AUTOSIZE
/*******************************************************************************
* sdramSize - determine the size of the installed SDRAM
*
* This routine should read Serial Presence Detect (SPD) data from the EEPROM fitted
* to an SDRAM DIMM, in order to determine the DIMM's size. The EEPROM is
* accessed using the templates I2C bus interface unit.
*
* Data held within the EEPROM should conform with the JEDEC SDRAM SPD
* specification and, more specifically, the PC100 / PC133 SDRAM SPD
* specification defined by Intel and others. For details on these
* specifications, see JEDEC's web site at http://www.jedec.org, and Intel's
* developer site (memory techologies section) at http://developer.intel.com.
*
* This routine should halt and display an error code on the board's LED if any
* of the following conditions are detected:
*
* - No SDRAM banks found.
* - More than two SDRAM banks found.
*
* SEE ALSO
*
* JEDEC web site, http://www.jedec.org
* Intel Developer web site, http://developer.intel.com
* Intel 80321 Specification
*
* NOTE
*
* ASSUMPTIONS
*
* This code typically makes the following assumptions:
*
* If only one SDRAM bank is populated, it is bank 0.
* If two banks, both are assumed to be of the same size.
* All DIMMs attached to the system use the same SDRAM width (x8 or x16).
*
* PARAMETERS
*
* None.
*
* RETURNS:
*
* r0 - SDRAM size in megabytes.
* r1 - bank 0 size in megabytes.
* r2 - bank 1 size in megabytes.
* r3 - DIMM bank count (1 or 2).
* r4 - SDRAM width in bits (8 or 16 bits).
* r5 - SDRAM refresh rate type.
*
*/

sdramSize:

        /* TODO - Query SDRAM DIMM's EPROM to determine SDRAM parameters */

        mov     pc, lr

#endif /* LOCAL_MEM_AUTOSIZE */
#endif /* INCLUDE_HSI_PROBE */

L$_vxSvcIntStackBase:	.long	VAR(vxSvcIntStackBase)
L$_vxSvcIntStackEnd:	.long	VAR(vxSvcIntStackEnd)
L$_vxIrqIntStackBase:	.long	VAR(vxIrqIntStackBase)
L$_vxIrqIntStackEnd:	.long	VAR(vxIrqIntStackEnd)

/***EOF***/