ixm1200hpc.h

vxworks的BSP开发配置文件

/* ixm1200HPC.h
 * Host communications driver via PCI (implementation for ixm1200)
 *
 *---------------------------------------------------------------------------
 *                                                                      
 *                  I N T E L   P R O P R I E T A R Y                   
 *                                                                      
 *     COPYRIGHT (c)  1999 BY  INTEL  CORPORATION.  ALL RIGHTS          
 *     RESERVED.   NO  PART  OF THIS PROGRAM  OR  PUBLICATION  MAY      
 *     BE  REPRODUCED,   TRANSMITTED,   TRANSCRIBED,   STORED  IN  A    
 *     RETRIEVAL SYSTEM, OR TRANSLATED INTO ANY LANGUAGE OR COMPUTER    
 *     LANGUAGE IN ANY FORM OR BY ANY MEANS, ELECTRONIC, MECHANICAL,    
 *     MAGNETIC,  OPTICAL,  CHEMICAL, MANUAL, OR OTHERWISE,  WITHOUT    
 *     THE PRIOR WRITTEN PERMISSION OF :                                
 *                                                                      
 *                        INTEL  CORPORATION                            
 *                                                                     
 *                     2200 MISSION COLLEGE BLVD                        
 *                                                                      
 *               SANTA  CLARA,  CALIFORNIA  95052-8119                  
 *                                                                      
 *---------------------------------------------------------------------------
 *
 *
 *  system: IXM1200
 *  subsystem: VxWorks
 *  author: jdg, Mar 29, 00  Initial version
 *  revisions:
 *  $History: ixm1200HPC.h $
 * 
 * *****************  Version 1  *****************
 * User: Jdguilfo     Date: 5/23/01    Time: 1:29p
 * Created in $/V1.3/BoardSupport/VxWorks/ixm1200
 * Specific version for Spectacle Island
 * 
 * *****************  Version 6  *****************
 * User: Jdguilfo     Date: 4/13/01    Time: 5:25p
 * Updated in $/dev_1200/BoardSupport/VxWorks/IXP1200EB
 * Change SI to IXM1200 & BV to PA1104, fix C0/Hyannis PCI CSR bug, up
 * clock speed for Hyannis, add ECC
 * 
 * *****************  Version 5  *****************
 * User: Jdguilfo     Date: 12/27/00   Time: 4:13p
 * Updated in $/dev_1200/BoardSupport/VxWorks/IXP1200EB
 * First draft of changes for Spectacle Island HPC / 82555 driver
 * 
 * *****************  Version 3  *****************
 * User: Jdguilfo     Date: 10/20/00   Time: 2:43p
 * Updated in $/dev_1200/BoardSupport/VxWorks/IXP1200EB
 * Merge bootmgr and flashutility into bootflash
 * 
 * *****************  Version 2  *****************
 * User: Jdguilfo     Date: 7/07/00    Time: 9:58a
 * Updated in $/dev_1200/BoardSupport/VxWorks/IXP1200EB
 * Fix bug where two threads using common IRP could corrupt it
 * 
 * *****************  Version 1  *****************
 * User: Jdguilfo     Date: 6/29/00    Time: 11:22a
 * Created in $/dev_1200/BoardSupport/VxWorks/IXP1200EB
 * Add HPC, merge VxWorks into one makefile
 * 
 * ---------------------------------------------------------------------
 */

#ifndef __IXM1200HPC_H
#define __IXM1200HPC_H

#ifdef __cplusplus
extern "C" {
#endif

#include "hpcIf.h"

/*
 * Memory layout: (starting with higher addresses)
 *   24 Meg -- Start of VxWorks area
 *   *--  *---------------*
 *   |    | CONFIG_STATUS |
 *   |    *---------------*
 *   |    padding to size of data buffer
 *   *--
 *   *--
 *   |
 *   |  Data buffer: n-1
 *   |
 *   *--
 *   ...
 *   *--
 *   |
 *   |  Data buffer 1: channel 1, TX (from IXM1200's point of view)
 *   |
 *   *--
 *   *--
 *   |
 *   |  Data buffer 0: channel 0, RX (from IXM1200's point of view)
 *   |
 *   *--
 *   lowest used address
 */

#define SHARED_DATA_BUFFER_SIZE 128
#define MAX_CHANNELS 4
#define QUEUES_PER_CHANNEL 2 /* 0: RX, 1: TX */
#define NUM_SHARED_DATA_BUFFERS (MAX_CHANNELS * QUEUES_PER_CHANNEL)

#define SIGNATURE 0x48504330 /* "HPC0" */
#define DOORBELL_SEND_MASK (1 << 15)
#define DOORBELL_RECV_MASK (1 << 30)

#define BUFFER_INCOMPLETE_MASK (1 << 31)

typedef unsigned char HPC_BUFFER[SHARED_DATA_BUFFER_SIZE];

/*
 * Signature is put last, since we are building this data structure
 * from high memory towards low memory. This puts the signature in
 * a known location, even if we change the number of channels or size of
 * channels
 */
typedef struct _HPC_CONFIG_STATUS {
    unsigned volatile int sizeValid[NUM_SHARED_DATA_BUFFERS];
    unsigned volatile int NTIsWaitingMask;
    unsigned volatile int IXM1200IsWaitingMask;
    unsigned volatile int Signature;
} HPC_CONFIG_STATUS;

typedef struct _HPC_QUEUE {
    HPC_IRP *head;
    HPC_IRP *tail;
} HPC_QUEUE;

typedef enum _HPC_INTERFACE {
    HPC_NONE, /* Not yet open */
    HPC_W32,  /* Win32-like interface */
    HPC_SIO   /* VxWorks SIO-like interface */
} HPC_INTERFACE;

struct _HPC_GLOBAL_STATE;

typedef struct _HPC_BUFFER_INFO {
    unsigned char *buff;
    HPC_QUEUE queue;
    HPC_INTERFACE interface;
    unsigned int waitingMask;
    unsigned int bytesUsed;
    HPC_IRP irp;
    SEM_ID irpSem;
    HPC_IB_MODE ibMode;

    /* following fields used by HPC_SIO */
    PUT_RCV_CHARS putRcvChars;
    void *putData;
    GET_TX_CHARS getTxChars;
    void *getData;
    BOOL txWaiting;
} HPC_BUFFER_INFO;    

#define HPC_IS_TX(index) (((index) & 1) == 0)
#define HPC_TX_OFFSET 0 /* offset of TX buffer */
#define HPC_RX_OFFSET 1 /* offset of RX buffer */

typedef struct _HPC_GLOBAL_STATE {
    HPC_BUFFER_INFO bufferInfo[NUM_SHARED_DATA_BUFFERS];
    SEM_ID DPCSem;      /* Used to release DPC routine from ISR */
    SEM_ID commonSem;   /* Controls access to common data structures */
} HPC_GLOBAL_STATE;

#ifdef __cplusplus
}
#endif

#endif /* ifndef __IXM1200HPC_H */