config.h

vxworks的BSP开发配置文件

/* config.h - Intel ixm1200 configuration header */

/* Copyright 1997-2002 Wind River Systems, Inc.; Copyright 1999 Intel Corp. */

/*
modification history
--------------------
01k,10jul02,scm  add C++ protection...
01j,13may02,to   set WDB_COMM_TYPE to WDB_COMM_END implicitly (SPR#77254)
01i,22jan02,j_b  updated BSP rev to 1.2/4 (diab toolchain support)
01h,12sep01,scm  changes to flash configuration to support larger boot
                 manager...
01g,30aug01,scm  adjust to reflect ixm1200...
01f,26jun01,scm  Converting to new End drivers
01e,26jun01,scm  Converting to new End drivers
01d,07Mar00,jdg  Added support for B0 revision ixp1200
01c,05Jan00,jdg  Added support for auto PCI address assignment
01b,13Aug99,jdg  changed name from vbsa1200 to ixp1200eb
01a,08Apr99,jdg  created from 01d of brutus
*/

/*
 * This module contains the configuration parameters for the Intel
 * ixm1200 board.
 */

#ifndef INCconfigh
#define INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1 1
#define BSP_VERSION "1.2"
#define BSP_REV     "/4"    /* 0 for first revision */

#define IXM_VERSION "2.0 WRS Build"

#include "configAll.h"      /* Set the VxWorks default configuration */

/* First line below indicates host (hdice013) and path of image
   (c:\vxWorks). The parameters that follow are:
   h = Internet address of host (hdice013)
   e = Internet address of target
   tn = Name of target machine
   u = user name used to access host
   pw = password for user
 */
#define DEFAULT_BOOT_LINE \
    "fei(0,0)host:/tor/target/config/ixm1200/vxWorks " \
    "h=90.0.0.3 e=90.0.0.50 u=target tn=targetname"

/*
 * STANDALONE_NET must be defined for network debug with
 * standalone vxWorks
 */
#undef STANDALONE_NET

/* Memory configuration */

/*
 * RESERVED_LOW_MEM_MB is the number of MBytes reserved from low SDRAM.
 * This memory will not be mapped to virtual address 0 and will be used
 * to communicate with the microgengines.
 */

#define RESERVED_LOW_MEM_MB 112  /* Number of MBytes reserved from low SDRAM */
#define RESERVED_LOW_MEM    (0x00100000 * RESERVED_LOW_MEM_MB)

/*
 * LOCAL_MEM_SIZE_ACTUAL is the amount of physical memory present on the board.
 * LOCAL_MEM_SIZE is the amount that VxWorks thinks is on the board, which is
 *   less by the amount RESERVED_LOW_MEM.
 * Note that only LOCAL_MEM_SIZE is mapped to virtual address 0 */

#undef  LOCAL_MEM_AUTOSIZE          /* run-time memory sizing */
#define LOCAL_MEM_SIZE_ACTUAL      0x08000000  /* 128 Mbytes */

#define LOCAL_MEM_SIZE (LOCAL_MEM_SIZE_ACTUAL - RESERVED_LOW_MEM)

#define USER_RESERVED_MEM   0x000000        /* see sysMemTop() */

#ifdef MVR
#define IP_MAX_UNITS 20
#endif

/*
 * Boot ROM is an image written into Flash ROM and started
 * at address 0. Due to the remapping of memory by the MMU, the Flash
 * memory appears at an address of 0x08000000.
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on
 * Makefile. Any changes made here must be made in the Makefile and vice
 * versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM allocated to the VxWorks
 *          image (block size - size of headers - NVRAM allocation)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 *       (uncompressed bootrom)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The boot ROM image starts at an offset of 0 into the n'th block of flash
 * to give the diagnostics and other RTOS's room to live in.
 *
 * So the calculation for ROM_TEXT_ADRS is:
 *                         Virtual      Physical
 *   Address of Flash:     0x08000000   0x00000000
 *   Offset of nth block:  0x00060000   0x00060000
 *   Sum:                  0x08060000   0x00060000
 *
 * Note also that the addresses given here are virtual addresses after
 * the MMU is turned on. The physical addresses will be based on zero.
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile. The build of the bootrom
 * will check that it does not overflow the space allocated.
 */

#define ROM_BASE_ADRS       0x08060000  /* base of writable Flash */
#define ROM_TEXT_ADRS       0x08060000  /* Flash block 4 + hdrsize */

#define ROM_SIZE            0x003A0000  /* size - start (4 Meg Bytes) */

#define ROM_COPY_SIZE       ROM_SIZE
#define ROM_SIZE_TOTAL      ROM_SIZE    /* total size of Flash ROM */

#define RAM_LOW_ADRS        0x00001000  /* VxWorks image entry point */

#define RAM_HIGH_ADRS       0x00600000  /* Entry point of uncompress*/
                                        /* part of ROM image */

#define ROM_VIRT_OFFSET     0x08000000  /* Virtual to Physical offset */
#define FLASH_BASE          ROM_VIRT_OFFSET

#define SRAM_SIZE           0x00400000  /* 4 Meg Bytes */

/* IO_SIZE is size of Asynchronous I/O (MAC) space */
#define IO_SIZE             0x00200000  /* 2 Meg Bytes */

/* Define where FLASH lives when it is jumped to CE1 */
#define ALT_FLASH_BASE      (ROM_BASE_ADRS + ROM_SIZE)
#define ALT_FLASH_SIZE      (ROM_BASE_ADRS + ROM_SIZE - FLASH_BASE)

/* SRAM_COPY_ADDR points to three long-words in SRAM that get overwritten
   when sysToMonitor calls sysToRomInit */
#define SRAM_COPY_ADDR      (SRAM_BASE + 800)

/*
 * Flash/NVRAM memory configuration
 *
 * We use block #1 at the beginning for flash parameters. We use this
 * block because it is smaller than the last block. Each initial block
 * is 8K bytes (two devices give 16K bytes), whereas the latter blocks
 * are 64K bytes each (two devices give 128K bytes).
 *
 * FLASH_SIZE is the size of the whole (writable) Flash block. We only
 * use a part of that.
 */

#define INCLUDE_FLASH       /* include Flash memory support */

#ifdef INCLUDE_FLASH

/*
 * FLASH_ADRS is the virtual address of the block to hold the NV Ram
 * parameters. FLASH_SIZE is the size of that block.
 */
#define FLASH_ADRS      0x08010000     /* address of 3rd small block */
#define FLASH_SIZE      0x00010000     /* size of block */
#define NV_RAM_SIZE     (2*0x100)   /* how much we reserve.. */
                /* 0x100 sectors in each of two 16 bit parts */
#define FLASH_NV_RAM_OFFSET (FLASH_SIZE - NV_RAM_SIZE)
                /* offset from start of Flash to NVRAM bit */
#undef  NV_BOOT_OFFSET
#define NV_BOOT_OFFSET      0       /* bootline at start of NVRAM */
#undef FLASH_NO_OVERLAY             /* read-modify-write all of Flash block */
#else
#define NV_RAM_SIZE     NONE
#endif /* INCLUDE_FLASH */

/* Serial port configuration */

#define INCLUDE_SERIAL
#undef	NUM_TTY
#define NUM_TTY 1		/* there is only one UART */

/*
 * Cache/MMU configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 *
 * INCLUDE_CACHE_SUPPORT will be defined by default in configAll.h, and
 * as a consequence, INCLUDE_MMU_BASIC will also be defined (via
 * usrDepend.c) when compiling usrConfig.c. However, we need it defined
 * in here so that it will be seen in sysLib.c. If VxVMI is required,
 * replace this with INCLUDE_MMU_FULL.
 */

#define INCLUDE_MMU_BASIC

/*
 * A call to sysHwInit0() is needed from within usrInit before
 * cacheLibInit() is called.
 */

#ifndef _ASMLANGUAGE
IMPORT void sysHwInit0 ();
#endif
#define INCLUDE_SYS_HW_INIT_0
#define SYS_HW_INIT_0 sysHwInit0

/* StrongARM I-cache mode is a bit of an inappropriate concept, but use this */

#undef  USER_I_CACHE_MODE
#define USER_I_CACHE_MODE       CACHE_WRITETHROUGH

/* StrongARM has to be this, as it does not support writethrough */

#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE       CACHE_COPYBACK

/* Network driver configuration */

#undef  INCLUDE_DEC21X40END     /* include new PCI-based DEC 21x4x END ethernet */
#define INCLUDE_FEI82557END     /* include new PCI_based Intel 82559 END ethernet */

/* De-select unused (default) network drivers selected in configAll.h */

#undef  INCLUDE_ENP     /* include CMC Ethernet interface*/
#undef  INCLUDE_EX      /* include Excelan Ethernet interface */
#undef  INCLUDE_SM_NET      /* include backplane net interface */
#undef  INCLUDE_SM_SEQ_ADDR /* shared memory network auto address setup */

/* Enhanced Network Driver (END) support: required if using DEC END driver */

#if defined(INCLUDE_DEC21X40END) || defined(INCLUDE_FEI82557END)
#define INCLUDE_END
#endif

/* PCI configuration */

#define INCLUDE_PCI
#define AUTO_PCI_CONFIG    /* automatically scan PCI bus and assign addresses */
#define INCLUDE_AUTO_PCI_CONFIG_SHOW_ROUTINE

/*
 * Interrupt mode - interrupts can be in either preemptive or non-preemptive
 * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL
 * The IXM1200 only supports non-preemptive mode
 */

#define INT_MODE    INT_NON_PREEMPT_MODEL

/*
 * Define default 21555 bridge settings
 */
#define DEF21555_US_WINDOW_SIZE (1 * 1024 * 1024)
#define DEF21555_DS_WINDOW_SIZE (4 * 1024)
#define DEF21555_DS_WINDOW_OFFSET (RESERVED_LOW_MEM - (4 * 1024))

/*
 * miscellaneous definitions
 * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h
 * (as is more usual) because the stack size depends on the interrupt
 * structure of the BSP.
 */

#define ISR_STACK_SIZE  0x800   /* size of ISR stack, in bytes */

/* Optional timestamp support */

#define  INCLUDE_TIMESTAMP      /* to include timestamp driver */

/*
 * Define private boot flags
 */

#if 0
#define BOOT_DONT_INIT_PCI   (1 << 30)
#else
#define BOOT_DONT_INIT_PCI   0
#endif
#define BOOT_DONT_INIT_HPC   (1 << 29)

/*
 * The following section configures the build for the types being
 * built/distributed by Intel. There are three versions based on whether
 * the following symbols are defined:
 *  SERIAL_PORT_VERSION : use serial port for tornado communication
 *  HPC_VERSION         : use HPC
 *
 *  H_V  S_P_V  console  tornado   HPC       comments
 *   0     0     9600    ethernet  disabled  typically bootromu.ful or vxWorks
 *   0     1    19200    serial    enabled   typically rom.ful
 *   1     0      HPC    HPC       enabled   typically bootromu.ful or vxWorks
 */

#ifndef SERIAL_PORT_VERSION
#define SERIAL_PORT_VERSION 0
#endif

#ifndef HPC_VERSION
#define HPC_VERSION 0
#endif

#if HPC_VERSION
#define INCLUDE_HPC
#define INCLUDE_HPC_SERIAL
#define N_HPC_SERIAL_CHANNELS 2
#define FIRST_HPC_SERIAL_CHANNEL 2
#define INCLUDE_HPCFS
#define HPCFS_CHANNEL 1
#endif

#if SERIAL_PORT_VERSION
#define INCLUDE_HPC
#endif

#ifndef INCLUDE_HPC
# define INCLUDE_HPC
#endif

#if SERIAL_PORT_VERSION

# undef WDB_COMM_TYPE
# undef WDB_TTY_CHANNEL
# define WDB_COMM_TYPE WDB_COMM_SERIAL
# if HPC_VERSION
#  define WDB_TTY_CHANNEL 1
# else /* HPC_VERSION */
#  define WDB_TTY_CHANNEL 0
# endif /* HPC_VERSION */

#else /* SERIAL_PORT_VERSION */

# if HPC_VERSION
#  undef WDB_COMM_TYPE
#  undef WDB_TTY_CHANNEL
#  define WDB_COMM_TYPE WDB_COMM_SERIAL
#  define WDB_TTY_CHANNEL 1
# endif /* HPC_VERSION */

#endif /* SERIAL_PORT_VERSION */

#if SERIAL_PORT_VERSION || HPC_VERSION
#undef INCLUDE_DC
#undef INCLUDE_DEC21X40END
#undef INCLUDE_NET_INIT
#undef INCLUDE_END
#undef INCLUDE_FEI82557END
#undef INCLUDE_BSD
#else
#ifndef INCLUDE_SHOW_ROUTINES
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_NET_SHOW
#endif
#endif

/* Reset baud rate always to 38400 */
# undef CONSOLE_BAUD_RATE
# undef WDB_TTY_BAUD
# define CONSOLE_BAUD_RATE 38400
# define WDB_TTY_BAUD 38400

#if HPC_VERSION
# undef CONSOLE_TTY
# define CONSOLE_TTY 1
# undef NUM_TTY
# define NUM_TTY 2
#endif /* HPC_VERSION */

#if HPC_VERSION && !SERIAL_PORT_VERSION
#define INCLUDE_HPCFS_BOOT
#endif

/*
 * End Standard Configurations
 */

#define INCLUDE_CPLUS
#define INCLUDE_CPLUS_IOSTREAMS

/*
 * Used for MVR application
 */
#ifdef MVR
#define INCLUDE_CPLUS_IOSTREAMS_FULL
#define INCLUDE_CPLUS_STRING
#define INCLUDE_CPLUS_STRING_IO
#define INCLUDE_POSIX_ALL
#define INCLUDE_ARP_API
#define INCLUDE_PING
#endif MVR

#define INCLUDE_RPC

#define INCLUDE_FLASH_UTILS

/* The following defines page table entries for the alternate
   flash location (chip-enable 1). This is as a convenience
   when reprogramming the flash when booting from NetRom. In
   a real product, this should be removed. */
#define INCLUDE_ALT_FLASH

/* The following defines page table entries for part of PCI Memory space */
#define INCLUDE_EXTRA_PCI_MAPPING

#include "ixm1200.h"

#ifdef INCLUDE_USER_APPL

#define USER_APPL_INIT		\
	{			\
	int NetApp_GigInit();	\
				\
	NetApp_GigInit();	\
	}
#endif

#ifdef __cplusplus
}
#endif

#endif  /* INCconfigh */

#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif