target.txt

vxworks的BSP开发配置文件

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                                                  BSP Reference : ixm1200

IXM1200

NAME

     IXM1200 - Intel IXM1200

INTRODUCTION

     This reference entry provides board-specific information necessary
     to run VxWorks for the IXM1200 Network Processor Base Card
     (IXM1200). Before using a board with VxWorks, verify that the
     board runs in the factory configuration using vendor-supplied
     firmware and jumper settings and checking the RS-232 and ethernet
     connections.

Boot ROMs

     The IXM1200 board uses one VxWorks boot ROMs (actually one 16-bit
     wide Intel TE28F320C3B90 Flash memory devices). Install it in
     U23, with pin-1 nearer to the NetROM connector. For further
     information, see the section "ROM Considerations" below.

     The BSP does not have non-volatile RAM; however it uses part of
     the Flash memory to save boot parameters. Thus boot parameters
     are preserved whenever the system is powered off.

     To load VxWorks and for more information, follow the instructions
     in the Tornado User's Guide: Getting Started.

Board/Chip revisions

     This document describes the production revision of the board.

Jumpers

     The following switches are relevant to VxWorks configuration.

      IXM1200

      Switch Function  Description
      ----------------------------------------------------------------
      SW1    Reset     Push to reset
      SW2    GPIO 0    General Purpose I/O: Boot OS: ON=1 (1)
      SW2    GPIO 1    General Purpose I/O: Boot OS: ON=1 (1)
      SW2    GPIO 2    General Purpose I/O: ON=1
      SW2    GPIO 3    General Purpose I/O: Flash Mode: ON=1 (should
                       be 1 = 16-bit mode)
      SW2    FL/~NR    Boot Mode: ON=Flash, OFF=NetROM

     For details of jumper configuration, see the board diagram at the
     end of this entry and in the hardware manual.

     (1) GPIO[1:0] determine which operating system is booted after
     reset. Valid configurations are:

      Boot Options

      GPIO[1:0]   OS
      -------------------------
      00          Diagnostics
      01          Cygmon
      10          VxWorks
      11          Boot Manager

     For more details, see the Section "ROM considerations".

FEATURES

     The IXM1200 is the base card for Intel's IXM1200 network
     processor. This provides an interface between the IXM1200, SDRAM,
     SRAM, Flash ROM, Octal MAC, and a bridge to the primary PCI bus.
     It also provides DMA controllers, timers, a serial port (UART),
     and a PCI Bus arbiter.

     The IXM1200 processor features six independent programming
     MicroEngines for network data processing, and an F-Bus Interface.

     The board supports 128 megabytes of SDRAM, 4 megabytes of SRAM,
     and 4 megabytes of Flash ROM.

SUPPORTED FEATURES

     The BSP is configured by default to configure the secondary PCI
     bus.

RAM size

     The BSP supports the default configuration of 128 MB SDRAM. Of
     this, the upper 16 MB are remapped to virtual address 0 and are
     available for use by VxWorks. The lower 112 MB are mapped to
     0xC0000000 and are uncached. This may be changed by modifying the
     BSP. For more details, see the "Cache/MMU considerations" section
     below.

     The BSP supports 4 MB of SRAM, although this is not included in
     the VxWorks memory pool. Use of this memory must be managed by
     application specific code.

Flash Memory

     A driver is provided supporting access to the Flash memory and
     the use of a section of it as NVRAM.

     The Flash may be updated using the Flash Utility (available
     through the boot manager) and the host program FUTIL.EXE.

Timers

     The BSP uses hardware timers 2 and 3. Timers 1 and 4 are
     available to application code.

NetROM Support

     The BSP supports the use of NetROM in place of Flash memory.

Unsupported Features

     No support is provided for the Real Time Clock. No use is made of
     the following features, although there should be no reason why
     they cannot be used:
         DMA Controllers,
         I20 Message unit,
         timers 1 and 4

     The BSP provides no support for use of the MicroEngines or F-Bus
     Interface. This support is provided through application
     libraries.

HARDWARE DETAILS

Devices

     The device drivers included are:

         1xm1200Timer.c - IXM1200 timer driver
         ixm1200Sio.c - IXM1200 UART serial driver
         ixm1200IntrCtl.c - IXM1200 interrupt controller driver
         flashMem.c - Flash memory (including 28F800) driver
         nullNvRam.c - NVRAM-to-Flash memory library
         pciIomapLib.c - PCI driver
         pciIomapShow.c - PCI Show routines
         sysEnd.c - Ethernet driver
         21555drv.c - Initialize 21555 Non-transparent bridge

     See the manual entry for ixm1200Sio.c.

Shared Memory

     This BSP has not been tested with shared memory.  There is no
     support provided for the use of the PCI mailbox/doorbell
     features, and there is no BSP-specific support for test-and-set
     primitives.  The vxTas( ) primitive is provided in the
     architecture-specific code to allow access to the ARM SWPB
     instruction.  For further information, see the vxTas( ) man entry.

Interrupts

     This BSP only supports non-preemptive interrupt processing.  So
     effectively there is only 1 interrupt level. 32 Interrupt vectors
     are provided:
      0  reserved_00
      1  SI          Soft interrupt
      2  reserved_02
      3  reserved_03
      4  T1          Timer 1
      5  T2          Timer 2
      6  T3          Timer 3
      7  T4          Timer 4
      8  reserved_08
      9  CINT        CINT pin (IRQ)
      10 UENG        Microengine (IRQ)
      11 SRAM        SRAM unit (IRQ)
      12 UART        UART unit (IRQ)
      13 SDRAM       SDRAM unit (IRQ)
      14 RTC         Real Time Clock: Currently Unused
      15 DFH         Doorbell from host
      16 DMA1        DMA channel 1
      17 DMA2        DMA channel 2
      18 PIL         pci_irq_l
      19 reserved_19
      20 DMA1NB      DMA1 not busy
      21 DMA2NB      DMA2 not busy
      22 SB          Start BIST
      23 RSERR       Received SERR
      24 SDPAR       SDRAM parity
      25 IIP         I20 inbound post_list
      26 reserved_26
      27 DTE         Discard Timer Expired
      28 DPED        Data Parity Error Detected
      29 RMA         Received Master Abort
      30 RTA         Received Target Abort
      31 DPE         Detect Parity Error

     Only interrupt vectors 5, 6, 12, and 18 are used by default in
     this BSP.

     Interrupt connection, enabling, and disabling are performed using
     the standard intArchLib routines. Interrupts 9 through 14
     (inclusive) cannot be enabled or disabled using the standard
     routines. These must be enabled or disabled by writing to the
     appropriate control register directly. The interrupt controller
     driver is provided in ixm1200IntrCtl.c.

Serial Configuration

     There is one serial port on the board.  This connector is located
     on the bulkhead (edge of the card away from the PCI connector).
     The port is "data leads only", that is, there are no handshake
     lines provided at all. The default configuration is 9600 baud, 8
     data bits, no parity, 1 stop bit.

SCSI Configuration

     This BSP does not support SCSI.

Network Configuration

     A network interface is provided by an Intel 82559 Ethernet
     controller on the secondary PCI bus. The interface is called
     "eeE" and should be specified as the boot device to the boot
     ROMs. The Ethernet MAC address is read from the PCI card.

VME Access

     The board is a PCI board.  VME is not supported.

PCI Access

     The configuration access method is via accesses to areas in the
     memory map that IXM1200 maps onto Type 0 and Type 1
     configurations.  By default, the SDRAM memory is mapped to PCI
     memory address 0, so that virtual address 0 is mapped to PCI
     memory address 24 MB.  See section "Cache/MMU considerations" for
     more details.

Boot Devices

     By default, VxWorks is booted on this board by running the
     bootrom image from Flash memory, and then loading the VxWorks
     kernel via the network driver.