ccmul.vhd

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library lpm;
use lpm.lpm_components.all;

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity ccmul is
    generic(w2:integer:=17;       --乘法数位宽
            w1:integer:=9;        --c+s和的位宽
            w:integer:=8);        --输入位宽
    port(clk:std_logic;           --输出寄存器的时钟
         x_in,y_in,c_in:in std_logic_vector(w-1 downto 0);
         cps_in,cms_in:in std_logic_vector(w1-1 downto 0);
         r_out,i_out:out std_logic_vector(w-1 downto 0));
end ccmul;

architecture rotate of ccmul is
    signal x,y,c:std_logic_vector(w-1 downto 0);
    signal r,i,cmsy,cpsx,xmyc:std_logic_vector(w2-1 downto 0);
    signal xmy,cps,cms,sxtx,sxty:std_logic_vector(w1-1 downto 0);--x-y结果
    
begin
   x<=x_in;
   y<=y_in;      --j*y
   c<=c_in;	 --cos
   cps<=cps_in;  --cos+sin
   cms<=cms_in;  --cos-sin
process
   begin
     wait until clk='1';
     r_out<=r(w2-3 downto w-1);   --缩放和触发
     i_out<=i(w2-3 downto w-1);   --输出
end process;

     sxtx<=x(x'high) & x;
     sxty<=y(y'high) & y;
     
  sub_1:lpm_add_sub		   -- x-y
      generic map(lpm_width=>w1,
 		     lpm_direction=>"sub",
                     lpm_representation=>"signed")
         port map(dataa=>sxtx,
 		  datab=>sxty,
		  result=>xmy);
  mul_1:lpm_mult		 --xmyc=(x-y)*c
        generic map(lpm_widtha=>w1,
 		    lpm_widthb=>w,
		    lpm_widthp=>w2,
		    lpm_widths=>w2,
                    lpm_representation=>"signed")
         port map(dataa=>xmy,
 		  datab=>c,
		  result=>xmyc);
   
    mul_2:lpm_mult		 --cmsy=(c-s)*y
        generic map(lpm_widtha=>w1,
 		    lpm_widthb=>w,
		    lpm_widthp=>w2,
		    lpm_widths=>w2,
                    lpm_representation=>"signed")
         port map(dataa=>cms,
 		  datab=>y,
		  result=>cmsy);
    
    mul_3:lpm_mult		 --cpsx=(c+s)*cpsx
        generic map(lpm_widtha=>w1,
 		    lpm_widthb=>w,
		    lpm_widthp=>w2,
		    lpm_widths=>w2,
                    lpm_representation=>"signed")
         port map(dataa=>cps,
 		  datab=>x,
		  result=>cpsx);

   sub_2:lpm_add_sub		   -- i=(c-s)*x-(x-y)*c
      generic map(lpm_width=>w2,
 		     lpm_direction=>"sub",
                     lpm_representation=>"signed")
         port map(dataa=>cpsx,
 		  datab=>xmyc,
		  result=>i);

    add_1:lpm_add_sub		   -- r=(x-y)*c+(c-s)*y
      generic map(lpm_width=>w2,
 		     lpm_direction=>"add",
                     lpm_representation=>"signed")
         port map(dataa=>cmsy,
 		  datab=>xmyc,
		  result=>r);

end rotate;