📄 hdsdi_autodetect_ln.vhd
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--------------------------------------------------------------------------------
-- Copyright (c) 2004 Xilinx, Inc.
-- All Rights Reserved
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ / Vendor: Xilinx
-- \ \ \/ Author: John F. Snow, Advanced Product Division, Xilinx, Inc.
-- \ \ Filename: $RCSfile: hdsdi_autodetect_ln.vhd,rcs $
-- / / Date Last Modified: $Date: 2005-06-23 13:11:36-06 $
-- /___/ /\ Date Created: May 21, 2004
-- \ \ / \
-- \___\/\___\
--
--
-- Revision History:
-- $Log: hdsdi_autodetect_ln.vhd,rcs $
-- Revision 1.6 2005-06-23 13:11:36-06 jsnow
-- Code cleanup.
--
-- Revision 1.5 2005-04-27 15:43:47-06 jsnow
-- Added support for detecting 720p 50Hz.
--
-- Revision 1.4 2004-10-20 11:25:03-06 jsnow
-- Code cleanup.
--
--------------------------------------------------------------------------------
--
-- XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
-- AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
-- SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
-- OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
-- APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
-- THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
-- AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
-- FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
-- WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
-- IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
-- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
-- INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-- FOR A PARTICULAR PURPOSE.
--
--------------------------------------------------------------------------------
--
-- This module will examine a HD video stream and detect the video standard. It
-- detects any of the 13 video standards currently supported by HD-SDI (SMPTE
-- 260M, SMPTE 295M, SMPTE 274M, and SMPTE 296M) plus the 1080sF video formats
-- described in SMPTE RP 211. This version of the module also supports the
-- 720p 50Hz format.
--
-- The module counts words and lines to determine the video standard. It does
-- not depend on the inclusion of ANC packets identifying the video standard.
--
-- This module also produces a line number value indicating the current line
-- number. This line number value changes on the rising edge of clock following
-- the XYZ word of the EAV so that is valid for insertion into the LN field of
-- an HD-SDI stream.
--
-- The module requires as input only one of the channels of the video stream,
-- either Y or C. It also requires as input the decoded signals eav and sav
-- from the hdsdi_trs_decode module.
--
-- Normally, when the input video standard changes, this module will wait for
-- some number of video frames (determine by MAX_ERRCNT) before beginning the
-- process of identifying and locking to the new video format. This is to
-- prevent a few errors in the video from causing the module to lose lock.
-- However, it also increases the latency for the module to lock to a new
-- standard when the input video standard is deliberately changed. If some logic
-- external to this module knows that a deliberate input video standard change
-- has been done, it can assert this module's reacquire input for one clock
-- cycle to force the module to immediately begin the process of identifying
-- and locking to the new video standard.
--
-- The module generates the following outputs:
--
-- locked: Indicates when the module has locked to the incoming video standard.
-- The std and ln outputs are only valid when locked is a 1.
--
-- std: A 4-bit code indicating which video standard has been detected encoded
-- as follows:
--
-- 0000: SMPTE 260M 1035i 30Hz
-- 0001: SMPTE 295M 1080i 25Hz
-- 0010: SMPTE 274M 1080i or 1080sF 30Hz
-- 0011: SMPTE 274M 1080i or 1080sF 25Hz
-- 0100: SMPTE 274M 1080p 30Hz
-- 0101: SMPTE 274M 1080p 25Hz
-- 0110: SMPTE 274M 1080p 24Hz
-- 0111: SMPTE 296M 720p 60Hz
-- 1000: SMPTE 274M 1080sF 24Hz
-- 1001: SMPTE 296M 720p 50Hz
--
-- ln: An 11-bit line number code indicating the current line number. This code
-- changes on the rising edge of the clock when both xyz and eav are asserted.
-- This allows the ln code to be available just in time for encoding and
-- insertion into the two words that immediately follow the EAV. However, care
-- must be taken to insure that this path meets timing.
--
-- ln_valid: Asserted whenever the locked output is asserted and the line number
-- generator has started generating valid line numbers.
--
-- Note that the std code does not distinguish between the /1 and /M video
-- standards. So, the code 0010 can represent either a true 30Hz signal or
-- 30Hz/M. Also note that this module is unable to distinguish between the SMPTE
-- 274M 1080i standards and the corresponding 1080sF standards since they both
-- have exactly the same video format in terms of number of lines per frame and
-- words per line.
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
use work.hdsdi_pkg.all;
entity hdsdi_autodetect_ln is
port (
clk: in std_logic; -- clock input
rst: in std_logic; -- async reset input
ce: in std_logic; -- clock enable input
vid_in: in std_logic_vector(8 downto 7); -- C or Y channel video input (bits 8:7 only)
eav: in std_logic; -- XYZ word of EAV
sav: in std_logic; -- XYZ word of SAV
reacquire: in std_logic; -- force module to require new format
std: out hd_vidstd_type; -- video format code
locked: out std_logic; -- asserted when locked to video
ln: out hd_vpos_type; -- line number output
ln_valid: out std_logic -- asserted when ln is valid
);
end hdsdi_autodetect_ln;
architecture synth of hdsdi_autodetect_ln is
-------------------------------------------------------------------------------
-- Constant definitions
--
--
-- State machine state assignments
--
constant STATE_WIDTH : integer := 4;
constant STATE_MSB : integer := STATE_WIDTH - 1;
subtype state is std_logic_vector(STATE_MSB downto 0);
constant ACQ0 : state := "0000";
constant ACQ1 : state := "0001";
constant ACQ2 : state := "0010";
constant ACQ3 : state := "0011";
constant ACQ4 : state := "0100";
constant LCK0 : state := "0101";
constant LCK1 : state := "0110";
constant LCK2 : state := "0111";
constant LCK3 : state := "1000";
constant ERR : state := "1001";
--
-- The MAX_ERRCNT constant indicates the maximum number of consecutive frames
-- that do not match the currently locked standard's parameters. If MAX_ERRCNT
-- is exceeded the locked signal will be negated and the state machine will
-- attempt to match the new video standard.
--
-- Increasing the MAX_ERRCNT value improves the tolerance to errors in the
-- video stream. However, it also increases the latency for the module to
-- lock to a new standard when the input standard changes. If some external
-- logic knows that the input video standard has changed, the state machine
-- can be forced to reacquire the new standard more quickly by asserted the
-- reacquire input for one clock cycle. This forces the state machine to start
-- the process of identifying the new standard without having to wait for
-- it to reach the MAX_ERRCNT number of errored frames before starting this
-- process.
--
constant ERRCNT_WIDTH : integer := 3;
constant ERRCNT_MSB : integer := ERRCNT_WIDTH - 1;
constant MAX_ERRCNT : std_logic_vector(ERRCNT_MSB downto 0) := "010";
--
-- The loops counter is an internal 4-bit counter used by the FSM to sequence
-- through the various video formats, looking for matches.
--
constant LOOPS_WIDTH : integer := 4;
constant LOOPS_MSB : integer := LOOPS_WIDTH - 1;
-------------------------------------------------------------------------------
-- Signal definitions
--
signal std_int : hd_vidstd_type; -- internal video std output code
signal word_counter : hd_hpos_type; -- counts words per line
signal trs_to_counter : hd_hpos_type; -- TRS timeout counter
signal trs_tc : hd_hpos_type; -- terminal count for trs_to_counter
signal line_counter : hd_vpos_type; -- counts lines per field or frame
signal line_tc : hd_vpos_type; -- terminal count for line counter
signal current_state : state; -- FSM current state
signal next_state : state; -- FSM next state
signal en_wcnt : std_logic; -- enables word counter
signal en_lcnt : std_logic; -- enables line counter
signal clr_wcnt : std_logic; -- clears word counter
signal clr_lcnt : std_logic; -- clears line counter
signal set_locked : std_logic; -- asserts the locked signal
signal clr_locked : std_logic; -- clears the locked signal
signal clr_errcnt : std_logic; -- clears the error counter
signal inc_errcnt : std_logic; -- increments the error counter
signal loops : std_logic_vector(LOOPS_MSB downto 0);
-- iteration loop counter used by FSM
signal clr_loops : std_logic; -- clears loop counter
signal inc_loops : std_logic; -- increments loop counter
signal loops_tc : std_logic; -- asserted when loop counter equals 8
signal ld_std : std_logic; -- load std register
signal errcnt : std_logic_vector(ERRCNT_MSB downto 0);
-- error counter
signal maxerrs : std_logic; -- asserted when error counter reaches max allowed
signal match : std_logic; -- asserted when video standard match is found
signal match_words : std_logic; -- word counter matches video standard
signal match_lines : std_logic; -- line counter matches video standard
signal compare_sel : std_logic; -- controls comparator input MUX
signal cmp_mux : hd_vidstd_type; -- comparator input MUX
signal cmp_wcnt : hd_hpos_type; -- word count comparison value
signal cmp_lcnt : hd_vpos_type; -- line count comparison value
signal first_act : std_logic; -- asserted on first active line
signal last_v : std_logic; -- registered version of V bit from last line
signal v : std_logic; -- vertical blanking interval indicator (V bit)
signal f : std_logic; -- field indicator (F bit)
signal trs_timeout : std_logic; -- timed out waiting for TRS
signal first_timeout : std_logic; -- timed out waiting for first line
signal timeout : std_logic; -- timeout condition
signal locked_q : std_logic; -- locked flip-flop
signal ln_valid_q : std_logic; -- ln_valid flip-flop
signal reset_delay : std_logic_vector(7 downto 0);
-- delay register for reset signal
signal reset : std_logic; -- module reset
signal ln_counter : hd_vpos_type; -- counter for the ln generator
signal ln_init : hd_vpos_type; -- init value for the counter
signal ln_max : hd_vpos_type; -- max ln value for the current std
signal ln_tc : std_logic; -- asserted when ln_counter = ln_max
signal ln_load : std_logic; -- loads the ln_counter with ln_init
signal std_reg : hd_vidstd_type; -- holds internal copy of std for ln generation logic
signal reacquire_sync : std_logic; -- sync register for reacquire
signal reacquire_q : std_logic; -- sync register for reacquire
begin
--
-- reacquire synchronizer
--
-- Since reacquire is a direct input to the FSM from parts unknown, make sure
-- it is synchronous to the local clock before feeding it to the state machine.
--
process(clk, reset)
begin
if reset = '1' then
reacquire_q <= '0';
elsif clk'event and clk = '1' then
if ce = '1' then
reacquire_q <= reacquire;
end if;
end if;
end process;
process(clk, reset)
begin
if reset = '1' then
reacquire_sync <= '0';
elsif clk'event and clk = '1' then
if ce = '1' then
reacquire_sync <= reacquire_q;
end if;
end if;
end process;
--
-- word counter
--
-- The word counter counts the number of words detected during a video line.
--
process(clk, reset)
begin
if reset = '1' then
word_counter <= (others => '0');
elsif clk'event and clk = '1' then
if ce = '1' then
if clr_wcnt = '1' then
word_counter <= (others => '0');
elsif en_wcnt = '1' then
word_counter <= word_counter + 1;
end if;
end if;
end if;
end process;
--
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