multigenhd_output.v

SDI接口的源程序,包括扰码编码,并串转换,用VHDL硬件描述语言编写

//------------------------------------------------------------------------------ 
// Copyright (c) 2005 Xilinx, Inc. 
// All Rights Reserved 
//------------------------------------------------------------------------------ 
//   ____  ____ 
//  /   /\/   / 
// /___/  \  /   Vendor: Xilinx 
// \   \   \/    Author: John F. Snow, Advanced Product Division, Xilinx, Inc.
//  \   \        Filename: $RCSfile: multigenHD_output.v,rcs $
//  /   /        Date Last Modified:  $Date: 2005-01-05 10:23:52-07 $
// /___/   /\    Date Created: Jan 5, 2005 
// \   \  /  \ 
//  \___\/\___\ 
// 
//
// Revision History: 
// $Log: multigenHD_output.v,rcs $
// Revision 1.1  2005-01-05 10:23:52-07  jsnow
// Header update.
//
//------------------------------------------------------------------------------ 
//
//     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
//     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
//     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
//     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
//     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
//     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
//     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
//     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
//     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
//     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
//     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
//     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
//     FOR A PARTICULAR PURPOSE.
//
//------------------------------------------------------------------------------ 
/*
This module contains the output section of the HD video pattern generator. A
block RAM is used to convert the vertical and horizontal coordinates of the
video pattern into Y and C output values.

A Y-Ramp generator is used to create the Y-Ramp pattern for RP 219.      
*/

module multigenHD_output (
    input   wire        clk,            // word-rate clock
    input   wire        rst,            // async reset
    input   wire        ce,             // clock enable
    input   wire [4:0]  h_region,       // horizontal region
    input   wire [2:0]  v_band,         // vertical band
    input   wire        h_counter_lsb,  // LSB of horizontal counter
    input   wire        y_ramp_inc_sel, // controls the Y-Ramp increment MUX
    output  wire [9:0]  y,              // luma output channel
    output  wire [9:0]  c               // chroma output channel
);

//-----------------------------------------------------------------------------
// Parameter definitions
//

//
// This group of parameters defines the bit widths of various fields in the
// module. Note that if the VID_WIDTH parameter is changed, the video component
// values for the various colors will need to be modified accordingly.
//
parameter VID_WIDTH     = 10;                   // Width of video components
parameter HRGN_WIDTH    = 5;                    // Width of h_region counter
parameter VBAND_WIDTH   = 3;                    // Width of vband code
parameter YRAMP_FRAC    = 7;                    // Number of fractional bits in Y Ramp reg
parameter YRAMP_WIDTH   = VID_WIDTH + YRAMP_FRAC;// Width of Y Ramp reg

parameter VID_MSB       = VID_WIDTH - 1;        // MS bit # of video data path
parameter HRGN_MSB      = HRGN_WIDTH - 1;       // MS bit # of h_region counter
parameter VBAND_MSB     = VBAND_WIDTH - 1;      // MS bit # of vband code
parameter YRAMP_MSB     = YRAMP_WIDTH - 1;      // MS bit # of y_ramp register


//
// Y-ramp parameters
//
// These constants control the Y-Ramp pattern generation.
//
parameter YRAMP_INIT    = 17'b0000111111_1100000;   // 63.75 is initial Y ramp starting value
parameter Y_INC_1920    = 8'b0_1011011;             // 0.7109375 is ramp increment for 1920 wide standards
parameter Y_INC_1280    = 8'b1_0001001;             // 1.0703125 is ramp increment for 1280 wide standards
parameter YRAMP_RND     = 17'b0000000000_1000000;   // 0.5 is the round up increment value for rounder


//-----------------------------------------------------------------------------
// Signal definitions
//

wire                    y_ramp_reload;  // reloads the y_ramp reg
wire                    y_ramp_en;      // enables output of the y_ramp reg
reg     [YRAMP_MSB:0]   y_ramp;         // Y ramp register
wire    [YRAMP_MSB:0]   y_ramp_round;   // Y ramp rounder
wire    [VID_MSB:0]     y_ramp_out;     // rounded output of Y ramp reg
wire    [YRAMP_MSB:0]   y_ramp_inc;     // output of Y ramp increment MUX
wire    [31:0]          crom_out;       // CROM output
wire    [VID_MSB:0]     y_rom;          // Y output of color ROM
wire    [VID_MSB:0]     c_rom;          // C output of color ROM
wire    [VID_MSB:0]     y_ramp_mux;     // output of Y ramp mux
wire    [31:0]          GND32 = 32'b0000_0000_0000_0000_0000_0000_0000_0000;
wire    [3:0]           GND4 =  4'b0000;

    
//----------------------------------------------------------------------------
// Color ROM
//

// Simulation initialization code CROM
// Created by multigenHD_romgen.v
// Video format mapping:
//   000 =  SMPTE 295M - 1080i  25Hz (1250 lines/frame)
//   001 =  SMPTE 274M - 1080sF 24Hz & 23.98Hz         
//   002 =  SMPTE 274M - 1080i  30Hz & 29.97 Hz        
//   003 =  SMPTE 274M - 1080i  25Hz                   
//   004 =  SMPTE 274M - 1080p  30Hz & 29.97Hz         
//   005 =  SMPTE 274M - 1080p  25Hz                   
//   006 =  SMPTE 274M - 1080p  24Hz & 23.98Hz         
//   007 =  SMPTE 296M - 720p   60Hz & 59.94Hz         
//synthesis translate_off
defparam
CROM.INIT = 36'h000800100,
CROM.SRVAL = 36'h000800100,
CROM.WRITE_MODE = "READ_FIRST",
CROM.INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_03 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_04 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_05 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_06 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INITP_07 = 256'h0000000000000000000000000000000000000000000000000000000000000000,
CROM.INIT_00 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_01 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_02 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_03 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_04 = 256'h0000000000FFCFFC008001000080010000B60B60000000000000000000FFCFFC,
CROM.INIT_05 = 256'h00EC0EC0000000000080010000800100008001000080010000AB0AB000000000,
CROM.INIT_06 = 256'h00F10F1000000000008001000080010000800100008001000080010000800100,
CROM.INIT_07 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_08 = 256'h0087CA88002C0A880087CA88002C0A8800800B4400800B440080067800800678,
CROM.INIT_09 = 256'h00CC43EC00C0C3EC0033C858003F48580033C858003F4858002C091400934914,
CROM.INIT_0A = 256'h00D40330006CC33000D40330006CC33000CC43EC00C0C3EC00CC43EC00C0C3EC,
CROM.INIT_0B = 256'h00800678008006780080067800800678007841BC00D401BC00D40330006CC330,
CROM.INIT_0C = 256'h0000000000FFCFFC0080010000800100009D09D0000000000000000000FFCFFC,
CROM.INIT_0D = 256'h00C70C7000000000008001000080010000800100008001000080080000000000,
CROM.INIT_0E = 256'h00DA0DA00000000000800B4400800B4400800B4400800B4400800B4400800B44,
CROM.INIT_0F = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_10 = 256'h00800B4400800B4400800B4400800B4400800B4400800B4400100BC80099CBC8,
CROM.INIT_11 = 256'h00800B4400800B4400800B4400800B4400800B4400800B4400800B4400800B44,
CROM.INIT_12 = 256'h00800B4400800B4400800B4400800B4400800B4400800B4400800B4400800B44,
CROM.INIT_13 = 256'h0075C1FC00F001FC0075C1FC00F001FC00800B4400800B4400800B4400800B44,
CROM.INIT_14 = 256'h0000000000FFCFFC0080010000800100009D09D0000000000000000000FFCFFC,
CROM.INIT_15 = 256'h00C70C7000000000008001000080010000800100008001000080080000000000,
CROM.INIT_16 = 256'h00DA0DA0000000000062C3D0009903D0009D43D4006703D400800EB000800EB0,
CROM.INIT_17 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_18 = 256'h00800EB200800EB200800EB200800EB20080010100800101008A4DB400100DB4,
CROM.INIT_19 = 256'h00800EB200800EB200800EB200800EB200800EB200800EB200800EB200800EB2,
CROM.INIT_1A = 256'h00800EB200800EB200800EB200800EB200800EB200800EB200800EB200800EB2,
CROM.INIT_1B = 256'h00F003E8006643E800F003E8006643E800800EB200800EB200800EB200800EB2,
CROM.INIT_1C = 256'h0000000000FFCFFC0080010000800100009D09D0000000000000000000FFCFFC,
CROM.INIT_1D = 256'h00C70C7000000000008001000080010000800100008001000080080000000000,
CROM.INIT_1E = 256'h00DA0DA0000000000097823500AE423500800101008001010080010100800101,
CROM.INIT_1F = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_20 = 256'h00800EB000800EB0008001000080010000800100008001000080030C0080030C,
CROM.INIT_21 = 256'h0080010000800100008001000080010000800EB000800EB000800EB000800EB0,
CROM.INIT_22 = 256'h008001000080010000800148008001480080010000800100008000B8008000B8,
CROM.INIT_23 = 256'h0080030C0080030C0080030C0080030C00800100008001000080018C0080018C,
CROM.INIT_24 = 256'h0000000000FFCFFC0080010000800100009D09D0000000000000000000FFCFFC,
CROM.INIT_25 = 256'h00C70C7000000000008001000080010000800100008001000080080000000000,
CROM.INIT_26 = 256'h00DA0DA000000000008001000080010000800100008001000080010000800100,
CROM.INIT_27 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_28 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_29 = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_2A = 256'h0080010000800100008001000080010000800100008001000080010000800100,
CROM.INIT_2B = 256'h00C0066000C00660008001000080010000800100008001000080010000800100,
CROM.INIT_2C = 256'h0000000000FFCFFC0080010000800100009D09D0000000000000000000FFCFFC,
CROM.INIT_2D = 256'h00C70C7000000000008001000080010000800100008001000080080000000000,
CROM.INIT_2E = 256'h00DA0DA000000000008001000080010000800100008001000080010000800100,