📄 prac9_max3485_02400.lst
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59 958 sfrb CACTL1 = (0x0059);
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5a 960 sfrb CACTL2 = (0x005A);
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5b 962 sfrb CAPD = (0x005B);
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1a0 1001 sfrw ADC12CTL0 = (0x01A0);
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1a2 1003 sfrw ADC12CTL1 = (0x01A2);
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1a4 1005 sfrw ADC12IFG = (0x01A4);
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1a6 1007 sfrw ADC12IE = (0x01A6);
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1a8 1009 sfrw ADC12IV = (0x01A8);
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140 1018 sfrw ADC12MEM0 = (0x0140);
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142 1020 sfrw ADC12MEM1 = (0x0142);
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144 1022 sfrw ADC12MEM2 = (0x0144);
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146 1024 sfrw ADC12MEM3 = (0x0146);
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148 1026 sfrw ADC12MEM4 = (0x0148);
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14a 1028 sfrw ADC12MEM5 = (0x014A);
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14c 1030 sfrw ADC12MEM6 = (0x014C);
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14e 1032 sfrw ADC12MEM7 = (0x014E);
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150 1034 sfrw ADC12MEM8 = (0x0150);
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152 1036 sfrw ADC12MEM9 = (0x0152);
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154 1038 sfrw ADC12MEM10 = (0x0154);
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156 1040 sfrw ADC12MEM11 = (0x0156);
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158 1042 sfrw ADC12MEM12 = (0x0158);
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15a 1044 sfrw ADC12MEM13 = (0x015A);
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15c 1046 sfrw ADC12MEM14 = (0x015C);
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15e 1048 sfrw ADC12MEM15 = (0x015E);
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80 1057 sfrb ADC12MCTL0 = (0x0080);
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81 1059 sfrb ADC12MCTL1 = (0x0081);
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82 1061 sfrb ADC12MCTL2 = (0x0082);
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83 1063 sfrb ADC12MCTL3 = (0x0083);
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84 1065 sfrb ADC12MCTL4 = (0x0084);
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85 1067 sfrb ADC12MCTL5 = (0x0085);
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86 1069 sfrb ADC12MCTL6 = (0x0086);
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87 1071 sfrb ADC12MCTL7 = (0x0087);
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88 1073 sfrb ADC12MCTL8 = (0x0088);
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89 1075 sfrb ADC12MCTL9 = (0x0089);
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8a 1077 sfrb ADC12MCTL10 = (0x008A);
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8b 1079 sfrb ADC12MCTL11 = (0x008B);
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8c 1081 sfrb ADC12MCTL12 = (0x008C);
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8d 1083 sfrb ADC12MCTL13 = (0x008D);
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8e 1085 sfrb ADC12MCTL14 = (0x008E);
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8f 1087 sfrb ADC12MCTL15 = (0x008F);
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2 ;-----------------------------------------------------------------
3 ;
4 ;
5 ;
6 ;
7 ;
8 ;----------------------------------------------------------------
9 ; MSP430F449
10 ; -----------------
11 ; /|\| XIN|-
12 ; | | | 32768Hz
13 ; --|RST XOUT|-
14 ; | |
15 ; | P2.4|-----------> DI
16 ; | |2400- 8N1
17 ; | P2.5|<----------- RO
18 ;
19 ;---------------------------------------------------------------
20 ;
21 ;---------------------------------------------------------------
202 22 sr_send_buffer equ 202h;
204 23 sr_reci_buffer equ 204h;
24 ;---------------------------------------------------------------
25 ;
26 ;-----------------------------------------------------------------
27 ;
28 ;
29 ;-----------------------------------------------------------------
30 .pseg code, abs=01100h
1100 3140000a 31 RESET mov.w #0a00h,SP
1104 b240805a2001 32 Stopwdt mov.w #(0x5A00)+(0x0080),&WDTCTL
110a b0121611 33 call #init_sr485
110e 32d01000 34 bis.w #(0x0010),SR
1112 0343 35 nop
1114 3041 36 ret
37 ;-------------------------------------------------------------------------
38 ;
39 ;-------------------------------------------------------------------------
40 init_sr485
1116 f2d020005300 41 SetupFLL bis.b #(0x20),&FLL_CTL0 ;
111c f24010007100 42 SetupUART0 mov.b #(0x10),&U0TCTL ; UCLK = ACLK
1122 f2400d007400 43 mov.b #00Dh,&U0BR0 ; 32k/2400 - 13.65
1128 c2437500 44 mov.b #000h,&U0BR1 ; 32k 2400
112c f2406b007300 45 mov.b #06Bh,&U0MCTL ; 32k 2400 modulation
1132 f24010007000 46 mov.b #(0x10),&U0CTL ; 8-bit characters *SWRST*
1138 f2d0c0000400 47 bis.b #(0x80)+(0x40),&ME1 ; Enable USART0 TXD/RXD
113e f2d040000000 48 bis.b #(0x40),&IE1 ; Enable USART0 RX interrupt
1144 f2d030002e00 49 SetupP2 bis.b #030h,&P2SEL ; P2.4,5 = USART0 TXD/RXD
114a f2d010002a00 50 bis.b #010h,&P2DIR ; P2.4 = output direction
1150 e2d21e00 51 SetupP5 bis.b #04h,&P4DIR ;p4.2 I/O
1154 e2c21d00 52 bic.b #04h,&P4OUT ;p4.2=low,MAX3485 RO enable
1158 32d2 53 eint
115a 3041 54 ret
55 ;------------------------------------------------------------------
56 ;
57 ;
58 ;
59 ;
60 ;
61 ;
62 ;--------------------------------------------------------------
63 sr485_reci_int
115c e2d21d00 64 bis.b #04h,&P4OUT ;p4.2=high,MAX3485 DI enable
1160 d24276007700 65 mov.b &U0RXBUF,&U0TXBUF
1166 b0127811 66 tx call #delay
116a f2b080000200 67 bit.b #(0x80),&IFG1 ;
1170 fa27 68 jz tx
1172 e2c21d00 69 bic.b #04h,&P4OUT ;p4.2=low,MAX3485 RO enable
1176 0013 70 reti
71 ;-------------------------------------------------------------------
72 ;-------------delay-------------------------------------------------
73 ;-------------------------------------------------------------------
74 delay
1178 3f40ff0f 75 mov #0fffh,r15
117c 1f83 76 loop dec r15
117e fe23 77 jnz loop
1180 3041 78 ret
79 ;-------------------------------------------------------------------
80 ;
81 ;-------------------------------------------------------------------
82 .pseg reset_vector, abs=0FFFEH
fffe 0011 83 .data RESET
84 .pseg rx_vector, abs=0FFF2H
fff2 5c11 85 .data sr485_reci_int
86 END
87
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