📄 实验6_ta_pwm.s43
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#include "msp430x44x.h"
;******************************************************************************
; MSP-Test44x Demo - Timer_A PWM TA1-2 upmode, DCO SMCLK
;
; Description; This program will generate a two PWM outputs on P1.2/2.0 using
; Timer_A in an upmode. The value in CCR0, 512, defines the period and the
; values in CCR1 and CCR1 the duty PWM cycles. Using 1.048 SMCLK as TACLK,
; the timer period is = 488us with a 75% duty cycle on P1.2 and 25% on P2.0.
; ACLK = LFXT1 = 32768, SMCLK = MCLK = TACLK = DCO = 32xACLK = 1.048576MHz
; //*External watch crystal on XIN XOUT is required for ACLK*//
;
; MSP430F449
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.2|--> CCR1 - 75% PWM
; | P2.0|--> CCR2 - 25% PWM
;
;------------------------------------------------------------------------------
ORG 01100h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0A00h,SP ; Initialize '449 stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupTA mov.w #TASSEL1+TACLR,&TACTL ; SMCLK, Clear TAR
SetupC0 mov.w #512-1,&CCR0 ; PWM Period
SetupC1 mov.w #OUTMOD_7,&CCTL1 ; CCR1 reset/set
mov.w #384,&CCR1 ; CCR1 PWM Duty Cycle
SetupC2 mov.w #OUTMOD_7,&CCTL2 ; CCR2 reset/set
mov.w #128,&CCR2 ; CCR2 PWM duty cycle
SetupP1 bis.b #004h,&P1DIR ; P1.2 output
bis.b #004h,&P1SEL ; P1.2 TA1 option select
SetupP2 bis.b #001h,&P2DIR ; P2.0 output
bis.b #001h,&P2SEL ; P2.0 TA2 option select
bis.w #MC0,&TACTL ; Start Timer_A in up mode
;
Mainloop bis.w #CPUOFF,SR ; CPU off
nop ; Required only for C-spy
;
;------------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x44x
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
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