start.s

LPC2106 example: I2C, Interrupt, UART0 Ram/Rom Config

;**************************************************************************
;                                                                         *
;   PROJECT     : ARM port for uC/OS-II                                   *
;                                                                         *
;   MODULE      : INIT.s                                                  *
;                                                                         *
;   AUTHOR      : Michael Anburaj                                         *
;                 URL  : http://geocities.com/michaelanburaj/             *
;                 EMAIL: [e-mail]                       *
;                                                                         *
;   SPONSOR     : Thanks to Martin Li for sponsoring hardware for this    *
;                 work.                                                   *
;                 EMAIL: [e-mail]                                  *
;                                                                         *
;   PROCESSOR   : LPC210x (32 bit ARM7TDMI-S RISC core from Philips)      *
;                                                                         *
;   TOOL-CHAIN  : SDT 2.51 or ADS 1.2                                     *
;                                                                         *
;   DESCRIPTION :                                                         *
;   LPC210x processor Start up assembly code file.                        *
;                                                                         *
;*************************************************************************/


SRAM_SADDR    EQU 0x40000000        ; SRAM starting address
SRAM_SIZE     EQU 64*1024           ; 64K internal SRAM

ISR_BADDR     EQU 0x40000000        ; plus 0x100 is the RW base address -linker setting

SRAM_EADDR    EQU SRAM_SADDR+SRAM_SIZE-1 ; SRAM end address

_SVC_STKSIZE  EQU 256
_UND_STKSIZE  EQU 256
_ABT_STKSIZE  EQU 256
_IRQ_STKSIZE  EQU 256
_FIQ_STKSIZE  EQU 256

STK_SIZE      EQU _SVC_STKSIZE+_UND_STKSIZE+_ABT_STKSIZE+_IRQ_STKSIZE+_FIQ_STKSIZE

STK_SADDR     EQU SRAM_EADDR+1-STK_SIZE


; Register definition
    ;GET LPC210x.a


; Pre-defined constants
USERMODE      EQU 0x10
FIQMODE       EQU 0x11
IRQMODE       EQU 0x12
SVCMODE       EQU 0x13
ABORTMODE     EQU 0x17
UNDEFMODE     EQU 0x1b
MODEMASK      EQU 0x1f
NOINT         EQU 0xc0


        MACRO
$HandlerLabel HANDLER $HandleLabel

$HandlerLabel
        sub sp,sp,#4
        stmfd sp!,{r0}
        ldr r0,=$HandleLabel
        ldr r0,[r0]
        str r0,[sp,#4]
        ldmfd sp!,{r0,pc}
        MEND


        AREA  |Init|, CODE, READONLY

        ENTRY

        b ResetHandler
        b HandlerUndef              ; handlerUndef
        b HandlerSWI                ; SWI interrupt handler
        b HandlerPabort             ; handlerPAbort
        b HandlerDabort             ; handlerDAbort
        b .                         ; handlerReserved
        b HandlerIRQ                ; handlerIRQ
        b HandlerFIQ                ; handlerFIQ
   
HandlerFIQ     HANDLER HandleFIQ
HandlerIRQ     HANDLER HandleIRQ
HandlerUndef   HANDLER HandleUndef
HandlerSWI     HANDLER HandleSWI
HandlerDabort  HANDLER HandleDabort
HandlerPabort  HANDLER HandlePabort


;*****************************************************************************
;
; ResetHandler is the startup code to be used
;
;*****************************************************************************
ResetHandler
        ; Initialize stacks
        bl InitStacks

;********************************************************************
; End of Stack Setup
;********************************************************************

        ;
        ; Copy the read-write data block from ROM to RAM.
        ;

        IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
        IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialize
        IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
        IMPORT  |Image$$ZI$$Limit|  ; to zero initialize

        ldr r0,=|Image$$RO$$Limit|  ; Get pointer to ROM data
        ldr r1,=|Image$$RW$$Base|   ; and RAM copy
        ldr r3,=|Image$$ZI$$Base|        
        ; Zero init base => top of initialized data
                        
        cmp r0,r1                   ; Check that they are different
        beq %F1
0                
        cmp r1,r3                   ; Copy init data
        ldrcc r2,[r0],#4
        strcc r2,[r1],#4
        bcc %B0
1                
        ldr r1,=|Image$$ZI$$Limit|  ; Top of zero init segment
        mov r2,#0
2                
        cmp r3,r1                   ; Zero init
        strcc r2,[r3],#4
        bcc %B2

program
        ;
        ; Call the actual C program.
        ; Should never return.
        ;
        IMPORT main
        b main                   ; C Entry


InitStacks
        ; Don't use DRAM,such as stmfd,ldmfd......
        ; SVCstack is initialized before
        ; Under toolkit ver 2.50, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
        
        mrs r0,cpsr
        bic r0,r0,#MODEMASK
        orr r1,r0,#UNDEFMODE|NOINT
        msr cpsr_cxsf,r1            ; UndefMode
        ldr sp,=UndefStack
        
        orr r1,r0,#ABORTMODE|NOINT
        msr cpsr_cxsf,r1            ; AbortMode
        ldr sp,=AbortStack

        orr r1,r0,#IRQMODE|NOINT
        msr cpsr_cxsf,r1            ; IRQMode
        ldr sp,=IRQStack
        
        orr r1,r0,#FIQMODE|NOINT
        msr cpsr_cxsf,r1            ; FIQMode
        ldr sp,=FIQStack

        bic r0,r0,#MODEMASK|NOINT
        orr r1,r0,#SVCMODE
        msr cpsr_cxsf,r1            ; SVCMode
        ldr sp,=SVCStack

        ; USER mode is not initialized.

        mov pc,lr                   ; The LR register may be not valid for the mode changes.

;
;*****************************************************************************
;
; Zero-initialized read/write data area for stacks.
; This area is determined by the RW value in the Linker under "entry and base".  
;*****************************************************************************
        AREA  SYS_STK, DATA, READWRITE, NOINIT

;*****************************************************************************
;
; Memory buffers to contain the stacks for the various processor modes which
; we will be using.
;
;*****************************************************************************

        ^       STK_SADDR

UserStack       #       _SVC_STKSIZE
SVCStack        #       _UND_STKSIZE
UndefStack      #       _ABT_STKSIZE
AbortStack      #       _IRQ_STKSIZE
IRQStack        #       _FIQ_STKSIZE
FIQStack        #       0 


        AREA  ISR_HOOK, DATA, READWRITE, NOINIT

        ^  ISR_BADDR
HandleReset     # 4
HandleUndef     # 4
HandleSWI       # 4
HandlePabort    # 4
HandleDabort    # 4
HandleReserved  # 4
HandleIRQ       # 4
HandleFIQ       # 4

;
;*****************************************************************************
;
        END